Arm64/Sve: Some optimizations around loop scenario

[kunalspathak]

• Enable some of the loop optimization paths around TYP_MASK for Arm64
• In Morph, eliminate ConvertVectorToMask(ConvertMaskToVector(...)) or ConvertMaskToVector(ConvertVectorToMask(...))
• Enable support of enregisteration of TYP_MASK
• Start supporting INS_sve_mov for predicate registers

With these optimizations, the code generated matches the one generated by clang .

public static unsafe int sum_sve(ref int* srcBytes, int length)
{
  Vector<int> total = new Vector<int>(0);
  int* src = srcBytes;
  int elems = (int)Sve.Count32BitElements();
  
  for (int i = 0; i < length + elems; i += elems)
  {
          // Cannot do this yet because we do not optimize the cases where TYP_MASK is stored in lclvar and use it around
	  //Vector<int> pred = Sve.CreateWhileLessThanMask32Bit(i, length);
  
	  Vector<int> vec = Sve.LoadVector((Vector<int>)Sve.CreateWhileLessThanMask32Bit(i, length), src);
  
	  total = Sve.ConditionalSelect((Vector<int>)Sve.CreateWhileLessThanMask32Bit(i, length), Sve.Add(total, vec), total);
  
	  src += elems;
  }
  
  return (int)Sve.AddAcross(total).ToScalar();
}

[kunalspathak]

@dotnet/arm64-contrib

[tannergooding]

The general logic here, except for the intrinsicId, is identical to the xarch path (and likely always will be since its purely an internal helper).

Is it worth sharing most of the code between them?

[tannergooding]

Not sure I understand why this one needs to be handled?

CreateTrueMaskAll produces a TYP_MASK and ConvertVectorToMask requires a TYP_SIMD input, so encountering it as the op1 of ConvertVectorToMask would be representative of malformed IR.

[kunalspathak]

Let me get rid of CreateTrueMaskAll in follow-up PR and then I can combine the logic along with x64.

[tannergooding]

Why is this op2?

I would have expected that ConvertVectorToMask only needs a single input, much as it does on xarch.

[kunalspathak]

Yes, currently we create ConvertVectorToMask using ConvertVectorToMask (AllTrue, op) and I want to do the work in a separate PR of moving it to lowering. Hence, we are getting op2 instead of op1.

runtime/src/coreclr/jit/hwintrinsicarm64.cpp

Lines 2221 to 2231 in a530a1c

	GenTree* Compiler::gtNewSimdConvertVectorToMaskNode(var_types type,
	GenTree* node,
	CorInfoType simdBaseJitType,
	unsigned simdSize)
	{
	assert(varTypeIsSIMD(node));
	// ConvertVectorToMask uses cmpne which requires an embedded mask.
	GenTree* trueMask = gtNewSimdAllTrueMaskNode(simdBaseJitType, simdSize);
	return gtNewSimdHWIntrinsicNode(TYP_MASK, trueMask, node, NI_Sve_ConvertVectorToMask, simdBaseJitType, simdSize);
	}

[tannergooding]

Is there an issue tracking mirroring of the other mask related handling that morph handles for xarch?

In particular, the recognition of And(MaskToVector(x), MaskToVector(y)) and converting it to AndMask(x, y) (as well as similar transforms for other trivial operations where the operation is identical).

[kunalspathak]

#101933

[kunalspathak]

/ba-g the failure seems to be timeout in osx/x64