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Review the multi-op instruction usage for Arm64 #68028

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@tannergooding

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@tannergooding

After seeing the msub PR (#66621) which folds mul, sub into a single msub I went and looked in the Arm64 manual for other interesting "combined operation" instructions.

There is a set of (shifted register) instructions which can combine a shift, op (the variants ending with s also set flags):

There is a set of (extended register) instructions which can combine a zero-extend, op or sign-extend, op:

  • add, adds - Add
  • sub, subs - Subtract
  • cmp - Compare
  • cmn - Compare Negative

There is a set of (carry) instructions which can utilize the carry from a previous operation:

  • adc, adcs - Add with carry
  • sbc, sbcs - Subtract with carry
  • ngc, ngcs - Negate with carry

There are the multiply integer instructions which can combine an op, mul:

  • madd - Multiply-add
  • msub - Multiply-subtract
  • mneg - Multiply-negate

There are then some long multiply instructions which can return a product twice the size of the inputs (i32 * i32 = i64 or similar; effectively good for covering zero or sign extend, multiply):

Finally there is the "multiply high" instructions which can return just the upper bits of a wide multiply:

  • smulh, umulh - Multiply High

There may be other interesting instructions as well, but these are ones that may have broader usage/application and which likely be good to validate we are covering

category:implementation
theme:intrinsics

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Priority:3Work that is nice to havearch-arm64area-CodeGen-coreclrCLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI

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