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JitStressCLR JIT issues involving JIT internal stress modesCLR JIT issues involving JIT internal stress modesarch-arm32area-CodeGen-coreclrCLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMICLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMIblocking-outerloopBlocking the 'runtime-coreclr outerloop' and 'runtime-libraries-coreclr outerloop' runsBlocking the 'runtime-coreclr outerloop' and 'runtime-libraries-coreclr outerloop' runsos-linuxLinux OS (any supported distro)Linux OS (any supported distro)
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Description
Run: runtime-coreclr jitstress2-jitstressregs 20220313.1
Failed test:
CoreCLR Linux arm Checked jitstress2_jitstressregs0x80 @ (Ubuntu.1804.Arm32.Open)Ubuntu.1804.Armarch.Open@mcr.microsoft.com/dotnet-buildtools/prereqs:ubuntu-18.04-helix-arm32v7-bfcd90a-20200121150440
- JIT/Regression/JitBlue/DevDiv_461649/DevDiv_461649/DevDiv_461649.sh
Error message:
Assert failure(PID 3872 [0x00000f20], Thread: 3872 [0x0f20]): Assertion failed 'refPosition->RegOptional()' in 'MS.Internal.Xml.Cache.XPathDocumentBuilder:WriteEndAttribute():this' during 'LSRA build intervals' (IL size 175; hash 0xa29b3bbb; FullOpts)
File: /__w/1/s/src/coreclr/jit/lsra.cpp Line: 11883
Image: /root/helix/work/correlation/corerun
/root/helix/work/workitem/e/JIT/Regression/JitBlue/DevDiv_461649/DevDiv_461649/DevDiv_461649.sh: line 379: 3872 Aborted (core dumped) $LAUNCHER $ExePath "${CLRTestExecutionArguments[@]}"
Return code: 1
Raw output file: /root/helix/work/workitem/uploads/Reports/JIT.Regression/JitBlue/DevDiv_461649/DevDiv_461649/DevDiv_461649.output.txt
Raw output:
BEGIN EXECUTION
/root/helix/work/correlation/corerun -p System.Reflection.Metadata.MetadataUpdater.IsSupported=false DevDiv_461649.dll ''
Gathering state for process 3872 corerun
Crashing thread 00000f20 signal 00000006
Writing minidump with heap to file /home/helixbot/dotnetbuild/dumps/coredump.3872.dmp
Written 63852544 bytes (15589 pages) to core file
Dump successfully written
Expected: 100
Actual: 134
END EXECUTION - FAILED
Test Harness Exitcode is : 1
To run the test:
set CORE_ROOT=/root/helix/work/correlation
/root/helix/work/workitem/e/JIT/Regression/JitBlue/DevDiv_461649/DevDiv_461649/DevDiv_461649.sh
Expected: True
Actual: False
Stack trace
at JIT_Regression._JitBlue_DevDiv_461649_DevDiv_461649_DevDiv_461649_._JitBlue_DevDiv_461649_DevDiv_461649_DevDiv_461649_sh()
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JitStressCLR JIT issues involving JIT internal stress modesCLR JIT issues involving JIT internal stress modesarch-arm32area-CodeGen-coreclrCLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMICLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMIblocking-outerloopBlocking the 'runtime-coreclr outerloop' and 'runtime-libraries-coreclr outerloop' runsBlocking the 'runtime-coreclr outerloop' and 'runtime-libraries-coreclr outerloop' runsos-linuxLinux OS (any supported distro)Linux OS (any supported distro)