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Refactor some common code into lower.cpp.
Some code will conflict with latest changes. I've squashed so we can discuss how to merge in properly.
1 parent 87bd33e commit f294c57

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7 files changed

+40
-54
lines changed

7 files changed

+40
-54
lines changed

src/coreclr/jit/codegeninterface.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -871,5 +871,4 @@ struct GenConditionDesc
871871
};
872872
#endif // !defined(TARGET_LOONGARCH64) && !defined(TARGET_RISCV64)
873873

874-
875874
#endif // _CODEGEN_INTERFACE_H_

src/coreclr/jit/codegenxarch.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -9012,7 +9012,7 @@ insOpts CodeGen::OptsFromCFlags(insCflags flags)
90129012
// None.
90139013
//
90149014
// Notes:
9015-
// This function generates code for a conditional compare operation. On X86, it supports integer
9015+
// This function generates code for a conditional compare operation. On X86,
90169016
// comparisons using the extended EVEX encoding and ccmp instruction.
90179017
void CodeGen::genCodeForCCMP(GenTreeCCMP* ccmp)
90189018
{

src/coreclr/jit/emitxarch.cpp

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -20116,6 +20116,14 @@ emitter::insFormat emitter::ExtractMemoryFormat(insFormat insFmt) const
2011620116
return IF_NONE;
2011720117
}
2011820118

20119+
#ifdef TARGET_AMD64
20120+
// true if this 'imm' can be encoded as a input operand to a ccmp instruction
20121+
/*static*/ bool emitter::emitIns_valid_imm_for_ccmp(INT64 imm)
20122+
{
20123+
return (((INT32)imm) == imm);
20124+
}
20125+
#endif
20126+
2011920127
#if defined(DEBUG) || defined(LATE_DISASM)
2012020128

2012120129
//----------------------------------------------------------------------------------------

src/coreclr/jit/emitxarch.h

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1327,4 +1327,9 @@ inline bool HasExtendedGPReg(const instrDesc* id) const;
13271327

13281328
inline bool HasMaskReg(const instrDesc* id) const;
13291329

1330+
#ifdef TARGET_AMD64
1331+
// true if this 'imm' can be encoded as a input operand to a ccmp instruction
1332+
static bool emitIns_valid_imm_for_ccmp(INT64 imm);
1333+
#endif // TARGET_AMD64
1334+
13301335
#endif // TARGET_XARCH

src/coreclr/jit/lower.cpp

Lines changed: 26 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -859,7 +859,7 @@ GenTree* Lowering::LowerArrLength(GenTreeArrCommon* node)
859859
* and LinearCodeGen will be responsible to generate downstream).
860860
*
861861
* This way there are no implicit temporaries.
862-
862+
863863
* b) For small-sized switches, we will actually morph them into a series of conditionals of the form
864864
* if (case falls into the default){ goto jumpTable[size]; // last entry in the jump table is the default case }
865865
* (For the default case conditional, we'll be constructing the exact same code as the jump table case one).
@@ -4528,6 +4528,7 @@ bool Lowering::TryLowerConditionToFlagsNode(GenTree* parent,
45284528

45294529
*cond = condition->AsCC()->gtCondition;
45304530

4531+
#ifdef TARGET_XARCH
45314532
if (!allowMultipleFlagsChecks)
45324533
{
45334534
const GenConditionDesc& desc = GenConditionDesc::Get(*cond);
@@ -4537,6 +4538,7 @@ bool Lowering::TryLowerConditionToFlagsNode(GenTree* parent,
45374538
return false;
45384539
}
45394540
}
4541+
#endif
45404542

45414543
LIR::Range range = BlockRange().Remove(flagsDef, condition->gtPrev);
45424544
BlockRange().InsertBefore(parent, std::move(range));
@@ -11079,6 +11081,29 @@ bool Lowering::TryLowerAndNegativeOne(GenTreeOp* node, GenTree** nextNode)
1107911081
return true;
1108011082
}
1108111083

11084+
#if defined(TARGET_AMD64) || defined(TARGET_ARM64)
11085+
//------------------------------------------------------------------------
11086+
// ContainCheckConditionalCompare: determine whether the source of a compare within a compare chain should be contained.
11087+
//
11088+
// Arguments:
11089+
// node - pointer to the node
11090+
//
11091+
void Lowering::ContainCheckConditionalCompare(GenTreeCCMP* cmp)
11092+
{
11093+
GenTree* op2 = cmp->gtOp2;
11094+
11095+
if (op2->IsCnsIntOrI() && !op2->AsIntCon()->ImmedValNeedsReloc(comp))
11096+
{
11097+
target_ssize_t immVal = (target_ssize_t)op2->AsIntCon()->gtIconVal;
11098+
11099+
if (emitter::emitIns_valid_imm_for_ccmp(immVal))
11100+
{
11101+
MakeSrcContained(cmp, op2);
11102+
}
11103+
}
11104+
}
11105+
#endif
11106+
1108211107
#if defined(FEATURE_HW_INTRINSICS)
1108311108
//----------------------------------------------------------------------------------------------
1108411109
// Lowering::InsertNewSimdCreateScalarUnsafeNode: Inserts a new simd CreateScalarUnsafe node

src/coreclr/jit/lowerarmarch.cpp

Lines changed: 0 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -3301,28 +3301,6 @@ insCflags Lowering::TruthifyingFlags(GenCondition condition)
33013301
return INS_FLAGS_NONE;
33023302
}
33033303
}
3304-
3305-
//------------------------------------------------------------------------
3306-
// ContainCheckConditionalCompare: determine whether the source of a compare within a compare chain should be contained.
3307-
//
3308-
// Arguments:
3309-
// node - pointer to the node
3310-
//
3311-
void Lowering::ContainCheckConditionalCompare(GenTreeCCMP* cmp)
3312-
{
3313-
GenTree* op2 = cmp->gtOp2;
3314-
3315-
if (op2->IsCnsIntOrI() && !op2->AsIntCon()->ImmedValNeedsReloc(comp))
3316-
{
3317-
target_ssize_t immVal = (target_ssize_t)op2->AsIntCon()->gtIconVal;
3318-
3319-
if (emitter::emitIns_valid_imm_for_ccmp(immVal))
3320-
{
3321-
MakeSrcContained(cmp, op2);
3322-
}
3323-
}
3324-
}
3325-
33263304
#endif // TARGET_ARM64
33273305

33283306
//------------------------------------------------------------------------

src/coreclr/jit/lowerxarch.cpp

Lines changed: 0 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -338,7 +338,6 @@ GenTree* Lowering::LowerBinaryArithmetic(GenTreeOp* binOp)
338338
}
339339

340340
#ifdef TARGET_AMD64
341-
342341
//------------------------------------------------------------------------
343342
// TryLowerAndOrToCCMP : Lower AND/OR of two conditions into test + CCMP + SETCC nodes.
344343
//
@@ -378,11 +377,6 @@ bool Lowering::TryLowerAndOrToCCMP(GenTreeOp* tree, GenTree** next)
378377
// For the other operand we can allow more arbitrary operations that set
379378
// the condition flags; the final transformation into the flags def is done
380379
// by TryLowerConditionToFlagsNode.
381-
//
382-
//
383-
// On X86, a FP compare is implemented as a fallthrough, which requires two flag checks; hence,
384-
// we cannot simply get a single output condition to feed into a ccmp. Might be possible to chain
385-
// this, but skipping those cases for now
386380
GenCondition cond1;
387381
if (op2->OperIsCmpCompare() && varTypeIsIntegralOrI(op2->gtGetOp1()) && IsInvariantInRange(op2, tree) &&
388382
TryLowerConditionToFlagsNode(tree, op1, &cond1, false))
@@ -485,29 +479,6 @@ insCflags Lowering::TruthifyingFlags(GenCondition condition)
485479
return INS_FLAGS_NONE;
486480
}
487481
}
488-
489-
//------------------------------------------------------------------------
490-
// ContainCheckConditionalCompare: determine whether the source of a compare within a compare chain should be contained.
491-
//
492-
// Arguments:
493-
// node - pointer to the node
494-
//
495-
void Lowering::ContainCheckConditionalCompare(GenTreeCCMP* cmp)
496-
{
497-
GenTree* op2 = cmp->gtOp2;
498-
499-
if (op2->IsCnsIntOrI() && !op2->AsIntCon()->ImmedValNeedsReloc(comp))
500-
{
501-
target_ssize_t immVal = (target_ssize_t)op2->AsIntCon()->gtIconVal;
502-
503-
// TODO-XArch-APX: make this check work
504-
// if (emitter::emitIns_valid_imm_for_ccmp(immVal))
505-
//{
506-
MakeSrcContained(cmp, op2);
507-
//}
508-
}
509-
}
510-
511482
#endif // TARGET_AMD64
512483

513484
//------------------------------------------------------------------------

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