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Use REG_INDIRECT_CALL_TARGET_REG for indirect calls on arm64 (#101927)
* Use REG_INDIRECT_CALL_TARGET_REG for indirect calls on arm64 * Added a comment about NativeAOT dependency at the place wehre we exclude LR from availableIntRegs
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src/coreclr/jit/codegenarmarch.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -3682,11 +3682,11 @@ void CodeGen::genCallInstruction(GenTreeCall* call)
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{
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#ifdef TARGET_ARM
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// For arm32 we've allocated an internal register to load the target into.
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// Loading into lr takes 4 bytes (instead of potentially 2 with another register).
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// Loading into IP takes 4 bytes (instead of potentially 2 with another register).
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targetAddrReg = internalRegisters.GetSingle(call);
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#else
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// For arm64 we just use lr and skip the internal register.
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targetAddrReg = REG_LR;
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// For arm64 we just use IP0 and skip the internal register.
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targetAddrReg = REG_INDIRECT_CALL_TARGET_REG;
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#endif
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GetEmitter()->emitIns_R_R(ins_Load(TYP_I_IMPL), emitActualTypeSize(TYP_I_IMPL), targetAddrReg,

src/coreclr/jit/lsra.cpp

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -788,6 +788,9 @@ LinearScan::LinearScan(Compiler* theCompiler)
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regSelector = new (theCompiler, CMK_LSRA) RegisterSelection(this);
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#ifdef TARGET_ARM64
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// Note: one known reason why we exclude LR is because NativeAOT has dependency on not
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// using LR as a GPR. See: https://github.com/dotnet/runtime/issues/101932
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// Once that is addressed, we may consider allowing LR in availableIntRegs.
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availableIntRegs = (RBM_ALLINT & ~(RBM_PR | RBM_FP | RBM_LR) & ~compiler->codeGen->regSet.rsMaskResvd);
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#elif defined(TARGET_LOONGARCH64) || defined(TARGET_RISCV64)
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availableIntRegs = (RBM_ALLINT & ~(RBM_FP | RBM_RA) & ~compiler->codeGen->regSet.rsMaskResvd);

src/coreclr/jit/lsraarmarch.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -191,9 +191,9 @@ int LinearScan::BuildCall(GenTreeCall* call)
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}
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else
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{
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// For arm64 we can use lr for non-tailcalls so we skip the
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// internal register as a TP optimization. We could do the same for
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// arm32, but loading into lr cannot be encoded in 2 bytes, so
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// For arm64 we can use REG_INDIRECT_CALL_TARGET_REG (IP0) for non-tailcalls
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// so we skip the internal register as a TP optimization. We could do the same for
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// arm32, but loading into IP cannot be encoded in 2 bytes, so
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// another register is usually better.
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#ifdef TARGET_ARM
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buildInternalIntRegisterDefForNode(call);

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