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Fix PermuteVar32x16x2 optimization (#90005)
1 parent 0f2c8fa commit e07d1ee

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3 files changed

+95
-20
lines changed

3 files changed

+95
-20
lines changed

src/coreclr/jit/lowerxarch.cpp

Lines changed: 52 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -9130,11 +9130,19 @@ void Lowering::ContainCheckHWIntrinsic(GenTreeHWIntrinsic* node)
91309130
// * TYP_SIMD16: 0x10
91319131
// * TYP_SIMD32: 0x20
91329132
// * TYP_SIMD64: 0x40
9133-
toggleBit = 0x4040404040404040 >> ((elemSize / 2) + (simdSize / 32));
9134-
9135-
assert(((simdSize == 16) && (toggleBit == 0x1010101010101010)) ||
9136-
((simdSize == 32) && (toggleBit == 0x2020202020202020)) ||
9137-
((simdSize == 64) && (toggleBit == 0x4040404040404040)));
9133+
switch (simdSize)
9134+
{
9135+
case 16:
9136+
toggleBit = 0x1010101010101010;
9137+
break;
9138+
case 32:
9139+
toggleBit = 0x2020202020202020;
9140+
break;
9141+
default:
9142+
assert(simdSize == 64);
9143+
toggleBit = 0x4040404040404040;
9144+
break;
9145+
}
91389146
break;
91399147
}
91409148

@@ -9144,11 +9152,19 @@ void Lowering::ContainCheckHWIntrinsic(GenTreeHWIntrinsic* node)
91449152
// * TYP_SIMD16: 0x08
91459153
// * TYP_SIMD32: 0x10
91469154
// * TYP_SIMD64: 0x20
9147-
toggleBit = 0x0020002000200020 >> ((elemSize / 2) + (simdSize / 32));
9148-
9149-
assert(((simdSize == 16) && (toggleBit == 0x0008000800080008)) ||
9150-
((simdSize == 32) && (toggleBit == 0x0010001000100010)) ||
9151-
((simdSize == 64) && (toggleBit == 0x0020002000200020)));
9155+
switch (simdSize)
9156+
{
9157+
case 16:
9158+
toggleBit = 0x0008000800080008;
9159+
break;
9160+
case 32:
9161+
toggleBit = 0x0010001000100010;
9162+
break;
9163+
default:
9164+
assert(simdSize == 64);
9165+
toggleBit = 0x0020002000200020;
9166+
break;
9167+
}
91529168
break;
91539169
}
91549170

@@ -9158,11 +9174,19 @@ void Lowering::ContainCheckHWIntrinsic(GenTreeHWIntrinsic* node)
91589174
// * TYP_SIMD16: 0x04
91599175
// * TYP_SIMD32: 0x08
91609176
// * TYP_SIMD64: 0x10
9161-
toggleBit = 0x0000001000000010 >> ((elemSize / 2) + (simdSize / 32));
9162-
9163-
assert(((simdSize == 16) && (toggleBit == 0x0000000400000004)) ||
9164-
((simdSize == 32) && (toggleBit == 0x0000000800000008)) ||
9165-
((simdSize == 64) && (toggleBit == 0x0000001000000010)));
9177+
switch (simdSize)
9178+
{
9179+
case 16:
9180+
toggleBit = 0x0000000400000004;
9181+
break;
9182+
case 32:
9183+
toggleBit = 0x0000000800000008;
9184+
break;
9185+
default:
9186+
assert(simdSize == 64);
9187+
toggleBit = 0x0000001000000010;
9188+
break;
9189+
}
91669190
break;
91679191
}
91689192

@@ -9172,11 +9196,19 @@ void Lowering::ContainCheckHWIntrinsic(GenTreeHWIntrinsic* node)
91729196
// * TYP_SIMD16: 0x02
91739197
// * TYP_SIMD32: 0x04
91749198
// * TYP_SIMD64: 0x08
9175-
toggleBit = 0x0000000000000008 >> ((elemSize / 2) + (simdSize / 32));
9176-
9177-
assert(((simdSize == 16) && (toggleBit == 0x0000000000000002)) ||
9178-
((simdSize == 32) && (toggleBit == 0x0000000000000004)) ||
9179-
((simdSize == 64) && (toggleBit == 0x0000000000000008)));
9199+
switch (simdSize)
9200+
{
9201+
case 16:
9202+
toggleBit = 0x0000000000000002;
9203+
break;
9204+
case 32:
9205+
toggleBit = 0x0000000000000004;
9206+
break;
9207+
default:
9208+
assert(simdSize == 64);
9209+
toggleBit = 0x0000000000000008;
9210+
break;
9211+
}
91809212
break;
91819213
}
91829214

Lines changed: 35 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,35 @@
1+
// Licensed to the .NET Foundation under one or more agreements.
2+
// The .NET Foundation licenses this file to you under the MIT license.
3+
4+
using System.Runtime.CompilerServices;
5+
using System.Runtime.Intrinsics;
6+
using System.Runtime.Intrinsics.X86;
7+
using Xunit;
8+
9+
public class Runtime_89456
10+
{
11+
[MethodImpl(MethodImplOptions.NoInlining)]
12+
private static Vector512<ushort> PermuteVar32x16x2Test(Vector512<ushort> left, ushort right)
13+
{
14+
var r8w = right;
15+
var zmm0 = left;
16+
var zmm1 = Vector512.CreateScalarUnsafe(r8w);
17+
var zmm2 = Vector512.Create((ushort)1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32);
18+
return Avx512BW.PermuteVar32x16x2(zmm0, zmm2, zmm1);
19+
}
20+
21+
[Fact]
22+
public static int TestEntryPoint()
23+
{
24+
if (Avx512BW.IsSupported)
25+
{
26+
var expected = Vector512.Create((ushort)1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32);
27+
Vector512<ushort> actual = PermuteVar32x16x2Test(Vector512.Create(ushort.MinValue, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31), 32);
28+
if (actual != expected)
29+
{
30+
return 101;
31+
}
32+
}
33+
return 100;
34+
}
35+
}
Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,8 @@
1+
<Project Sdk="Microsoft.NET.Sdk">
2+
<PropertyGroup>
3+
<Optimize>True</Optimize>
4+
</PropertyGroup>
5+
<ItemGroup>
6+
<Compile Include="$(MSBuildProjectName).cs" />
7+
</ItemGroup>
8+
</Project>

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