@@ -21,13 +21,6 @@ protected override void EmitCode(NodeFactory factory, ref ARM64Emitter instructi
2121 return ;
2222 }
2323
24- instructionEncoder . Builder . RequireInitialPointerAlignment ( ) ;
25- Debug . Assert ( instructionEncoder . Builder . CountBytes == 0 ) ;
26-
27- instructionEncoder . Builder . EmitReloc ( factory . ModuleImport , RelocType . IMAGE_REL_BASED_DIR64 ) ;
28-
29- Debug . Assert ( instructionEncoder . Builder . CountBytes == ( ( ISymbolNode ) this ) . Offset ) ;
30-
3124 if ( relocsOnly )
3225 {
3326 // When doing relocs only, we don't need to generate the actual instructions
@@ -50,8 +43,11 @@ protected override void EmitCode(NodeFactory factory, ref ARM64Emitter instructi
5043 instructionEncoder . EmitMOV ( Register . X9 , checked ( ( ushort ) index ) ) ;
5144
5245 // Move Module* -> x10
53- // ldr x10, [PC-0xc]
54- instructionEncoder . EmitLDR ( Register . X10 , - 0xc ) ;
46+ // adrp x10, ModuleImport
47+ instructionEncoder . EmitADRP ( Register . X10 , factory . ModuleImport ) ;
48+
49+ // ldr x10, [x10, ModuleImport page offset]
50+ instructionEncoder . EmitLDR ( Register . X10 , Register . X10 , factory . ModuleImport ) ;
5551
5652 // ldr x10, [x10]
5753 instructionEncoder . EmitLDR ( Register . X10 , Register . X10 ) ;
@@ -60,8 +56,11 @@ protected override void EmitCode(NodeFactory factory, ref ARM64Emitter instructi
6056 case Kind . Lazy :
6157
6258 // Move Module* -> x1
63- // ldr x1, [PC-0x8]
64- instructionEncoder . EmitLDR ( Register . X1 , - 0x8 ) ;
59+ // adrp x1, ModuleImport
60+ instructionEncoder . EmitADRP ( Register . X1 , factory . ModuleImport ) ;
61+
62+ // ldr x1, [x1, ModuleImport page offset]
63+ instructionEncoder . EmitLDR ( Register . X1 , Register . X1 , factory . ModuleImport ) ;
6564
6665 // ldr x1, [x1]
6766 instructionEncoder . EmitLDR ( Register . X1 , Register . X1 ) ;
0 commit comments