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#include " RuntimeInstance.h"
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#include " rhbinder.h"
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+ #ifdef TARGET_UNIX
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+ #include " UnixContext.h"
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+ #endif
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+
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// warning C4061: enumerator '{blah}' in switch of enum '{blarg}' is not explicitly handled by a case label
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#pragma warning(disable:4061)
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@@ -93,13 +97,11 @@ StackFrameIterator::StackFrameIterator(Thread * pThreadToWalk, PInvokeTransition
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STRESS_LOG0 (LF_STACKWALK, LL_INFO10000, " ----Init---- [ GC ]\n " );
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ASSERT (!pThreadToWalk->DangerousCrossThreadIsHijacked ());
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- #ifdef FEATURE_SUSPEND_REDIRECTION
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- if (pInitialTransitionFrame == REDIRECTED_THREAD_MARKER)
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+ if (pInitialTransitionFrame == INTERRUPTED_THREAD_MARKER)
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{
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- InternalInit (pThreadToWalk, pThreadToWalk->GetRedirectionContext (), GcStackWalkFlags | ActiveStackFrame);
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+ InternalInit (pThreadToWalk, pThreadToWalk->GetInterruptedContext (), GcStackWalkFlags | ActiveStackFrame);
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}
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else
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- #endif
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{
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InternalInit (pThreadToWalk, pInitialTransitionFrame, GcStackWalkFlags);
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}
@@ -109,7 +111,14 @@ StackFrameIterator::StackFrameIterator(Thread * pThreadToWalk, PInvokeTransition
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StackFrameIterator::StackFrameIterator (Thread * pThreadToWalk, PTR_PAL_LIMITED_CONTEXT pCtx)
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{
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- STRESS_LOG0 (LF_STACKWALK, LL_INFO10000, " ----Init---- [ hijack ]\n " );
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+ STRESS_LOG0 (LF_STACKWALK, LL_INFO10000, " ----Init with limited ctx---- [ hijack ]\n " );
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+ InternalInit (pThreadToWalk, pCtx, 0 );
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+ PrepareToYieldFrame ();
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+ }
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+
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+ StackFrameIterator::StackFrameIterator (Thread* pThreadToWalk, NATIVE_CONTEXT* pCtx)
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+ {
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+ STRESS_LOG0 (LF_STACKWALK, LL_INFO10000, " ----Init with native ctx---- [ hijack ]\n " );
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InternalInit (pThreadToWalk, pCtx, 0 );
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PrepareToYieldFrame ();
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}
@@ -283,15 +292,11 @@ void StackFrameIterator::InternalInit(Thread * pThreadToWalk, PInvokeTransitionF
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if (pFrame->m_Flags & PTFF_SAVE_R11) { m_RegDisplay.pR11 = pPreservedRegsCursor++; }
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#endif // TARGET_AMD64
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- if (pFrame->m_Flags & PTFF_RAX_IS_GCREF)
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- {
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- m_pHijackedReturnValue = (PTR_RtuObjectRef) m_RegDisplay.pRax ;
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- m_HijackedReturnValueKind = GCRK_Object;
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- }
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- if (pFrame->m_Flags & PTFF_RAX_IS_BYREF)
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+ GCRefKind retValueKind = TransitionFrameFlagsToReturnKind (pFrame->m_Flags );
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+ if (retValueKind != GCRK_Scalar)
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{
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- m_pHijackedReturnValue = (PTR_RtuObjectRef) m_RegDisplay.pRax ;
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- m_HijackedReturnValueKind = GCRK_Byref ;
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+ m_pHijackedReturnValue = (PTR_RtuObjectRef)m_RegDisplay.pRax ;
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+ m_HijackedReturnValueKind = retValueKind ;
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}
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#endif // TARGET_ARM
@@ -508,10 +513,9 @@ void StackFrameIterator::InternalInit(Thread * pThreadToWalk, PTR_PAL_LIMITED_CO
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#endif // TARGET_ARM
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}
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- // Prepare to start a stack walk from the context listed in the supplied CONTEXT.
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- // The supplied context can describe a location in either managed or unmanaged code. In the
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- // latter case the iterator is left in an invalid state when this function returns.
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- void StackFrameIterator::InternalInit (Thread * pThreadToWalk, CONTEXT* pCtx, uint32_t dwFlags)
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+ // Prepare to start a stack walk from the context listed in the supplied NATIVE_CONTEXT.
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+ // The supplied context can describe a location in managed code.
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+ void StackFrameIterator::InternalInit (Thread * pThreadToWalk, NATIVE_CONTEXT* pCtx, uint32_t dwFlags)
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{
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ASSERT ((dwFlags & MethodStateCalculated) == 0 );
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@@ -524,10 +528,8 @@ void StackFrameIterator::InternalInit(Thread * pThreadToWalk, CONTEXT* pCtx, uin
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// properly walk it in parallel.
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ResetNextExInfoForSP (pCtx->GetSp ());
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- // This codepath is used by the hijack stackwalk and we can get arbitrary ControlPCs from there. If this
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- // context has a non-managed control PC, then we're done.
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- if (!m_pInstance->IsManaged (dac_cast<PTR_VOID>(pCtx->GetIp ())))
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- return ;
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+ // This codepath is used by the hijack stackwalk. The IP must be in managed code.
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+ ASSERT (m_pInstance->IsManaged (dac_cast<PTR_VOID>(pCtx->GetIp ())));
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//
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// control state
@@ -536,82 +538,90 @@ void StackFrameIterator::InternalInit(Thread * pThreadToWalk, CONTEXT* pCtx, uin
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m_RegDisplay.SP = pCtx->GetSp ();
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m_RegDisplay.IP = pCtx->GetIp ();
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+ #ifdef TARGET_UNIX
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+ #define PTR_TO_REG (ptr, reg ) (&((ptr)->reg ()))
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+ #else
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+ #define PTR_TO_REG (ptr, reg ) (&((ptr)->reg))
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+ #endif
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+
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#ifdef TARGET_ARM64
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- m_RegDisplay.pIP = PTR_TO_MEMBER (CONTEXT, pCtx, Pc);
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+ m_RegDisplay.pIP = (PTR_PCODE) PTR_TO_REG ( pCtx, Pc);
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//
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// preserved regs
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//
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- m_RegDisplay.pX19 = PTR_TO_MEMBER (CONTEXT, pCtx, X19);
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- m_RegDisplay.pX20 = PTR_TO_MEMBER (CONTEXT, pCtx, X20);
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- m_RegDisplay.pX21 = PTR_TO_MEMBER (CONTEXT, pCtx, X21);
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- m_RegDisplay.pX22 = PTR_TO_MEMBER (CONTEXT, pCtx, X22);
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- m_RegDisplay.pX23 = PTR_TO_MEMBER (CONTEXT, pCtx, X23);
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- m_RegDisplay.pX24 = PTR_TO_MEMBER (CONTEXT, pCtx, X24);
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- m_RegDisplay.pX25 = PTR_TO_MEMBER (CONTEXT, pCtx, X25);
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- m_RegDisplay.pX26 = PTR_TO_MEMBER (CONTEXT, pCtx, X26);
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- m_RegDisplay.pX27 = PTR_TO_MEMBER (CONTEXT, pCtx, X27);
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- m_RegDisplay.pX28 = PTR_TO_MEMBER (CONTEXT, pCtx, X28);
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- m_RegDisplay.pFP = PTR_TO_MEMBER (CONTEXT, pCtx, Fp);
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- m_RegDisplay.pLR = PTR_TO_MEMBER (CONTEXT, pCtx, Lr);
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+ m_RegDisplay.pX19 = (PTR_UIntNative) PTR_TO_REG ( pCtx, X19);
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+ m_RegDisplay.pX20 = (PTR_UIntNative) PTR_TO_REG ( pCtx, X20);
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+ m_RegDisplay.pX21 = (PTR_UIntNative) PTR_TO_REG ( pCtx, X21);
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+ m_RegDisplay.pX22 = (PTR_UIntNative) PTR_TO_REG ( pCtx, X22);
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+ m_RegDisplay.pX23 = (PTR_UIntNative) PTR_TO_REG ( pCtx, X23);
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+ m_RegDisplay.pX24 = (PTR_UIntNative) PTR_TO_REG ( pCtx, X24);
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+ m_RegDisplay.pX25 = (PTR_UIntNative) PTR_TO_REG ( pCtx, X25);
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+ m_RegDisplay.pX26 = (PTR_UIntNative) PTR_TO_REG ( pCtx, X26);
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+ m_RegDisplay.pX27 = (PTR_UIntNative) PTR_TO_REG ( pCtx, X27);
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+ m_RegDisplay.pX28 = (PTR_UIntNative) PTR_TO_REG ( pCtx, X28);
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+ m_RegDisplay.pFP = (PTR_UIntNative) PTR_TO_REG ( pCtx, Fp);
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+ m_RegDisplay.pLR = (PTR_UIntNative) PTR_TO_REG ( pCtx, Lr);
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//
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// scratch regs
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//
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- m_RegDisplay.pX0 = PTR_TO_MEMBER (CONTEXT, pCtx, X0);
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- m_RegDisplay.pX1 = PTR_TO_MEMBER (CONTEXT, pCtx, X1);
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- m_RegDisplay.pX2 = PTR_TO_MEMBER (CONTEXT, pCtx, X2);
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- m_RegDisplay.pX3 = PTR_TO_MEMBER (CONTEXT, pCtx, X3);
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- m_RegDisplay.pX4 = PTR_TO_MEMBER (CONTEXT, pCtx, X4);
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- m_RegDisplay.pX5 = PTR_TO_MEMBER (CONTEXT, pCtx, X5);
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- m_RegDisplay.pX6 = PTR_TO_MEMBER (CONTEXT, pCtx, X6);
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- m_RegDisplay.pX7 = PTR_TO_MEMBER (CONTEXT, pCtx, X7);
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- m_RegDisplay.pX8 = PTR_TO_MEMBER (CONTEXT, pCtx, X8);
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- m_RegDisplay.pX9 = PTR_TO_MEMBER (CONTEXT, pCtx, X9);
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- m_RegDisplay.pX10 = PTR_TO_MEMBER (CONTEXT, pCtx, X10);
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- m_RegDisplay.pX11 = PTR_TO_MEMBER (CONTEXT, pCtx, X11);
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- m_RegDisplay.pX12 = PTR_TO_MEMBER (CONTEXT, pCtx, X12);
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- m_RegDisplay.pX13 = PTR_TO_MEMBER (CONTEXT, pCtx, X13);
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- m_RegDisplay.pX14 = PTR_TO_MEMBER (CONTEXT, pCtx, X14);
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- m_RegDisplay.pX15 = PTR_TO_MEMBER (CONTEXT, pCtx, X15);
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- m_RegDisplay.pX16 = PTR_TO_MEMBER (CONTEXT, pCtx, X16);
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- m_RegDisplay.pX17 = PTR_TO_MEMBER (CONTEXT, pCtx, X17);
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- m_RegDisplay.pX18 = PTR_TO_MEMBER (CONTEXT, pCtx, X18);
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+ m_RegDisplay.pX0 = (PTR_UIntNative) PTR_TO_REG ( pCtx, X0);
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+ m_RegDisplay.pX1 = (PTR_UIntNative) PTR_TO_REG ( pCtx, X1);
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+ m_RegDisplay.pX2 = (PTR_UIntNative) PTR_TO_REG ( pCtx, X2);
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+ m_RegDisplay.pX3 = (PTR_UIntNative) PTR_TO_REG ( pCtx, X3);
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+ m_RegDisplay.pX4 = (PTR_UIntNative) PTR_TO_REG ( pCtx, X4);
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+ m_RegDisplay.pX5 = (PTR_UIntNative) PTR_TO_REG ( pCtx, X5);
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+ m_RegDisplay.pX6 = (PTR_UIntNative) PTR_TO_REG ( pCtx, X6);
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+ m_RegDisplay.pX7 = (PTR_UIntNative) PTR_TO_REG ( pCtx, X7);
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+ m_RegDisplay.pX8 = (PTR_UIntNative) PTR_TO_REG ( pCtx, X8);
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+ m_RegDisplay.pX9 = (PTR_UIntNative) PTR_TO_REG ( pCtx, X9);
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+ m_RegDisplay.pX10 = (PTR_UIntNative) PTR_TO_REG ( pCtx, X10);
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+ m_RegDisplay.pX11 = (PTR_UIntNative) PTR_TO_REG ( pCtx, X11);
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+ m_RegDisplay.pX12 = (PTR_UIntNative) PTR_TO_REG ( pCtx, X12);
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+ m_RegDisplay.pX13 = (PTR_UIntNative) PTR_TO_REG ( pCtx, X13);
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+ m_RegDisplay.pX14 = (PTR_UIntNative) PTR_TO_REG ( pCtx, X14);
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+ m_RegDisplay.pX15 = (PTR_UIntNative) PTR_TO_REG ( pCtx, X15);
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+ m_RegDisplay.pX16 = (PTR_UIntNative) PTR_TO_REG ( pCtx, X16);
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+ m_RegDisplay.pX17 = (PTR_UIntNative) PTR_TO_REG ( pCtx, X17);
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+ m_RegDisplay.pX18 = (PTR_UIntNative) PTR_TO_REG ( pCtx, X18);
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#elif defined(TARGET_X86) || defined(TARGET_AMD64)
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- m_RegDisplay.pIP = (PTR_PCODE)PTR_TO_MEMBER (CONTEXT, pCtx, Rip);
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+ m_RegDisplay.pIP = (PTR_PCODE)PTR_TO_REG ( pCtx, Rip);
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//
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// preserved regs
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//
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- m_RegDisplay.pRbp = (PTR_UIntNative)PTR_TO_MEMBER (CONTEXT, pCtx, Rbp);
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- m_RegDisplay.pRsi = (PTR_UIntNative)PTR_TO_MEMBER (CONTEXT, pCtx, Rsi);
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- m_RegDisplay.pRdi = (PTR_UIntNative)PTR_TO_MEMBER (CONTEXT, pCtx, Rdi);
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- m_RegDisplay.pRbx = (PTR_UIntNative)PTR_TO_MEMBER (CONTEXT, pCtx, Rbx);
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+ m_RegDisplay.pRbp = (PTR_UIntNative)PTR_TO_REG ( pCtx, Rbp);
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+ m_RegDisplay.pRsi = (PTR_UIntNative)PTR_TO_REG ( pCtx, Rsi);
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+ m_RegDisplay.pRdi = (PTR_UIntNative)PTR_TO_REG ( pCtx, Rdi);
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+ m_RegDisplay.pRbx = (PTR_UIntNative)PTR_TO_REG ( pCtx, Rbx);
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#ifdef TARGET_AMD64
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- m_RegDisplay.pR12 = (PTR_UIntNative)PTR_TO_MEMBER (CONTEXT, pCtx, R12);
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- m_RegDisplay.pR13 = (PTR_UIntNative)PTR_TO_MEMBER (CONTEXT, pCtx, R13);
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- m_RegDisplay.pR14 = (PTR_UIntNative)PTR_TO_MEMBER (CONTEXT, pCtx, R14);
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- m_RegDisplay.pR15 = (PTR_UIntNative)PTR_TO_MEMBER (CONTEXT, pCtx, R15);
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+ m_RegDisplay.pR12 = (PTR_UIntNative)PTR_TO_REG ( pCtx, R12);
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+ m_RegDisplay.pR13 = (PTR_UIntNative)PTR_TO_REG ( pCtx, R13);
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+ m_RegDisplay.pR14 = (PTR_UIntNative)PTR_TO_REG ( pCtx, R14);
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+ m_RegDisplay.pR15 = (PTR_UIntNative)PTR_TO_REG ( pCtx, R15);
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#endif // TARGET_AMD64
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//
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// scratch regs
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//
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- m_RegDisplay.pRax = (PTR_UIntNative)PTR_TO_MEMBER (CONTEXT, pCtx, Rax);
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- m_RegDisplay.pRcx = (PTR_UIntNative)PTR_TO_MEMBER (CONTEXT, pCtx, Rcx);
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- m_RegDisplay.pRdx = (PTR_UIntNative)PTR_TO_MEMBER (CONTEXT, pCtx, Rdx);
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+ m_RegDisplay.pRax = (PTR_UIntNative)PTR_TO_REG ( pCtx, Rax);
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+ m_RegDisplay.pRcx = (PTR_UIntNative)PTR_TO_REG ( pCtx, Rcx);
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+ m_RegDisplay.pRdx = (PTR_UIntNative)PTR_TO_REG ( pCtx, Rdx);
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#ifdef TARGET_AMD64
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- m_RegDisplay.pR8 = (PTR_UIntNative)PTR_TO_MEMBER (CONTEXT, pCtx, R8);
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- m_RegDisplay.pR9 = (PTR_UIntNative)PTR_TO_MEMBER (CONTEXT, pCtx, R9);
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- m_RegDisplay.pR10 = (PTR_UIntNative)PTR_TO_MEMBER (CONTEXT, pCtx, R10);
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- m_RegDisplay.pR11 = (PTR_UIntNative)PTR_TO_MEMBER (CONTEXT, pCtx, R11);
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+ m_RegDisplay.pR8 = (PTR_UIntNative)PTR_TO_REG ( pCtx, R8);
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+ m_RegDisplay.pR9 = (PTR_UIntNative)PTR_TO_REG ( pCtx, R9);
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+ m_RegDisplay.pR10 = (PTR_UIntNative)PTR_TO_REG ( pCtx, R10);
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+ m_RegDisplay.pR11 = (PTR_UIntNative)PTR_TO_REG ( pCtx, R11);
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#endif // TARGET_AMD64
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#else
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PORTABILITY_ASSERT (" StackFrameIterator::InternalInit" );
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#endif // TARGET_ARM
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+
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+ #undef PTR_TO_REG
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}
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PTR_VOID StackFrameIterator::HandleExCollide (PTR_ExInfo pExInfo)
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