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Revert "[arm64] Addressing modes for SIMD (#67490)" (#93981)
This reverts commit fa294c0.
1 parent 568ed41 commit 2dc7c31

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2 files changed

+1
-21
lines changed

2 files changed

+1
-21
lines changed

src/coreclr/jit/hwintrinsiccodegenarm64.cpp

Lines changed: 1 addition & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -379,21 +379,7 @@ void CodeGen::genHWIntrinsic(GenTreeHWIntrinsic* node)
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switch (intrin.numOperands)
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{
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case 1:
382-
if (intrin.op1->isContained())
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{
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assert(ins == INS_ld1);
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// Emit 'ldr target, [base, index]'
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GenTreeAddrMode* lea = intrin.op1->AsAddrMode();
388-
assert(lea->GetScale() == 1);
389-
assert(lea->Offset() == 0);
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GetEmitter()->emitIns_R_R_R(INS_ldr, emitSize, targetReg, lea->Base()->GetRegNum(),
391-
lea->Index()->GetRegNum());
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}
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else
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{
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GetEmitter()->emitIns_R_R(ins, emitSize, targetReg, op1Reg, opt);
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}
382+
GetEmitter()->emitIns_R_R(ins, emitSize, targetReg, op1Reg, opt);
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break;
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case 2:

src/coreclr/jit/lower.cpp

Lines changed: 0 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -6175,12 +6175,6 @@ bool Lowering::TryCreateAddrMode(GenTree* addr, bool isContainable, GenTree* par
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{
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return false;
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}
6178-
6179-
if (((scale | offset) != 0) && parent->OperIsHWIntrinsic())
6180-
{
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// For now we only support unscaled indices for SIMD loads
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return false;
6183-
}
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#endif
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61866180
if (scale == 0)

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