Update to not modify codegen based on set flags variable

Author: Quantum Hu

src/coreclr/jit/codegenarm.cpp

@@ -1271,14 +1271,7 @@ void CodeGen::genCodeForCompare(GenTreeOp* tree)
     {
         assert(!varTypeIsFloating(op2Type));
         var_types cmpType = (op1Type == op2Type) ? op1Type : TYP_INT;
-
-        // When comparing to constant zero, and descendant node (op1) set the flags, we can skip emitting the cmp
-        bool skipGenCmp = ((op1->gtFlags & GTF_SET_FLAGS) != 0) && op2->IsIntegralConst(0);
-
-        if (!skipGenCmp)
-        {
-            emit->emitInsBinary(INS_cmp, emitTypeSize(cmpType), op1, op2);
-        }
+        emit->emitInsBinary(INS_cmp, emitTypeSize(cmpType), op1, op2);
     }
 
     // Are we evaluating this into a register?

src/coreclr/jit/codegenarm64.cpp

@@ -4992,20 +4992,9 @@ void CodeGen::genCodeForJumpCompare(GenTreeOpCC* tree)
     {
         assert(op2->IsIntegralConst(0));
 
-        // It's possible the descendant node (op1) set the flags. If so, we don't need to compare again
-        bool genBranchOnly = (op1->gtFlags & GTF_SET_FLAGS) != 0;
+        instruction ins = (cc.GetCode() == GenCondition::EQ) ? INS_cbz : INS_cbnz;
 
-        instruction ins;
-        if (!genBranchOnly)
-        {
-            ins = (cc.GetCode() == GenCondition::EQ) ? INS_cbz : INS_cbnz;
-            GetEmitter()->emitIns_J_R(ins, attr, compiler->compCurBB->GetTrueTarget(), reg);
-        }
-        else
-        {
-            ins = (cc.GetCode() == GenCondition::EQ) ? INS_beq : INS_bne;
-            GetEmitter()->emitIns_J(ins, compiler->compCurBB->GetTrueTarget());
-        }
+        GetEmitter()->emitIns_J_R(ins, attr, compiler->compCurBB->GetTrueTarget(), reg);
     }
 
     // If we cannot fall into the false target, emit a jump to it

src/coreclr/jit/gentree.cpp

@@ -19951,8 +19951,8 @@ bool GenTree::SupportsSettingZeroFlag()
         return true;
     }
 #endif
-#elif defined(TARGET_ARM64)
-    if (OperIs(GT_AND))
+#elif defined(TARGET_ARM64) || defined(TARGET_ARM)
+    if (OperIs(GT_AND, GT_AND_NOT))
     {
         return true;
     }

src/coreclr/jit/lower.cpp

@@ -4314,9 +4314,10 @@ GenTree* Lowering::LowerJTrue(GenTreeOp* jtrue)
         genTreeOps   newOper  = GT_COUNT;
         GenCondition cc;
 
-        if (cond->OperIs(GT_EQ, GT_NE) && relopOp2->IsIntegralConst(0))
+        if (cond->OperIs(GT_EQ, GT_NE) && relopOp2->IsIntegralConst(0) && !relopOp1->SupportsSettingZeroFlag())
         {
             // Codegen will use cbz or cbnz in codegen which do not affect the flag register
+            // However if relopOp1 can set flags, then we do not need to compare and branch, can just branch
             newOper = GT_JCMP;
             cc      = GenCondition::FromRelop(cond);
         }

src/coreclr/jit/morph.cpp

@@ -8112,25 +8112,19 @@ GenTree* Compiler::fgMorphSmpOp(GenTree* tree, MorphAddrContext* mac, bool* optA
                 //    ~a & c ==/!= 0
                 // where c is a constant
                 // The optimization could also take the form of a & ~c but the comparison would have to switch between EQ to NE/NE to EQ
-                if (op1->OperIs(GT_AND) && varTypeIsIntegral(op1) && op2->IsIntegralConst())
+                if (op1->OperIs(GT_AND) && varTypeIsIntegral(op1) && op2->IsCnsIntOrI())
                 {
                     GenTree* andOp1 = op1->AsOp()->gtOp1;
                     GenTree* andOp2 = op1->AsOp()->gtOp2;
 
-                    ssize_t cnsVal = op2->AsIntCon()->IconValue();
-
-                    if (andOp1->TypeIs(TYP_INT, TYP_LONG) && andOp2->IsIntegralConst() && andOp2->AsIntCon()->IconValue() == cnsVal)
+                    if (andOp1->TypeIs(TYP_INT) && GenTree::Compare(op2, andOp2))
                     {
                         // Want GT_AND to look like AND(NOT(a), c) ==/!= a. The non-matching constant must be the one wrapped in NOT node
                         // so 2nd andOp will be the constant, so 1st andOp will have the NOT
                         GenTree* tmpNode = andOp2;
                         op1->AsOp()->gtOp2 = gtNewOperNode(GT_NOT, andOp1->TypeGet(), andOp1);
                         op1->AsOp()->gtOp1 = tmpNode;
-                        op2->AsIntConCommon()->SetIconValue(0);
-#if defined(TARGET_ARM) || defined(TARGET_ARM64)
-                        // If set for XARCH it will prevent ANDN instruction from being emitted
-                        op1->gtFlags |= GTF_SET_FLAGS;
-#endif
+                        op2->BashToZeroConst(op2->gtType);
                     }
                 }
             }