fix(audio): setup DMA RAM in DRAM2 for all uses

This fixes scratchy audio.

The problem was not setting enough DRAM2 (in terms of length)
as DMA RAM (specific settings such as non-cacheable etc. are
in `init_dma`).

So rather than try and set each allocation up, let's just set a
block of 32kb for everything to use. "Everything" at this point
is only the input and output audio buffer, but in the future will
be the circular buffer used for ADC DMA reads.

If we need more we can increase that.

Author: dobrite

src/audio.rs

@@ -136,8 +136,6 @@ impl Audio {
         i2c_sda: gpiob::PB11<Analog>,
 
         clocks: &rcc::CoreClocks,
-        mpu: &mut cortex_m::peripheral::MPU,
-        scb: &mut cortex_m::peripheral::SCB,
     ) -> Self {
         let rx_buffer: &'static mut [u32; DMA_BUFFER_SIZE] = unsafe { &mut RX_BUFFER };
         let dma_config = dma::dma::DmaConfig::default()
@@ -234,17 +232,11 @@ impl Audio {
         let input = Input::new(unsafe { &mut RX_BUFFER });
         let output = Output::new(unsafe { &mut TX_BUFFER });
 
-        let input_buffer_ptr: *mut u32 = unsafe { &mut RX_BUFFER[0] };
-        let output_buffer_ptr: *mut u32 = unsafe { &mut TX_BUFFER[0] };
-
         info!(
             "Setup up Audio DMA: input: {:?}, output: {:?}",
-            input_buffer_ptr, output_buffer_ptr
+            &input.buffer[0] as *const u32, &output.buffer[0] as *const u32
         );
 
-        crate::mpu::init_dma(mpu, scb, input_buffer_ptr, DMA_BUFFER_SIZE);
-        crate::mpu::init_dma(mpu, scb, output_buffer_ptr, DMA_BUFFER_SIZE);
-
         Audio {
             sai,
             input_stream,

src/system.rs

@@ -15,6 +15,9 @@ use stm32h7xx_hal::{
 
 use crate::{audio::Audio, *};
 
+const START_OF_DRAM2: u32 = 0x30000000;
+const DMA_MEM_SIZE: usize = 32 * 1024;
+
 const HSE_CLOCK_MHZ: MegaHertz = MegaHertz::from_raw(16);
 const HCLK_MHZ: MegaHertz = MegaHertz::from_raw(200);
 const HCLK2_MHZ: MegaHertz = MegaHertz::from_raw(200);
@@ -96,6 +99,14 @@ impl System {
         info!("Starting system init");
         let ccdr = Self::init_clocks(device.PWR, device.RCC, &device.SYSCFG);
 
+        info!("Setup up DMA RAM in DRAM2...");
+        crate::mpu::init_dma(
+            &mut core.MPU,
+            &mut core.SCB,
+            START_OF_DRAM2 as *mut u32,
+            DMA_MEM_SIZE,
+        );
+
         // log_clocks(&ccdr);
         let mut delay = Delay::new(core.SYST, ccdr.clocks);
         // Setup ADCs
@@ -221,8 +232,6 @@ impl System {
             gpioh.ph4,
             gpiob.pb11,
             &ccdr.clocks,
-            &mut core.MPU,
-            &mut core.SCB,
         );
 
         // Setup GPIOs