diff --git a/docs/Release_0_0_27-2019-12-16.html b/docs/Release_0_0_27-2019-12-16.html index 70623036..16c3d5c1 100644 --- a/docs/Release_0_0_27-2019-12-16.html +++ b/docs/Release_0_0_27-2019-12-16.html @@ -4,7 +4,7 @@ SKiDL — Version 0.0.27 Released! - + @@ -14,15 +14,15 @@ --> - + href="/" /> +
@@ -45,13 +45,13 @@

- Version 0.0.27 Released! + Version 0.0.27 Released!

It's been almost eleven months since I released a new version of SKiDL diff --git a/docs/Release_0_0_28-2019-12-17.html b/docs/Release_0_0_28-2019-12-17.html index 1ac4499b..36d3813c 100644 --- a/docs/Release_0_0_28-2019-12-17.html +++ b/docs/Release_0_0_28-2019-12-17.html @@ -4,7 +4,7 @@ SKiDL — Version 0.0.28 Released! - + @@ -14,15 +14,15 @@ --> - + href="/" /> +

@@ -45,13 +45,13 @@

- Version 0.0.28 Released! + Version 0.0.28 Released!

Well, that didn't last long.

diff --git a/docs/Release_0_0_30-2020-05-16.html b/docs/Release_0_0_30-2020-05-16.html index 5e09def9..8f9316af 100644 --- a/docs/Release_0_0_30-2020-05-16.html +++ b/docs/Release_0_0_30-2020-05-16.html @@ -4,7 +4,7 @@ SKiDL — Version 0.0.30 Released! - + @@ -14,15 +14,15 @@ --> - + href="/" /> +
@@ -45,13 +45,13 @@

- Version 0.0.30 Released! + Version 0.0.30 Released!

I'm releasing version 0.0.30 of SKiDL today! diff --git a/docs/a-taste-of-hierarchy-2017-02-03.html b/docs/a-taste-of-hierarchy-2017-02-03.html index 3ca1ba1e..e55b9c1d 100644 --- a/docs/a-taste-of-hierarchy-2017-02-03.html +++ b/docs/a-taste-of-hierarchy-2017-02-03.html @@ -4,7 +4,7 @@ SKiDL — A Taste of Hierarchy - + @@ -14,15 +14,15 @@ --> - + href="/" /> +

@@ -45,13 +45,13 @@

- A Taste of Hierarchy + A Taste of Hierarchy

In my previous blog posts, the SKiDL circuit descriptions were flat. diff --git a/docs/an-arduino-with-skidl-2017-04-01.html b/docs/an-arduino-with-skidl-2017-04-01.html index 140fb2d0..b15856de 100644 --- a/docs/an-arduino-with-skidl-2017-04-01.html +++ b/docs/an-arduino-with-skidl-2017-04-01.html @@ -4,7 +4,7 @@ SKiDL — An Arduino With SKiDL - + @@ -14,15 +14,15 @@ --> - + href="/" /> +

@@ -45,13 +45,13 @@

- An Arduino With SKiDL + An Arduino With SKiDL

It's April 1st. It's also Arduino Day. Really. That's not a joke.

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configuration used when building these files. When it is not found, a full rebuild will be done. -config: 2f5bcac9365d985a91a572bb131e4597 +config: a48b1f6bfc93dbee33bc6f9d14e0e728 tags: 645f666f9bcd5a90fca523b33c5a78b7 diff --git a/docs/api/html/_modules/index.html b/docs/api/html/_modules/index.html index 0b4dbf17..bec6652a 100644 --- a/docs/api/html/_modules/index.html +++ b/docs/api/html/_modules/index.html @@ -45,18 +45,17 @@

Navigation

All modules for which code is available

\ No newline at end of file diff --git a/docs/api/html/_modules/skidl/alias.html b/docs/api/html/_modules/skidl/alias.html index c52e67c8..1ce10460 100644 --- a/docs/api/html/_modules/skidl/alias.html +++ b/docs/api/html/_modules/skidl/alias.html @@ -50,7 +50,7 @@

Source code for skidl.alias

 # The MIT License (MIT) - Copyright (c) 2016-2021 Dave Vandenbout.
 
 """
-Handles aliases for Circuit, Part, Pin, Net, Bus, Interface objects.
+Handles aliases for Circuit, Part, Pin, Net, Bus objects.
 """
 
 from __future__ import (  # isort:skip
@@ -65,6 +65,8 @@ 

Source code for skidl.alias

 
 from future import standard_library
 
+from .utilities import flatten
+
 standard_library.install_aliases()
 
 
@@ -77,17 +79,16 @@ 

Source code for skidl.alias

     """
 
     def __init__(self, *aliases):
-        super().__init__()
-        self.__iadd__(*aliases)
+        super().__init__(flatten(aliases))
 
     def __iadd__(self, *aliases):
         """Add new aliases."""
-        for alias in aliases:
-            if isinstance(alias, (tuple, list, set)):
-                for a in list(alias):
-                    self.add(a)
-            else:
-                self.add(alias)
+        self.update(set(flatten(aliases)))
+        self.clean()  # Remove any empty stuff that was added.
+        return self
+
+    def __isub__(self, *aliases):
+        self.difference_update(flatten(aliases))
         return self
 
     def __str__(self):
@@ -145,7 +146,7 @@ 

Navigation

\ No newline at end of file diff --git a/docs/api/html/_modules/skidl/arrange.html b/docs/api/html/_modules/skidl/arrange.html deleted file mode 100644 index b2e69dab..00000000 --- a/docs/api/html/_modules/skidl/arrange.html +++ /dev/null @@ -1,406 +0,0 @@ - - - - - - - - - skidl.arrange — SKiDL documentation - - - - - - - - - - - - - -

- - - -
-
-
-
- -

Source code for skidl.arrange

-# -*- coding: utf-8 -*-
-
-# The MIT License (MIT) - Copyright (c) 2016-2021 Dave Vandenbout.
-
-"""
-Arrange part units for best schematic wiring.
-"""
-
-from __future__ import (  # isort:skip
-    absolute_import,
-    division,
-    print_function,
-    unicode_literals,
-)
-
-import math
-import re
-from builtins import str, super
-from collections import namedtuple
-from functools import reduce
-from random import randint
-
-from future import standard_library
-
-from .coord import *
-from .net import NCNet
-
-standard_library.install_aliases()
-
-
-# foreach net, record which part units are attached to each net.
-# assign each part unit to a region.
-# compute cost for placement:
-#     foreach region, sum the pins for the part units assigned to that region.
-#     foreach net:
-#         compute the bounding box.
-#         cost of the net is the square-root of the number of pins within its bounding box.
-#         add net cost to the total cost.
-#
-# compute cost of moving a part unit to another region:
-#     remove pins from source region and add to destination region.
-#     compute new cost
-
-
-
[docs]class Region(Point): - """Stores an (x,y) coord and a list of the parts stored within it.""" - - def __init__(self, x, y): - super().__init__(x, y) - self.clear() - -
[docs] def clear(self): - try: - for part in self.parts: - part.region = None - except AttributeError: - pass - self.parts = [] - self.num_pins = 0
- -
[docs] def add(self, part): - assert part not in self.parts - self.parts.append(part) - self.num_pins += len(part) - part.region = self - return self
- -
[docs] def rmv(self, part): - assert part in self.parts - self.parts.remove(part) - self.num_pins -= len(part) - part.region = None - assert part not in self.parts - return self
- -
[docs] def cost(self): - # Cost of a region is the sqrt of the number of pins on the parts in it. - return math.sqrt(self.num_pins)
- - -
[docs]class PartNet: - """Stores the parts attached to a particular net.""" - - def __init__(self, net): - # Find the set of parts having one or more pins attached to this net. - self.parts = set() - if not isinstance(net, NCNet): - # Add the part (or part unit) associated with each pin on the net. - for pin in net.get_pins(): - part = pin.part - for name, unit in part.unit.items(): - if pin in unit.pins: - break - else: - unit = part - self.parts.add(unit) - -
[docs] def calc_bbox(self): - # The bounding box of a net surrounds the regions - # of all the parts on the net. - self.bbox = BBox() - for part in list(self.parts): - self.bbox.add(part.region) - self.bbox.round()
- -
[docs] def cost(self, regions): - # The cost of a net is the sum of the costs of the regions - # within the bounding box of the net. - cst = 0 - self.calc_bbox() - for y in range(self.bbox.min.y, self.bbox.max.y + 1): - for x in range(self.bbox.min.x, self.bbox.max.x + 1): - cst += regions[x][y].cost() - return cst
- - -
[docs]class Arranger: - def __init__(self, circuit, grid_hgt=3, grid_wid=3): - """ - Create a W x H array of regions to store arrangement of circuit parts. - """ - self.w, self.h = grid_wid, grid_hgt - self.regions = [[Region(x, y) for y in range(self.h)] for x in range(self.w)] - self.parts = [] - for part in circuit.parts: - if part.unit: - # Append the units comprising a part. - for unit in part.unit.values(): - self.parts.append(unit) - else: - # Append the entire part if it isn't broken into units. - self.parts.append(part) - for part in self.parts: - part.move_box = BBox(Point(0, 0), Point(grid_wid - 1, grid_hgt - 1)) - self.nets = [PartNet(net) for net in circuit.nets if net.pins] - self.clear() - -
[docs] def clear(self): - """Clear the parts from the regions.""" - for x in range(self.w): - for y in range(self.h): - self.regions[x][y].clear()
- -
[docs] def cost(self): - """Compute the cost of the arrangement of parts to regions.""" - return sum([net.cost(self.regions) for net in self.nets])
- -
[docs] def apply(self): - """Apply an assignment stored in regions to parts.""" - for y in range(self.h): - for x in range(self.w): - region = self.regions[x][y] - for part in region.parts: - part.region = region
- -
[docs] def prearranged(self): - """Apply the (x,y) position of parts to update the regions.""" - self.clear() - for part in self.parts: - x, y = part.xy - self.regions[x][y].add(part)
- -
[docs] def arrange_randomly(self): - """Arrange the parts randomly across the regions.""" - self.clear() - for part in self.parts: - if hasattr(part, "fix"): - x, y = part.xy - else: - min_pt = part.move_box.min - max_pt = part.move_box.max - x = randint(min_pt.x, max_pt.x - 1) - y = randint(min_pt.y, max_pt.y - 1) - self.regions[x][y].add(part) - assert part.region == self.regions[x][y] - assert part in self.regions[x][y].parts
- -
[docs] def expand_grid(self, mul_hgt, mul_wid): - """Expand the number of rows/columns in the grid of regions.""" - new_regions = [ - [Region(x, y) for y in range(self.h * mul_hgt)] - for x in range(self.w * mul_wid) - ] - for part in self.parts: - x0, y0 = part.region.x * mul_wid, part.region.y * mul_hgt - x1, y1 = x0 + mul_wid - 1, y0 + mul_hgt - 1 - new_regions[x0][y0].add(part) - part.move_box = BBox(Point(x0, y0), Point(x1, y1)) - del self.regions - self.regions = new_regions - self.h *= mul_hgt - self.w *= mul_wid
- -
[docs] def arrange_kl(self): - """Optimally arrange the parts across regions using Kernighan-Lin.""" - - class Move: - # Class for storing the move of a part to a region. - def __init__(self, part, region, cost): - self.part = part # Part being moved. - self.region = region # Region being moved to. - self.cost = cost # Cost after the move. - - def kl_iteration(): - # Kernighan-Lin algorithm to optimize symbol placement: - # A. Compute cost of moving each part to each region while - # keeping all the other parts fixed. - # B. Select the part and region that has the lowest cost - # and move that part to that region. - # C. Repeat the A & B for the remaining parts until no - # parts remain. - # D. Find the point in the sequence of moves where the - # cost reaches its lowest value. Reverse all moves - # after that point. - - def find_best_move(parts): - # Find the best of all possible movements of parts to regions. - - # This stores the best move found across all parts & regions. - best_move = Move(None, None, float("inf")) - - # Move each part to each region, looking for the best cost improvement. - for part in parts: - - # Don't move a part that is fixed to a particular region. - if hasattr(part, "fix"): - continue - - # Save the region of the current part and remove the - # part from that region. - saved_region = part.region - saved_region.rmv(part) - assert part.region == None - assert part not in saved_region.parts - - # Move the current part to each region and store the move if cost goes down. - for x in range(part.move_box.min.x, part.move_box.max.x + 1): - for y in range(part.move_box.min.y, part.move_box.max.y + 1): - - # Don't move a part to the region it's already in. - if self.regions[x][y] is part.region: - continue - - # Move part to region. - self.regions[x][y].add(part) - - # Get cost when part is in that region. - cost = self.cost() - - # Record move if it's the best seen so far. - if cost < best_move.cost: - best_move = Move(part, part.region, cost) - - # Remove part from the region. - self.regions[x][y].rmv(part) - assert part.region == None - - # Return the part to its original region. - assert part.region == None - saved_region.add(part) - assert part in saved_region.parts - assert part.region == saved_region - - # Return the move with the lowest cost. - return best_move - - # Store the beginning arrangement of parts. - beginning_arrangement = {part: part.region for part in self.parts} - beginning_cost = self.cost() - - # Get the list of parts that can be moved. - movable = [part for part in self.parts if not hasattr(part, "fix")] - - # Process all the movable parts until every one has been moved. - moves = [] - while movable: - - # Find and save the best move of all the movable parts. - best_move = find_best_move(movable) - moves.append(best_move) - - # Move the selected part from the region where it was to its new region. - best_move.part.region.rmv(best_move.part) - best_move.region.add(best_move.part) - - # Remove the part from the list of removable parts once it has been moved. - movable.remove(best_move.part) - - # Find where the cost was lowest across the sequence of moves. - low_pt = min(moves, key=lambda mv: mv.cost) - low_pt_idx = moves.index(low_pt) - if low_pt.cost >= beginning_cost: - # No improvement in cost, so put everything back the way it was. - low_pt_idx = -1 - low_pt.cost = beginning_cost - - # Reverse all the part moves after the lowest point to their original regions. - for move in moves[low_pt_idx + 1 :]: - part = move.part - new_region = move.region - original_region = beginning_arrangement[part] - new_region.rmv(part) - original_region.add(part) - - # Recompute the cost. - cost = self.cost() - assert math.isclose(low_pt.cost, cost, rel_tol=0.0001) - return cost - - # Iteratively apply KL until cost doesn't go down anymore. - cost = self.cost() - best_cost = cost + 1 # Make it higher so the following loop will run. - while cost < best_cost: - best_cost = cost - cost = kl_iteration() - - assert math.isclose(best_cost, self.cost(), rel_tol=0.0001)
-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/docs/api/html/_modules/skidl/bus.html b/docs/api/html/_modules/skidl/bus.html index 0bf597a8..b4417ba7 100644 --- a/docs/api/html/_modules/skidl/bus.html +++ b/docs/api/html/_modules/skidl/bus.html @@ -60,18 +60,28 @@

Source code for skidl.bus

     unicode_literals,
 )
 
+import builtins
+import re
 from builtins import range, str, super
 
 from future import standard_library
 
 from .alias import Alias
-from .common import *
 from .logger import active_logger
 from .net import NET_PREFIX, Net
 from .netpinlist import NetPinList
 from .pin import Pin
 from .skidlbaseobj import SkidlBaseObject
-from .utilities import *
+from .utilities import (
+    expand_indices,
+    filter_list,
+    find_num_copies,
+    flatten,
+    from_iadd,
+    get_unique_name,
+    list_or_scalar,
+    rmv_iadd,
+)
 
 # Prefix for implicit buses.
 BUS_PREFIX = "B$"
@@ -104,8 +114,7 @@ 

Source code for skidl.bus

     def get(cls, name, circuit=None):
         """Get the bus with the given name from a circuit, or return None."""
 
-        if not circuit:
-            circuit = builtins.default_circuit
+        circuit = circuit or default_circuit
 
         search_params = (
             ("name", name, True),
@@ -127,7 +136,7 @@ 

Source code for skidl.bus

     def fetch(cls, name, *args, **attribs):
         """Get the bus with the given name from a circuit, or create it if not found."""
 
-        circuit = attribs.get("circuit", builtins.default_circuit)
+        circuit = attribs.get("circuit", default_circuit)
         return cls.get(name, circuit=circuit) or cls(name, *args, **attribs)
def __init__(self, *args, **attribs): @@ -231,6 +240,10 @@

Source code for skidl.bus

         """It's an error to get the list of pins attached to all bus lines."""
         active_logger.raise_("Can't get the list of pins on a bus!")
+ @property + def pins(self): + return self.get_pins() +
[docs] def copy(self, num_copies=None, **attribs): """ Make zero or more copies of this bus. @@ -443,22 +456,24 @@

Source code for skidl.bus

         When setting the bus name, if another bus with the same name
         is found, the name for this bus is adjusted to make it unique.
         """
-        return self._name
+        return super(Bus, self).name
 
     @name.setter
     def name(self, name):
         # Remove the existing name so it doesn't cause a collision if the
         # object is renamed with its existing name.
-        self._name = None
+        del self.name
 
         # Now name the object with the given name or some variation
         # of it that doesn't collide with anything else in the list.
-        self._name = get_unique_name(self.circuit.buses, "name", BUS_PREFIX, name)
+        super(Bus, self.__class__).name.fset(
+            self, get_unique_name(self.circuit.buses, "name", BUS_PREFIX, name)
+        )
 
     @name.deleter
     def name(self):
         """Delete the bus name."""
-        del self._name
+        super(Bus, self.__class__).name.fdel(self)
 
     def __str__(self):
         """Return a list of the nets in this bus as a string."""
@@ -518,7 +533,7 @@ 

Navigation

\ No newline at end of file diff --git a/docs/api/html/_modules/skidl/circuit.html b/docs/api/html/_modules/skidl/circuit.html index 31f5e0cf..9f4d674e 100644 --- a/docs/api/html/_modules/skidl/circuit.html +++ b/docs/api/html/_modules/skidl/circuit.html @@ -62,34 +62,41 @@

Source code for skidl.circuit

 
 import functools
 import json
-import os.path
+import re
 import subprocess
 import time
 from builtins import range, str, super
-from collections import defaultdict, deque
+from collections import Counter, deque
 
 import graphviz
 from future import standard_library
 
-from .arrange import Arranger
 from .bus import Bus
 from .common import builtins
 from .erc import dflt_circuit_erc
-from .interface import Interface
+from .group import Group
 from .logger import active_logger, erc_logger
 from .net import NCNet, Net
 from .part import Part, PartUnit
 from .pckg_info import __version__
 from .pin import Pin
-from .protonet import ProtoNet
 from .schlib import SchLib
-from .scriptinfo import *
+from .scriptinfo import get_script_name, get_skidl_trace
 from .skidlbaseobj import SkidlBaseObject
-from .utilities import *
+from .utilities import (
+    expand_buses,
+    flatten,
+    num_to_chars,
+    opened,
+    reset_get_unique_name,
+)
 
 standard_library.install_aliases()
 
 
+HIER_SEP = "."  # Separator for hierarchy labels.
+
+
 
[docs]class Circuit(SkidlBaseObject): """ Class object that holds the entire netlist of parts and nets. @@ -131,6 +138,10 @@

Source code for skidl.circuit

 
[docs] def mini_reset(self, init=False): """Clear any circuitry but don't erase any loaded part libraries.""" + # Group.reset() + + self.group_name_cntr = Counter() + self.name = "" self.parts = [] self.nets = [] @@ -173,7 +184,7 @@

Source code for skidl.circuit

 
[docs] def add_hierarchical_name(self, name): """Record a new hierarchical name. Throw an error if it is a duplicate.""" if name in self._hierarchical_names: - active_loggerraise_( + active_logger.raise_( ValueError, "Can't add duplicate hierarchical name {} to this circuit.".format( name @@ -193,6 +204,39 @@

Source code for skidl.circuit

                 ),
             )
+
[docs] def activate(self, name, tag): + """Save the previous hierarchical group and activate a new one.""" + + # Create a name for this group from the concatenated names of all + # the nested contexts that were called on all the preceding levels + # that led to this one. Also, add a distinct tag to the current + # name to disambiguate multiple uses of the same function. This is + # either specified as an argument, or an incrementing value is used. + grp_hier_name = self.hierarchy + HIER_SEP + name + if tag is None: + tag = self.group_name_cntr[grp_hier_name] + self.group_name_cntr[grp_hier_name] += 1 + + # Save the context from which this was called. + self.context.append((default_circuit, self.hierarchy)) + + # Create a new hierarchical name in the activated context. + self.hierarchy = self.hierarchy + HIER_SEP + name + str(tag) + self.add_hierarchical_name(self.hierarchy) + + # Setup some globals needed in this context. + builtins.default_circuit = self + builtins.NC = self.NC # pylint: disable=undefined-variable
+ +
[docs] def deactivate(self): + """Deactivate the current hierarchical group and return to the previous one.""" + + # Restore the context that existed before this one was created. + # This does not remove the circuitry since it has already been + # added to the part and net lists. + builtins.default_circuit, self.hierarchy = self.context.pop() + builtins.NC = default_circuit.NC
+
[docs] def add_parts(self, *parts): """Add some Part objects to the circuit.""" for part in parts: @@ -434,7 +478,7 @@

Source code for skidl.circuit

             if net is self.NC:
                 # Exclude no-connect net.
                 continue
-            if not net.get_pins():
+            if not net.pins:
                 # Exclude empty nets with no attached pins.
                 continue
             for n in distinct_nets:
@@ -480,10 +524,20 @@ 

Source code for skidl.circuit

         for net in self.nets:
             net.merge_names()
 
+    def _check_for_empty_footprints(self):
+        """Make sure part footprints aren't empty before generating netlist/PCB."""
+
+        for part in self.parts:
+            if getattr(part, "footprint", "") == "":
+                import skidl
+
+                skidl.empty_footprint_handler(part)
+
     def _preprocess(self):
         self.instantiate_packages()
         # self._cull_unconnected_parts()
         self._merge_net_names()
+        self._check_for_empty_footprints()
 
 
[docs] def ERC(self, *args, **kwargs): """Run class-wide and local ERC functions on this circuit.""" @@ -522,6 +576,7 @@

Source code for skidl.circuit

         """
 
         from . import skidl
+        from .tools import tool_modules
 
         # Reset the counters to clear any warnings/errors from previous run.
         active_logger.error.reset()
@@ -537,16 +592,7 @@ 

Source code for skidl.circuit

         file_ = kwargs.pop("file_", None)
         do_backup = kwargs.pop("do_backup", True)
 
-        try:
-            gen_func = getattr(self, "_gen_netlist_{}".format(tool))
-            netlist = gen_func(**kwargs)  # Pass any remaining arguments.
-        except KeyError:
-            active_logger.raise_(
-                ValueError,
-                "Can't generate netlist in an unknown ECAD tool format ({}).".format(
-                    tool
-                ),
-            )
+        netlist = tool_modules[tool].gen_netlist(self, **kwargs)
 
         active_logger.report_summary("generating netlist")
 
@@ -570,12 +616,13 @@ 

Source code for skidl.circuit

                 containing a file name, or None.
             tool: The EDA tool the netlist will be generated for.
             do_backup: If true, create a library with all the parts in the circuit.
-
+            fp_libs: List of directories containing footprint libraries.
         Returns:
             None.
         """
 
         from . import skidl
+        from .tools import tool_modules
 
         # Reset the counters to clear any warnings/errors from previous run.
         active_logger.error.reset()
@@ -587,26 +634,18 @@ 

Source code for skidl.circuit

         #     Get EDA tool the netlist will be generated for.
         #     Get file the netlist will be stored in (if any).
         #     Get flag controlling the generation of a backup library.
+        #     Get list of footprint libraries.
         tool = kwargs.pop("tool", skidl.get_default_tool())
         file_ = kwargs.pop("file_", None)
         do_backup = kwargs.pop("do_backup", True)
+        fp_libs = kwargs.pop("fp_libs", None)
 
         if not self.no_files:
-            try:
-                gen_func = getattr(self, "_gen_pcb_{}".format(tool))
-            except KeyError:
-                active_logger.raise_(
-                    ValueError,
-                    "Can't generate PCB in an unknown ECAD tool format ({}).".format(
-                        tool
-                    ),
-                )
-            else:
-                if do_backup:
-                    self.backup_parts()  # Create a new backup lib for the circuit parts.
-                    global backup_lib  # Clear out any old backup lib so the new one
-                    backup_lib = None  #   will get reloaded when it's needed.
-                gen_func(file_)  # Generate the PCB file from the netlist.
+            if do_backup:
+                self.backup_parts()  # Create a new backup lib for the circuit parts.
+                global backup_lib  # Clear out any old backup lib so the new one
+                backup_lib = None  #   will get reloaded when it's needed.
+            tool_modules[tool].gen_pcb(self, file_, fp_libs=fp_libs)
 
         active_logger.report_summary("creating PCB")
@@ -617,12 +656,14 @@

Source code for skidl.circuit

         Args:
             file_: Either a file object that can be written to, or a string
                 containing a file name, or None.
+            tool: Backend tool such as KICAD.
 
         Returns:
             A string containing the netlist.
         """
 
         from . import skidl
+        from .tools import tool_modules
 
         # Reset the counters to clear any warnings/errors from previous run.
         active_logger.error.reset()
@@ -630,17 +671,8 @@ 

Source code for skidl.circuit

 
         self._preprocess()
 
-        if tool is None:
-            tool = skidl.get_default_tool()
-
-        try:
-            gen_func = getattr(self, "_gen_xml_{}".format(tool))
-            netlist = gen_func()
-        except KeyError:
-            active_logger.raise_(
-                ValueError,
-                "Can't generate XML in an unknown ECAD tool format ({}).".format(tool),
-            )
+        tool = tool or skidl.get_default_tool()
+        netlist = tool_modules[tool].gen_xml(self)
 
         active_logger.report_summary("generating XML")
 
@@ -815,6 +847,19 @@ 

Source code for skidl.circuit

 
         return "\n".join(head_svg + part_svg + tail_svg)
+
[docs] def get_net_nc_stubs(self): + """Get all nets/buses that are stubs or no-connects.""" + + # Search all nets for those set as stubs or that are no-connects. + stubs = [ + n for n in self.nets if getattr(n, "stub", False) or isinstance(n, NCNet) + ] + + # Also find buses that are set as stubs and add their individual nets. + stubs.extend(expand_buses([b for b in self.buses if getattr(b, "stub", False)])) + + return stubs
+
[docs] def generate_svg(self, file_=None, tool=None): """ Create an SVG file displaying the circuit schematic and @@ -830,14 +875,7 @@

Source code for skidl.circuit

         self._preprocess()
 
         # Get the list of nets which will be routed and not represented by stubs.
-        # Search all nets for those set as stubs or that are no-connects.
-        net_stubs = [
-            n for n in self.nets if getattr(n, "stub", False) or isinstance(n, NCNet)
-        ]
-        # Also find buses that are set as stubs and add their individual nets.
-        net_stubs.extend(
-            expand_buses([b for b in self.buses if getattr(b, "stub", False)])
-        )
+        net_stubs = self.get_net_nc_stubs()
         routed_nets = list(set(self.nets) - set(net_stubs))
 
         # Assign each routed net a unique integer. Interconnected nets
@@ -975,51 +1013,23 @@ 

Source code for skidl.circuit

 
         return schematic_json
-
[docs] def generate_schematic(self, file_=None, tool=None): +
[docs] def generate_schematic(self, **kwargs): """ - Create a schematic file. THIS DOES NOT WORK! + Create a schematic from a Circuit. """ - class Router: - def __init__(self, circuit): - pass + import skidl - def do_route(self): - pass - - from . import skidl + from .tools import tool_modules # Reset the counters to clear any warnings/errors from previous run. - active_logger.active_logger.active_logger.error.reset() + active_logger.error.reset() active_logger.warning.reset() self._preprocess() - if tool is None: - tool = skidl.get_default_tool() - - w, h = 5, 5 - arranger = Arranger(self, w, h) - arranger.arrange_randomly() - arranger.arrange_kl() - - for part in self.parts: - part.generate_pinboxes() - - router = Router(self) - route = router.do_route() - - if not self.no_files: - try: - gen_func = getattr(self, "_gen_schematic_{}".format(tool)) - gen_func(route) - except KeyError: - active_logger.raise_( - ValueError, - "Can't generate schematic in an unknown ECAD tool format ({}).".format( - tool - ), - ) + tool = kwargs.pop("tool", skidl.get_default_tool()) + tool_modules[tool].gen_schematic(self, **kwargs) active_logger.report_summary("generating schematic")
@@ -1083,7 +1093,7 @@

Source code for skidl.circuit

             if n.name not in split_nets:
                 dot.node(n.name, shape=net_shape, xlabel=xlabel)
 
-            for j, pin in enumerate(n.get_pins()):
+            for j, pin in enumerate(n.pins):
                 net_ref = n.name
                 pin_part_ref = pin.part.ref
 
@@ -1150,82 +1160,6 @@ 

Source code for skidl.circuit

             file_ = skidl.BACKUP_LIB_FILE_NAME
 
         lib.export(libname=skidl.BACKUP_LIB_NAME, file_=file_)
- - -__func_name_cntr = defaultdict(int) - - -
[docs]def SubCircuit(f): - """ - A @SubCircuit decorator is used to create hierarchical circuits. - - Args: - f: The function containing SKiDL statements that represents a subcircuit. - """ - - @functools.wraps(f) - def sub_f(*args, **kwargs): - # Upon entry, save the reference to the current default Circuit object. - save_default_circuit = default_circuit # pylint: disable=undefined-variable - - # If the subcircuit uses the 'circuit' argument, then set the default - # Circuit object to that. Otherwise, use the current default Circuit object. - circuit = kwargs.pop("circuit", default_circuit) - builtins.default_circuit = circuit - - # Setup some globals needed in the subcircuit. - builtins.NC = default_circuit.NC # pylint: disable=undefined-variable - - # Invoking the subcircuit function creates circuitry at a level one - # greater than the current level. (The top level is zero.) - circuit.level += 1 - - # Create a name for this subcircuit from the concatenated names of all - # the nested subcircuit functions that were called on all the preceding levels - # that led to this one. Also, add a distinct tag to the current - # function name to disambiguate multiple uses of the same function. This is - # either specified as an argument, or an incrementing value is used. - tag = kwargs.pop("tag", None) - if tag is None: - tag = __func_name_cntr[f.__name__] - __func_name_cntr[f.__name__] = __func_name_cntr[f.__name__] + 1 - circuit.hierarchy = circuit.context[-1][0] + "." + f.__name__ + str(tag) - circuit.add_hierarchical_name(circuit.hierarchy) - - # Store the context so it can be used if this subcircuit function - # invokes another subcircuit function within itself to add more - # levels of hierarchy. - circuit.context.append((circuit.hierarchy,)) - - # Call the function to create whatever circuitry it handles. - # The arguments to the function are usually nets to be connected to the - # parts instantiated in the function, but they may also be user-specific - # and have no effect on the mechanics of adding parts or nets although - # they may direct the function as to what parts and nets get created. - # Store any results it returns as a list. These results are user-specific - # and have no effect on the mechanics of adding parts or nets. - results = f(*args, **kwargs) - - # Restore the context that existed before the subcircuitry was - # created. This does not remove the circuitry since it has already been - # added to the parts and nets lists. - circuit.context.pop() - - # Restore the hierarchy label and level. - circuit.hierarchy = circuit.context[-1][0] - circuit.level -= 1 - - # Restore the default circuit and globals. - builtins.default_circuit = save_default_circuit - builtins.NC = default_circuit.NC # pylint: disable=undefined-variable - - return results - - return sub_f
- - -# The decorator can also be called as "@subcircuit". -subcircuit = SubCircuit
@@ -1264,7 +1198,7 @@

Navigation

\ No newline at end of file diff --git a/docs/api/html/_modules/skidl/coord.html b/docs/api/html/_modules/skidl/coord.html deleted file mode 100644 index 3277983f..00000000 --- a/docs/api/html/_modules/skidl/coord.html +++ /dev/null @@ -1,165 +0,0 @@ - - - - - - - - - skidl.coord — SKiDL documentation - - - - - - - - - - - - - -

- - - -
-
-
-
- -

Source code for skidl.coord

-# -*- coding: utf-8 -*-
-
-# The MIT License (MIT) - Copyright (c) 2016-2021 Dave Vandenbout.
-
-import math
-from copy import copy, deepcopy
-
-"""
-Coordinates, mostly for working with converting symbols to SVG.
-"""
-
-
-
[docs]class Point: - def __init__(self, x, y): - self.x = x - self.y = y - - def __add__(self, pt): - if not isinstance(pt, Point): - npt = Point(pt, pt) - return self + npt - return Point(self.x + pt.x, self.y + pt.y) - - def __sub__(self, pt): - if not isinstance(pt, Point): - npt = Point(pt, pt) - return self - npt - return Point(self.x - pt.x, self.y - pt.y) - - def __mul__(self, m): - return Point(m * self.x, m * self.y) - -
[docs] def round(self): - try: - self.x = int(round(self.x)) - self.y = int(round(self.y)) - except OverflowError: - # Point with coords set as math.inf. - pass
- - -
[docs]class BBox: - def __init__(self, *pts): - inf = float("inf") - self.min = Point(inf, inf) - self.max = Point(-inf, -inf) - self.add(*pts) - -
[docs] def add(self, *objs): - for obj in objs: - if isinstance(obj, Point): - self.min = Point(min(self.min.x, obj.x), min(self.min.y, obj.y)) - self.max = Point(max(self.max.x, obj.x), max(self.max.y, obj.y)) - elif isinstance(obj, BBox): - self.min.x = min(self.min.x, obj.min.x) - self.min.y = min(self.min.y, obj.min.y) - self.max.x = max(self.max.x, obj.max.x) - self.max.y = max(self.max.y, obj.max.y) - else: - raise NotImplementedError
- - @property - def area(self): - return self.w * self.h - -
[docs] def round(self): - self.min.round() - self.max.round()
- - @property - def w(self): - return abs(self.max.x - self.min.x) - - @property - def h(self): - return abs(self.max.y - self.min.y)
-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/docs/api/html/_modules/skidl/erc.html b/docs/api/html/_modules/skidl/erc.html index 110663ad..8eeb131d 100644 --- a/docs/api/html/_modules/skidl/erc.html +++ b/docs/api/html/_modules/skidl/erc.html @@ -139,7 +139,7 @@

Source code for skidl.erc

         return
 
     # Check the number of pins attached to the net.
-    pins = net.get_pins()
+    pins = net.pins
     num_pins = len(pins)
     if num_pins == 0:
         active_logger.warning("No pins attached to net {n}.".format(n=net.name))
@@ -208,7 +208,7 @@ 

Navigation

\ No newline at end of file diff --git a/docs/api/html/_modules/skidl/interface.html b/docs/api/html/_modules/skidl/interface.html index 1713eeed..2d157e57 100644 --- a/docs/api/html/_modules/skidl/interface.html +++ b/docs/api/html/_modules/skidl/interface.html @@ -71,7 +71,14 @@

Source code for skidl.interface

 from .pin import Pin
 from .protonet import ProtoNet
 from .skidlbaseobj import SkidlBaseObject
-from .utilities import *
+from .utilities import (
+    expand_indices,
+    filter_list,
+    from_iadd,
+    list_or_scalar,
+    rmv_iadd,
+    to_list,
+)
 
 standard_library.install_aliases()
 
@@ -282,7 +289,7 @@ 

Navigation

\ No newline at end of file diff --git a/docs/api/html/_modules/skidl/libs/convert_libs.html b/docs/api/html/_modules/skidl/libs/convert_libs.html index a577f4da..03d9d720 100644 --- a/docs/api/html/_modules/skidl/libs/convert_libs.html +++ b/docs/api/html/_modules/skidl/libs/convert_libs.html @@ -101,7 +101,7 @@

Navigation

\ No newline at end of file diff --git a/docs/api/html/_modules/skidl/logger.html b/docs/api/html/_modules/skidl/logger.html index 0a5caefe..2a5e0202 100644 --- a/docs/api/html/_modules/skidl/logger.html +++ b/docs/api/html/_modules/skidl/logger.html @@ -157,6 +157,9 @@

Source code for skidl.logger

 
[docs] def debug(self, msg, *args, **kwargs): super().debug(msg + self.get_trace(), *args, **kwargs)
+
[docs] def summary(self, msg, *args, **kwargs): + super().info(msg, *args, **kwargs)
+
[docs] def info(self, msg, *args, **kwargs): super().info(msg + self.get_trace(), *args, **kwargs)
@@ -189,17 +192,15 @@

Source code for skidl.logger

             phase_desc (string): description of the phase of operations (e.g. "generating netlist").
         """
         if (self.error.count, self.warning.count) == (0, 0):
-            sys.stderr.write(
-                "\nNo errors or warnings found while {}.\n\n".format(phase_desc)
-            )
+            self.summary("No errors or warnings found while {}.\n".format(phase_desc))
         else:
-            sys.stderr.write(
-                "\n{} warnings found while {}.\n".format(
+            self.summary(
+                "{} warnings found while {}.".format(
                     active_logger.warning.count, phase_desc
                 )
             )
-            sys.stderr.write(
-                "{} errors found while {}.\n\n".format(
+            self.summary(
+                "{} errors found while {}.\n".format(
                     active_logger.error.count, phase_desc
                 )
             )
@@ -250,13 +251,13 @@

Source code for skidl.logger

 
     # Errors & warnings always appear on the terminal.
     handler = logging.StreamHandler(sys.stderr)
-    handler.setLevel(logging.WARNING)
+    handler.setLevel(logging.INFO)
     handler.setFormatter(logging.Formatter(log_msg_id + "%(levelname)s: %(message)s"))
     logger.addHandler(handler)
 
     # Errors and warnings are stored in a log file with the top-level script's name.
     handler = SkidlLogFileHandler(get_script_name() + log_file_suffix, mode="w")
-    handler.setLevel(logging.WARNING)
+    handler.setLevel(logging.INFO)
     handler.setFormatter(logging.Formatter(log_msg_id + "%(levelname)s: %(message)s"))
     logger.addHandler(handler)
 
@@ -326,7 +327,7 @@ 

Navigation

\ No newline at end of file diff --git a/docs/api/html/_modules/skidl/net.html b/docs/api/html/_modules/skidl/net.html index 6e66a459..dbc9d044 100644 --- a/docs/api/html/_modules/skidl/net.html +++ b/docs/api/html/_modules/skidl/net.html @@ -61,6 +61,7 @@

Source code for skidl.net

 )
 
 import collections
+import re
 from builtins import range, super
 from copy import copy, deepcopy
 
@@ -69,7 +70,17 @@ 

Source code for skidl.net

 from .erc import dflt_net_erc
 from .logger import active_logger
 from .skidlbaseobj import SkidlBaseObject
-from .utilities import *
+from .utilities import (
+    expand_buses,
+    expand_indices,
+    filter_list,
+    find_num_copies,
+    flatten,
+    from_iadd,
+    get_unique_name,
+    rmv_iadd,
+    set_iadd,
+)
 
 standard_library.install_aliases()
 
@@ -104,8 +115,7 @@ 

Source code for skidl.net

 
         from .alias import Alias
 
-        if not circuit:
-            circuit = default_circuit
+        circuit = circuit or default_circuit
 
         search_params = (("name", name, True), ("aliases", name, True))
 
@@ -136,7 +146,7 @@ 

Source code for skidl.net

         self._valid = True  # Make net valid before doing anything else.
         self.do_erc = True
         self._drive = Pin.drives.NONE
-        self.pins = []
+        self._pins = []
         self.circuit = None
         self.code = None  # This is the net number used in a KiCad netlist file.
 
@@ -171,21 +181,21 @@ 

Source code for skidl.net

         prev_nets = set([self])
         nets = set([self])
         prev_pins = set([])
-        pins = set(self.pins)
+        pins = set(self._pins)
         while pins != prev_pins:
 
             # Add the nets attached to any unvisited pins.
             for pin in pins - prev_pins:
                 # No use visiting a pin that is not connected to a net.
                 if pin.is_connected():
-                    nets |= set(pin.get_nets())
+                    nets |= set(pin.nets)
 
             # Update the set of previously visited pins.
             prev_pins = copy(pins)
 
             # Add the pins attached to any unvisited nets.
             for net in nets - prev_nets:
-                pins |= set(net.pins)
+                pins |= set(net._pins)
 
             # Update the set of previously visited nets.
             prev_nets = copy(nets)
@@ -207,15 +217,23 @@ 

Source code for skidl.net

         self.test_validity()
         return self._traverse().pins
+ @property + def pins(self): + return self.get_pins() +
[docs] def get_nets(self): """Return a list of nets attached to this net, including this net.""" self.test_validity() return self._traverse().nets
+ @property + def nets(self): + return self.get_nets() +
[docs] def is_attached(self, pin_net_bus): """Return true if the pin, net or bus is attached to this one.""" if isinstance(pin_net_bus, Net): - return pin_net_bus in self.get_nets() + return pin_net_bus in self.nets if isinstance(pin_net_bus, Pin): return pin_net_bus.is_attached(self) if isinstance(pin_net_bus, Bus): @@ -237,7 +255,7 @@

Source code for skidl.net

 
         from .circuit import Circuit
 
-        return not isinstance(self.circuit, Circuit) or not self.pins
+ return not isinstance(self.circuit, Circuit) or not self._pins
[docs] def copy(self, num_copies=None, circuit=None, **attribs): """ @@ -299,7 +317,7 @@

Source code for skidl.net

         # because what happens if a pin is connected to the copy? Then we have
         # to search for all the other copies to add the pin to those.
         # And what's the value of that?
-        if self.pins:
+        if self._pins:
             active_logger.raise_(
                 ValueError,
                 "Can't make copies of a net that already has " "pins attached to it!",
@@ -465,20 +483,20 @@ 

Source code for skidl.net

                 return
 
             # If this net has pins, just attach the other net to one of them.
-            if self.pins:
-                self.pins[0].nets.append(net)
-                net.pins.append(self.pins[0])
+            if self._pins:
+                self._pins[0].nets.append(net)
+                net._pins.append(self._pins[0])
             # If the other net has pins, attach this net to a pin on the other net.
-            elif net.pins:
-                net.pins[0].nets.append(self)
-                self.pins.append(net.pins[0])
+            elif net._pins:
+                net._pins[0].nets.append(self)
+                self._pins.append(net._pins[0])
             # If neither net has any pins, then attach a phantom pin to one net
             # and then connect the nets together.
             else:
                 p = PhantomPin()
                 connect_pin(p)
-                self.pins[0].nets.append(net)
-                net.pins.append(self.pins[0])
+                self._pins[0].nets.append(net)
+                net._pins.append(self._pins[0])
 
             # Update the drive of the merged nets. When setting the drive of a
             # net the net drive will be the maximum of its current drive or the
@@ -495,11 +513,11 @@ 

Source code for skidl.net

 
         def connect_pin(pin):
             """Connect a pin to this net."""
-            if pin not in self.pins:
+            if pin not in self._pins:
                 if not pin.is_connected():
                     # Remove the pin from the no-connect net if it is attached to it.
                     pin.disconnect()
-                self.pins.append(pin)
+                self._pins.append(pin)
                 pin.nets.append(self)
             return
 
@@ -572,7 +590,7 @@ 

Source code for skidl.net

 
[docs] def disconnect(self, pin): """Remove the pin from this net but not any other nets it's attached to.""" try: - self.pins.remove(pin) + self._pins.remove(pin) except ValueError: return # Pin wasn't in the list, so abort. @@ -636,7 +654,7 @@

Source code for skidl.net

             )
 
         # Assign the same name to all the nets that are connected to this net.
-        nets = self.get_nets()
+        nets = self.nets
         selected_name = getattr(select_name(nets), "name")
         for net in nets:
             # Assign the name directly to each net. Using the name property
@@ -685,25 +703,17 @@ 

Source code for skidl.net

 
         import skidl
 
-        if tool is None:
-            tool = skidl.get_default_tool()
+        from .tools import tool_modules
+
+        tool = tool or skidl.get_default_tool()
 
         self.test_validity()
 
         # Don't add anything to the netlist if no pins are on this net.
-        if not self.get_pins():
+        if not self.pins:
             return
 
-        try:
-            gen_func = getattr(self, "_gen_netlist_net_{}".format(tool))
-            return gen_func()
-        except AttributeError:
-            active_logger.raise_(
-                ValueError,
-                "Can't generate netlist in an unknown ECAD tool format ({}).".format(
-                    tool
-                ),
-            )
+ return tool_modules[tool].gen_netlist_net(self)
[docs] def generate_xml_net(self, tool=None): """ @@ -715,28 +725,22 @@

Source code for skidl.net

 
         import skidl
 
-        if tool is None:
-            tool = skidl.get_default_tool()
+        from .tools import tool_modules
+
+        tool = tool or skidl.get_default_tool()
 
         self.test_validity()
 
         # Don't add anything to the XML if no pins are on this net.
-        if not self.get_pins():
+        if not self.pins:
             return
 
-        try:
-            gen_func = getattr(self, "_gen_xml_net_{}".format(tool))
-            return gen_func()
-        except AttributeError:
-            active_logger.raise_(
-                ValueError,
-                "Can't generate XML in an unknown ECAD tool format ({}).".format(tool),
-            )
+ return tool_modules[tool].gen_xml_net(self)
def __str__(self): """Return a list of the pins on this net as a string.""" self.test_validity() - pins = self.get_pins() + pins = self.pins return ( self.name + ": " + ", ".join([p.__str__() for p in sorted(pins, key=str)]) ) @@ -746,11 +750,7 @@

Source code for skidl.net

     def __len__(self):
         """Return the number of pins attached to this net."""
         self.test_validity()
-        pins = self.get_pins()
-        return len(pins)
-
-
[docs] def replace_spec_chars_in_name(self): - self._name = re.sub(r"\W", "_", self._name)
+ return len(self.pins) @property def width(self): @@ -765,7 +765,7 @@

Source code for skidl.net

         When setting the net name, if another net with the same name
         is found, the name for this net is adjusted to make it unique.
         """
-        return self._name
+        return super(Net, self).name
 
     @name.setter
     def name(self, name):
@@ -773,16 +773,18 @@ 

Source code for skidl.net

         self.test_validity()
         # Remove the existing name so it doesn't cause a collision if the
         # object is renamed with its existing name.
-        self._name = None
+        del self.name
 
         # Now name the object with the given name or some variation
         # of it that doesn't collide with anything else in the list.
-        self._name = get_unique_name(self.circuit.nets, "name", NET_PREFIX, name)
+        super(Net, self.__class__).name.fset(
+            self, get_unique_name(self.circuit.nets, "name", NET_PREFIX, name)
+        )
 
     @name.deleter
     def name(self):
         self.test_validity()
-        del self._name
+        super(Net, self.__class__).name.fdel(self)
 
     @property
     def netclass(self):
@@ -815,7 +817,7 @@ 

Source code for skidl.net

         # A net class can only be assigned if there is no existing net class
         # or if the existing net class matches the net class parameter (in
         # which case this is redundant).
-        nets = self.get_nets()  # Get all interconnected subnets.
+        nets = self.nets  # Get all interconnected subnets.
         netclasses = set([getattr(n, "_netclass", None) for n in nets])
         netclasses.discard(None)
         if len(netclasses) == 0:
@@ -840,7 +842,7 @@ 

Source code for skidl.net

     @netclass.deleter
     def netclass(self):
         self.test_validity()
-        nets = self.get_nets()  # Get all interconnected subnets.
+        nets = self.nets  # Get all interconnected subnets.
         for n in nets:
             try:
                 del self._netclass
@@ -857,14 +859,14 @@ 

Source code for skidl.net

         maximum drive value of the pins currently on the net.
         """
         self.test_validity()
-        nets = self.get_nets()  # Get all interconnected subnets.
+        nets = self.nets  # Get all interconnected subnets.
         max_drive = max(nets, key=lambda n: n._drive)._drive
         return max_drive
 
     @drive.setter
     def drive(self, drive):
         self.test_validity()
-        nets = self.get_nets()  # Get all interconnected subnets.
+        nets = self.nets  # Get all interconnected subnets.
         max_drive = max(nets, key=lambda n: n._drive)._drive
         max_drive = max(drive, max_drive)
         for n in nets:
@@ -873,7 +875,7 @@ 

Source code for skidl.net

     @drive.deleter
     def drive(self):
         self.test_validity()
-        nets = self.get_nets()  # Get all interconnected subnets.
+        nets = self.nets  # Get all interconnected subnets.
         for n in nets:
             del n._drive
 
@@ -986,7 +988,7 @@ 

Navigation

\ No newline at end of file diff --git a/docs/api/html/_modules/skidl/netclass.html b/docs/api/html/_modules/skidl/netclass.html index 2c8666ca..41aa8b87 100644 --- a/docs/api/html/_modules/skidl/netclass.html +++ b/docs/api/html/_modules/skidl/netclass.html @@ -63,7 +63,6 @@

Source code for skidl.netclass

 from future import standard_library
 
 from .logger import active_logger
-from .utilities import *
 
 standard_library.install_aliases()
 
@@ -127,7 +126,7 @@ 

Navigation

\ No newline at end of file diff --git a/docs/api/html/_modules/skidl/netlist_to_skidl.html b/docs/api/html/_modules/skidl/netlist_to_skidl.html index 17b76c81..5dc27df5 100644 --- a/docs/api/html/_modules/skidl/netlist_to_skidl.html +++ b/docs/api/html/_modules/skidl/netlist_to_skidl.html @@ -248,7 +248,7 @@

Navigation

\ No newline at end of file diff --git a/docs/api/html/_modules/skidl/netlist_to_skidl_main.html b/docs/api/html/_modules/skidl/netlist_to_skidl_main.html deleted file mode 100644 index 156d6a44..00000000 --- a/docs/api/html/_modules/skidl/netlist_to_skidl_main.html +++ /dev/null @@ -1,213 +0,0 @@ - - - - - - - - - skidl.netlist_to_skidl_main — SKiDL documentation - - - - - - - - - - - - - -

- - - -
-
-
-
- -

Source code for skidl.netlist_to_skidl_main

-# -*- coding: utf-8 -*-
-
-# The MIT License (MIT) - Copyright (c) 2016-2021 Dave Vandenbout.
-
-"""
-Command-line program to convert a netlist into an equivalent SKiDL program.
-"""
-
-from __future__ import (  # isort:skip
-    absolute_import,
-    division,
-    print_function,
-    unicode_literals,
-)
-
-import argparse
-import logging
-import os
-import shutil
-import sys
-from builtins import open
-
-from future import standard_library
-
-from .netlist_to_skidl import netlist_to_skidl
-from .pckg_info import __version__
-
-standard_library.install_aliases()
-
-
-###############################################################################
-# Command-line interface.
-###############################################################################
-
-
-
[docs]def main(): - parser = argparse.ArgumentParser( - description="A Python package for textually describing circuit schematics." - ) - parser.add_argument( - "--version", "-v", action="version", version="skidl " + __version__ - ) - parser.add_argument( - "--input", - "-i", - nargs=1, - type=str, - metavar="file.net", - help="Netlist input file.", - ) - parser.add_argument( - "--output", - "-o", - nargs=1, - type=str, - metavar="file.py", - help="Output file for SKiDL code.", - ) - parser.add_argument( - "--overwrite", "-w", action="store_true", help="Overwrite an existing file." - ) - parser.add_argument( - "--nobackup", - "-nb", - action="store_true", - help="Do *not* create backups before modifying files. " - + "(Default is to make backup files.)", - ) - parser.add_argument( - "--debug", - "-d", - nargs="?", - type=int, - default=0, - metavar="LEVEL", - help="Print debugging info. (Larger LEVEL means more info.)", - ) - - args = parser.parse_args() - - logger = logging.getLogger("netlist_to_skidl") - if args.debug is not None: - log_level = logging.DEBUG + 1 - args.debug - handler = logging.StreamHandler(sys.stdout) - handler.setLevel(log_level) - logger.addHandler(handler) - logger.setLevel(log_level) - - if args.input is None: - logger.critical("Hey! Give me some netlist files!") - sys.exit(2) - - if args.output is None: - print("Hey! I need some place where I can store the SKiDL code!") - sys.exit(1) - - for file in args.output: - if os.path.isfile(file): - if not args.overwrite and args.nobackup: - logger.critical( - "File {} already exists! Use the --overwrite option to " - + "allow modifications to it or allow backups.".format(file) - ) - sys.exit(1) - if not args.nobackup: - # Create a backup file. - index = 1 # Start with this backup file suffix. - while True: - backup_file = file + ".{}.bak".format(index, file) - if not os.path.isfile(backup_file): - # Found an unused backup file name, so make backup. - shutil.copy(file, backup_file) - break # Backup done, so break out of loop. - index += 1 # Else keep looking for an unused backup file name. - - skidl_code = netlist_to_skidl(args.input[0]) - open(args.output[0], "w").write(skidl_code)
- - -############################################################################### -# Main entrypoint. -############################################################################### -if __name__ == "__main__": - main() -
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/docs/api/html/_modules/skidl/netpinlist.html b/docs/api/html/_modules/skidl/netpinlist.html index 238cdcc2..0cf6decf 100644 --- a/docs/api/html/_modules/skidl/netpinlist.html +++ b/docs/api/html/_modules/skidl/netpinlist.html @@ -70,9 +70,7 @@

Source code for skidl.netpinlist

 from .network import Network
 from .pin import Pin
 from .protonet import ProtoNet
-
-# from .skidlbaseobj import SkidlBaseObject
-from .utilities import *
+from .utilities import expand_buses, flatten, set_iadd
 
 standard_library.install_aliases()
 
@@ -270,7 +268,7 @@ 

Navigation

\ No newline at end of file diff --git a/docs/api/html/_modules/skidl/network.html b/docs/api/html/_modules/skidl/network.html index 99048647..d19f612c 100644 --- a/docs/api/html/_modules/skidl/network.html +++ b/docs/api/html/_modules/skidl/network.html @@ -60,12 +60,11 @@

Source code for skidl.network

     unicode_literals,
 )
 
-from builtins import range, super
+from builtins import super
 
 from future import standard_library
 
 from .logger import active_logger
-from .utilities import *
 
 standard_library.install_aliases()
 
@@ -209,7 +208,7 @@ 

Navigation

\ No newline at end of file diff --git a/docs/api/html/_modules/skidl/note.html b/docs/api/html/_modules/skidl/note.html index 13293ff1..90b58c8d 100644 --- a/docs/api/html/_modules/skidl/note.html +++ b/docs/api/html/_modules/skidl/note.html @@ -143,7 +143,7 @@

Navigation

\ No newline at end of file diff --git a/docs/api/html/_modules/skidl/package.html b/docs/api/html/_modules/skidl/package.html index 68bdac2d..473ff29d 100644 --- a/docs/api/html/_modules/skidl/package.html +++ b/docs/api/html/_modules/skidl/package.html @@ -66,7 +66,7 @@

Source code for skidl.package

 from future import standard_library
 
 from .bus import Bus
-from .circuit import subcircuit
+from .group import subcircuit
 from .interface import Interface
 from .net import Net
 from .part import NETLIST
@@ -85,7 +85,8 @@ 

Source code for skidl.package

         for k, v in list(kwargs.items()):
             self[k] = v  # Use __setitem__ so both dict item and attribute are created.
 
-    def __call__(self, *args, **kwargs):
+    def __call__(self, **kwargs):
+        # def __call__(self, *args, **kwargs):
         """Create a copy of a package."""
 
         # Get circuit that will contain the package subcircuitry.
@@ -94,24 +95,31 @@ 

Source code for skidl.package

         # See if this package should be instantiated into the netlist or used as a template.
         dest = kwargs.pop("dest", NETLIST)
 
-        pckg = Package(**self.copy())  # Create a shallow copy of the package.
+        # Create a blank Package object.
+        pckg = Package()
 
-        # Set the circuit that the ProtoNets belong to. Also, make copies of any
-        # implicit buses or nets that were specified as default I/Os in the
-        # package definition.
-        for k, v in pckg.items():
+        # Add I/O and anything else to the blank Package.
+        for k, v in self.items():
             if isinstance(v, ProtoNet):
-                v.circuit = circuit
+                pckg[k] = copy(v)
+                pckg[k].circuit = circuit
             elif isinstance(v, (Net, Bus)):
                 if v.is_implicit():
-                    pckg[k] = v.__class__()
-                    # pckg[k] = v.copy()
-
+                    pckg[k] = v.__class__(circuit=circuit)
+                else:
+                    # Should this use copy()?
+                    pckg[k] = v
+                    pckg[k].circuit = circuit
+            else:
+                pckg[k] = v
+
+        # Add passed-in attributes to the package.
         # Don't use update(). It doesn't seem to call __setitem__.
         for k, v in list(kwargs.items()):
             pckg[k] = v  # Use __setitem__ so both dict item and attribute are created.
 
-        pckg.subcircuit = self.subcircuit  # Assign subcircuit creation function.
+        # Assign subcircuit creation function.
+        pckg.subcircuit = self.subcircuit
 
         # Remove creation function so it's not passed as a parameter.
         del pckg["subcircuit"]
@@ -205,7 +213,7 @@ 

Navigation

\ No newline at end of file diff --git a/docs/api/html/_modules/skidl/part.html b/docs/api/html/_modules/skidl/part.html index 8dfa64a7..23acfe28 100644 --- a/docs/api/html/_modules/skidl/part.html +++ b/docs/api/html/_modules/skidl/part.html @@ -62,17 +62,27 @@

Source code for skidl.part

 
 import functools
 import re
-from builtins import dict, int, object, range, str, super, zip
+from builtins import dict, int, object, range, str, super
 from copy import copy
 from random import randint
 
 from future import standard_library
 
-from .common import *
 from .erc import dflt_part_erc
 from .logger import active_logger
 from .skidlbaseobj import SkidlBaseObject
-from .utilities import *
+from .utilities import (
+    add_unique_attr,
+    expand_indices,
+    filter_list,
+    find_num_copies,
+    flatten,
+    from_iadd,
+    get_unique_name,
+    list_or_scalar,
+    rmv_iadd,
+    to_list,
+)
 
 standard_library.install_aliases()
 
@@ -184,7 +194,7 @@ 

Source code for skidl.part

         connections=None,
         part_defn=None,
         circuit=None,
-        ref_prefix="U",
+        ref_prefix="",
         ref=None,
         tag=None,
         pin_splitters=None,
@@ -195,7 +205,7 @@ 

Source code for skidl.part

         import skidl
 
         from .schlib import SchLib
-        from .tools import SKIDL
+        from .tools import SKIDL, add_xspice_io
 
         super().__init__()
 
@@ -209,9 +219,7 @@ 

Source code for skidl.part

         self.p = PinNumberSearch(self)  # Does pin search using only pin numbers.
         self.n = PinNameSearch(self)  # Does pin search using only pin names.
         self.name = name  # Assign initial part name.
-        self.description = ""  # Make sure there is a description, even if empty.
         self._ref = ""  # Provide a member for holding a reference.
-        self.ref_prefix = ref_prefix  # Store the part reference prefix.
         self.tool = tool  # Initial type of part (SKIDL, KICAD, etc.)
         self.circuit = None  # Part starts off unassociated with any circuit.
         self.match_pin_regex = False  # Don't allow regex matches of pin names.
@@ -225,7 +233,7 @@ 

Source code for skidl.part

                 try:
                     lib = SchLib(filename=libname, tool=tool)
                 except FileNotFoundError as e:
-                    if skidl.QUERY_BACKUP_LIB:
+                    if skidl.get_query_backup_lib():
                         active_logger.warning(
                             'Could not load KiCad schematic library "{}", falling back to backup library.'.format(
                                 libname
@@ -260,7 +268,7 @@ 

Source code for skidl.part

             if tool_version:
                 self.tool_version = tool_version
 
-            self.parse(get_name_only=(dest != NETLIST))
+            self.parse(partial_parse=(dest != NETLIST))
 
         # If the part is destined for a SKiDL library, then it will be defined
         # by the additional attribute values that are passed.
@@ -279,7 +287,12 @@ 

Source code for skidl.part

         # Setup the tag for tieing the part to a footprint in a pcb editor.
         # Do this before adding the part to the circuit or an exception will occur
         # because the part can't give its hierarchical name to the circuit.
-        self.tag = tag or str(randint(0, 2 ** 64 - 1))
+        self.tag = tag or str(randint(0, 2**64 - 1))
+
+        # Override the reference prefix if it was passed as a parameter.
+        # If nothing was set, default to using "U".
+        # This MUST be done before adding the part to a circuit below!
+        self.ref_prefix = ref_prefix or getattr(self, "ref_prefix", "") or "U"
 
         if dest != LIBRARY:
             if dest == NETLIST:
@@ -298,7 +311,10 @@ 

Source code for skidl.part

                     net += self[pin]
 
         # Add any XSPICE I/O as pins. (This only happens with SPICE simulations.)
-        self.add_xspice_io(kwargs.pop("io", []))
+        add_xspice_io(self, kwargs.pop("io", []))
+
+        # Make sure there is a description, even if empty.
+        self.description = getattr(self, "description", "")
 
         # Set the part reference if one was explicitly provided.
         if ref:
@@ -311,36 +327,13 @@ 

Source code for skidl.part

         # If any pins were added, make sure they're associated with the part.
         self.associate_pins()
 
-
[docs] def add_xspice_io(self, io): - """ - Add XSPICE I/O to the pins of a part. - """ - from .pin import Pin, PinList - - if not io: - return - - # Change a string into a list with a single string element. - if isinstance(io, basestring): - io = [io] + # Make sure the part name is also included in the list of aliases + # because part searching only checks the aliases for name matches. + self.aliases += name - # Join all the pin name arguments into a comma-separated string and then split them into a list. - ios = re.split(INDEX_SEPARATOR, ",".join(io)) - - # Add a pin to the part for each pin name. - for i, arg in enumerate(ios): - arg = arg.strip() # Strip any spaces that may have been between pin names. - - # If [pin_name] or pin_name[], then add a PinList to the part. Don't use - # part.add_pins() because it will flatten the PinList and add nothing since - # the PinList is empty. - if arg[0] + arg[-1] == "[]": - self.pins.append(PinList(num=i, name=arg[1:-1], part=self)) - elif arg[-2:] == "[]": - self.pins.append(PinList(num=i, name=arg[0:-2], part=self)) - else: - # Add a simple, non-vector pin. - self.add_pins(Pin(num=i, name=arg))
+ @property + def ordered_pins(self): + return sorted(self.pins)
[docs] @classmethod def get(cls, text, circuit=None): @@ -360,24 +353,49 @@

Source code for skidl.part

             either their reference, name, alias, or their description.
         """
 
-        if not circuit:
-            circuit = default_circuit
+        circuit = circuit or default_circuit
 
         search_params = (
             ("ref", text, True),
-            ("name", text, True),
+            # ("name", text, True), # Redundant: name is already replicated in aliases.
             ("aliases", text, True),
             ("description", text, False),
         )
 
         parts = []
-        for attr, name, do_str_match in search_params:
+        for attr, value, do_str_match in search_params:
             parts.extend(
-                filter_list(circuit.parts, do_str_match=do_str_match, **{attr: name})
+                filter_list(circuit.parts, do_str_match=do_str_match, **{attr: value})
             )
 
         return list_or_scalar(parts)
+
[docs] def similarity(self, part): + """Return a measure of how similar two parts are. + + Args: + part (Part): The part to compare to for similarity. + + Returns: + Float value for similarity (larger means more similar). + """ + + # Every part starts off somewhat similar to another. + score = 1 + + if self.description == part.description: + score += 1 + if self.name == part.name: + score += 1 + if self.value == part.value: + score += 1 + elif self.ref_prefix == part.ref_prefix: + score += 1 + if self.value == part.value: + score += 1 + + return score
+ def _find_min_max_pins(self): """Return the minimum and maximum pin numbers for the part.""" pin_nums = [] @@ -396,28 +414,19 @@

Source code for skidl.part

             # This happens if the part has no integer-labeled pins.
             return 0, 0
 
-
[docs] def parse(self, get_name_only=False): +
[docs] def parse(self, partial_parse=False): """ Create a part from its stored part definition. Args: - get_name_only: When true, just get the name and aliases for the + partial_parse: When true, just get the name and aliases for the part. Leave the rest unparsed. """ - # Get the function to parse the part description. - try: - parse_func = getattr(self, "_parse_lib_part_{}".format(self.tool)) - except AttributeError: - active_logger.raise_( - ValueError, - "Can't create a part with an unknown ECAD tool file format: {}.".format( - self.tool - ), - ) + from .tools import tool_modules # Parse the part description. - parse_func(get_name_only)
+ tool_modules[self.tool].parse_lib_part(self, partial_parse)
[docs] def associate_pins(self): """ @@ -461,6 +470,7 @@

Source code for skidl.part

         from .circuit import Circuit
         from .part import NETLIST
         from .pin import Pin
+        from .tools import add_xspice_io
 
         # If the number of copies is None, then a single copy will be made
         # and returned as a scalar (not a list). Otherwise, the number of
@@ -507,8 +517,8 @@ 

Source code for skidl.part

             # The shallow copy will just put references to the pins of the
             # original into the copy, so create independent copies of the pins.
             cpy.pins = []
-            cpy += [p.copy() for p in self.pins]  # Add pin and its attribute.
-            cpy.pin_aliases_to_attributes()  # Add pin aliases as part attributes.
+            # Add pin with part attribute set to the newly copied part.
+            cpy += [p.copy(part=cpy) for p in self.pins]
 
             # If the part copy is intended as a template, then disconnect its pins
             # from any circuit nets.
@@ -516,9 +526,6 @@ 

Source code for skidl.part

                 for p in cpy.pins:
                     p.disconnect()
 
-            # Make sure all the pins have a reference to this new part copy.
-            cpy.associate_pins()
-
             # Make new objects for searching the copy's pin numbers and names.
             cpy.p = PinNumberSearch(cpy)
             cpy.n = PinNameSearch(cpy)
@@ -554,7 +561,7 @@ 

Source code for skidl.part

                 circuit += cpy
 
             # Add any XSPICE I/O as pins to the part.
-            cpy.add_xspice_io(io)
+            add_xspice_io(cpy, io)
 
             # Enter any new attributes.
             for k, v in list(attribs.items()):
@@ -613,8 +620,8 @@ 

Source code for skidl.part

             self.pins.append(pin)
             # Create attributes so pin can be accessed by name or number such
             # as part.ENBL or part.p5.
-            add_unique_attr(self, pin.name, pin)
-            add_unique_attr(self, "p" + str(pin.num), pin)
+            pin.aliases += pin.name
+            pin.aliases += "p" + str(pin.num)
         return self
__iadd__ = add_pins @@ -762,6 +769,12 @@

Source code for skidl.part

                     pins.extend(tmp_pins)
                     continue
 
+        # Log an error if no pins were selected using the pin ids.
+        if not pins:
+            active_logger.error(
+                "No pins found using {self.ref}[{pin_ids}]".format(**locals())
+            )
+
         return list_or_scalar(pins)
# Get pins from a part using brackets, e.g. [1,5:9,'A[0-9]+']. @@ -798,11 +811,31 @@

Source code for skidl.part

         # was made to the pin, which is not allowed.
         active_logger.raise_(TypeError, "Can't assign to a part! Use the += operator.")
 
+    def __getattr__(self, attr):
+        """Normal attribute wasn't found, so check pin aliases."""
+
+        # Look for the attribute name in the list of pin aliases.
+        pins = [pin for pin in self if pin.aliases == attr]
+
+        if pins:
+            # Return the pin/pins if one or more alias matches were found.
+            return list_or_scalar(pins)
+
+        # No pin aliases matched, so use the __getattr__ for the subclass.
+        # Don't use super(). It leads to long runtimes under Python 2.7.
+        return SkidlBaseObject.__getattr__(self, attr)
+
     def __iter__(self):
         """
         Return an iterator for stepping thru individual pins of the part.
         """
-        return (p for p in self.pins)  # Return generator expr.
+
+        # Get the list pf pins for this part using the getattribute for the
+        # basest object to prevent infinite recursion within the __getattr__ method.
+        # Don't use super() because it leads to long runtimes under Python 2.7.
+        self_pins = object.__getattribute__(self, "pins")
+
+        return (p for p in self_pins)  # Return generator expr.
 
 
[docs] def is_connected(self): """ @@ -831,8 +864,8 @@

Source code for skidl.part

         if not nets:
             return False
 
-        for pin in self.get_pins():
-            for net in pin.get_nets():
+        for pin in self:
+            for net in pin.nets:
                 if net in nets:
                     return True
         return False
@@ -855,54 +888,12 @@

Source code for skidl.part

             or not self.pins
         )
-
[docs] def set_pin_alias(self, alias, *pin_ids, **criteria): - """ - Set the alias for a part pin. - - Args: - alias: The alias for the pin. - pin_ids: A list of strings containing pin names, numbers, - regular expressions, slices, lists or tuples. - - Keyword Args: - criteria: Key/value pairs that specify attribute values the - pin must have in order to be selected. - - Returns: - Nothing. - """ - - from .alias import Alias - from .pin import Pin - - pin = self.get_pins(*pin_ids, **criteria) - if isinstance(pin, Pin): - # Alias the single pin that was found. - pin.aliases += alias - # Add the name of the aliased pin as an attribute to the part, - # so it will act just like a pin for making connections. - add_unique_attr(self, alias, pin) - else: - # Error: either 0 or multiple pins were found. - active_logger.raise_(ValueError, "Cannot set alias for {}".format(pin_ids))
- -
[docs] def pin_aliases_to_attributes(self): - """Make each pin alias into an attribute of the part.""" - - for pin in self: - for alias in pin.aliases: - add_unique_attr(self, alias, pin)
-
[docs] def split_pin_names(self, delimiters): """Use chars in delimiters to split pin names and add as aliases to each pin.""" - if delimiters: for pin in self: # Split pin name and add subnames as aliases to the pin. - pin.split_name(delimiters) - - # Add the pin aliases as attributes to the part. - self.pin_aliases_to_attributes()
+ pin.split_name(delimiters)
[docs] def make_unit(self, label, *pin_ids, **criteria): """ @@ -925,7 +916,7 @@

Source code for skidl.part

         """
 
         # Warn if the unit label collides with any of the part's pin names.
-        collisions = self.get_pins("^" + label + "$")  # Look for exact match.
+        collisions = [pin for pin in self if pin.aliases == label]
         if collisions:
             active_logger.warning(
                 "Using a label ({}) for a unit of {} that matches one or more of it's pin names ({})!".format(
@@ -935,10 +926,23 @@ 

Source code for skidl.part

 
         # Create the part unit.
         self.unit[label] = PartUnit(self, label, *pin_ids, **criteria)
+
+        # Add a unique identifier to the unit.
         add_unique_attr(self, label, self.unit[label])
 
         return self.unit[label]
+
[docs] def grab_pins(self): + """Grab pins back from PartUnits.""" + + for unit in self.unit.values(): + unit.release_pins()
+ +
[docs] def release_pins(self): + """A Part can't release pins back to its PartUnits, so do nothing.""" + + pass
+
[docs] def create_network(self): """Create a network from the pins of a part.""" from .network import Network @@ -1035,23 +1039,14 @@

Source code for skidl.part

 
         import skidl
 
-        if tool is None:
-            tool = skidl.get_default_tool()
+        from .tools import tool_modules
+
+        tool = tool or skidl.get_default_tool()
 
         # Create part value as a string so including it in netlist isn't a problem.
         self.value_str = self._value_to_str()
 
-        try:
-            gen_func = getattr(self, "_gen_netlist_comp_{}".format(tool))
-        except AttributeError:
-            active_logger.raise_(
-                ValueError,
-                "Can't generate netlist in an unknown ECAD tool format ({}).".format(
-                    tool
-                ),
-            )
-
-        return gen_func()
+ return tool_modules[tool].gen_netlist_comp(self)
[docs] def generate_xml_component(self, tool=None): """ @@ -1063,21 +1058,14 @@

Source code for skidl.part

 
         import skidl
 
-        if tool is None:
-            tool = skidl.get_default_tool()
+        from .tools import tool_modules
+
+        tool = tool or skidl.get_default_tool()
 
         # Create part value as a string so including it in XML isn't a problem.
         self.value_str = self._value_to_str()
 
-        try:
-            gen_func = getattr(self, "_gen_xml_comp_{}".format(tool))
-        except AttributeError:
-            active_logger.raise_(
-                ValueError,
-                "Can't generate XML in an unknown ECAD tool format ({}).".format(tool),
-            )
-
-        return gen_func()
+ return tool_modules[tool].gen_xml_comp(self)
[docs] def generate_svg_component(self, symtx="", tool=None, net_stubs=None): """ @@ -1086,42 +1074,11 @@

Source code for skidl.part

 
         import skidl
 
-        if tool is None:
-            tool = skidl.get_default_tool()
+        from .tools import tool_modules
 
-        try:
-            gen_func = getattr(self, "_gen_svg_comp_{}".format(tool))
-        except AttributeError:
-            active_logger.raise_(
-                ValueError,
-                "Can't generate SVG for a component in an unknown ECAD tool format({}).".format(
-                    tool
-                ),
-            )
+        tool = tool or skidl.get_default_tool()
 
-        return gen_func(symtx=symtx, net_stubs=net_stubs)
- -
[docs] def generate_pinboxes(self, tool=None): - """ - Generate the pinboxes for arranging parts in a schematic. - """ - - import skidl - - if tool is None: - tool = skidl.get_default_tool() - - try: - gen_func = getattr(self, "_gen_pinboxes_{}".format(tool)) - except AttributeError: - active_logger.raise_( - ValueError, - "Can't generate pinboxes for a component in an unknown ECAD tool format({}).".format( - tool - ), - ) - - return gen_func()
+ return tool_modules[tool].gen_svg_comp(self, symtx=symtx, net_stubs=net_stubs)
[docs] def erc_desc(self): """Create description of part for ERC and other error reporting.""" @@ -1131,7 +1088,7 @@

Source code for skidl.part

         """Return a description of the pins on this part as a string."""
         return "\n {name} ({aliases}): {desc}\n    {pins}".format(
             name=self.name,
-            aliases=", ".join(getattr(self, "aliases", "")),
+            aliases=", ".join(self.aliases),
             desc=self.description,
             pins="\n    ".join([p.__str__() for p in self.pins]),
         )
@@ -1166,9 +1123,22 @@ 

Source code for skidl.part

         # Return the string after removing all the non-ascii stuff (like ohm symbols).
         return "Part(**{{ {} }})".format(", ".join(attribs))
+
[docs] def convert_for_spice(self, spice_part, pin_map): + """Convert a Part object for use with SPICE. + + Args: + spice_part (Part): The type of SPICE Part to be converted to. + pin_map (dict): Dict with pin numbers/names of self as keys and num/names of spice_part pins as replacement values. + """ + from .tools import convert_for_spice + + convert_for_spice(self, spice_part, pin_map)
+ @property def hierarchical_name(self): - return getattr(self, "hierarchy", "") + "." + self._tag + from .circuit import HIER_SEP + + return getattr(self, "hierarchy", "") + HIER_SEP + self._tag @property def tag(self): @@ -1201,7 +1171,7 @@

Source code for skidl.part

     def tag(self):
         """Delete the part tag."""
         # Part's can't have a None tag, so set a new random tag.
-        self.tag = randint(0, 2 ** 64 - 1)
+        self.tag = randint(0, 2**64 - 1)
 
     @property
     def ref(self):
@@ -1323,8 +1293,7 @@ 

Source code for skidl.part

     ):
         from .tools import SKIDL
 
-        if not tool:
-            tool = SKIDL
+        tool = tool or SKIDL
         super().__init__(lib, name, dest, tool, connections, attribs)
@@ -1370,14 +1339,12 @@

Source code for skidl.part

         # Store the part unit label.
         self.label = label
 
-        # Store the part unit number if it's given.
-        try:
-            self.num = criteria["unit"]
-        except KeyError:
-            pass
+        # Store the part unit number if it's given, otherwise default to 1.
+        self.num = criteria.get("unit", 1)
 
         # Give the PartUnit the same information as the Part it is generated
         # from so it can act the same way, just with fewer pins.
+        # FIXME: Do we need this if we define __getattr__ as below?
         for k, v in list(parent.__dict__.items()):
             self.__dict__[k] = v
 
@@ -1389,6 +1356,10 @@ 

Source code for skidl.part

         self.pins = []
         self.add_pins_from_parent(*pin_ids, **criteria)
 
+    def __getattr__(self, key):
+        """Return attribute from parent Part if it wasn't found in the PartUnit."""
+        return getattr(self.parent, key)
+
 
[docs] def add_pins_from_parent(self, *pin_ids, **criteria): """ Add selected pins from the parent to the part unit. @@ -1403,22 +1374,59 @@

Source code for skidl.part

         except ValueError:
             pass
 
-        # Add attributes for accessing the new pins.
+        # Add attributes (via aliases) for accessing the new pins.
         for pin in new_pins:
-            add_unique_attr(self, "p" + str(pin.num), pin)
-            add_unique_attr(self, pin.name, pin)
+            pin.aliases += pin.name
+            pin.aliases += "p" + str(pin.num)
 
         # Add new pins to existing pins of the unit, removing duplicates.
         self.pins = list(set(self.pins + new_pins))
[docs] def validate(self): """Check that unit pins point to the parent part.""" + for pin in self.pins: assert id(pin.part) == id(self.parent)
+
[docs] def grab_pins(self): + """Grab pin from Part and assign to PartUnit.""" + + for pin in self.pins: + pin.part = self
+ +
[docs] def release_pins(self): + """Return PartUnit pins to parent Part.""" + + for pin in self.pins: + pin.part = self.parent
+ @property def ref(self): - return ".".join((self.parent.ref, self.label))
+ from .circuit import HIER_SEP + + return HIER_SEP.join((self.parent.ref, self.label))
+ + +############################################################################## + + +
[docs]def default_empty_footprint_handler(part): + """Handle the situation of a Part with no footprint when generating netlist/PCB. + + Args: + part (Part): The part with no footprint. + + Note: + By default, this function logs an error message if the footprint is missing. + Override this function if you want to try and set some default footprint + for particular types of parts (such as using an 0805 footprint for a resistor). + """ + + from .logger import active_logger + + active_logger.error( + "No footprint for {part}/{ref}.".format(part=part.name, ref=part.ref) + )
@@ -1457,7 +1465,7 @@

Navigation

\ No newline at end of file diff --git a/docs/api/html/_modules/skidl/part_query.html b/docs/api/html/_modules/skidl/part_query.html index 48aa6817..38efed4a 100644 --- a/docs/api/html/_modules/skidl/part_query.html +++ b/docs/api/html/_modules/skidl/part_query.html @@ -68,7 +68,7 @@

Source code for skidl.part_query

 from future import standard_library
 
 from .logger import active_logger
-from .utilities import *
+from .utilities import to_list
 
 standard_library.install_aliases()
 
@@ -104,6 +104,7 @@ 

Source code for skidl.part_query

     """Return a list of (lib, part) sequences that match a regex term."""
 
     import skidl
+    import skidl.tools
 
     from .schlib import SchLib
 
@@ -122,7 +123,7 @@ 

Source code for skidl.part_query

 
     # Gather all the lib files from all the directories in the search paths.
     lib_files = list()
-    lib_suffixes = tuple(to_list(skidl.lib_suffixes[tool]))
+    lib_suffixes = tuple(to_list(skidl.tools.lib_suffixes[tool]))
     for lib_dir in skidl.lib_search_paths[tool]:
 
         # Get all the library files in the search path.
@@ -156,12 +157,9 @@ 

Source code for skidl.part_query

             lib.get_parts(use_backup_lib=False, search_text=terms)
         ):
             # Parse the part to instantiate the complete object.
-            part.parse(get_name_only=True)
+            part.parse(partial_parse=True)
 
-            # Yield the part and its containing library.
-            yield "PART", lib_file, part, part.name
-
-            # Also return aliases.
+            # Return part name and aliases (everything is included in aliases).
             for alias in list(part.aliases):
                 yield "PART", lib_file, part, alias
@@ -504,7 +502,7 @@

Navigation

\ No newline at end of file diff --git a/docs/api/html/_modules/skidl/pin.html b/docs/api/html/_modules/skidl/pin.html index 21d3b45b..f82213ab 100644 --- a/docs/api/html/_modules/skidl/pin.html +++ b/docs/api/html/_modules/skidl/pin.html @@ -60,23 +60,35 @@

Source code for skidl.pin

     unicode_literals,
 )
 
+import random
 import re
+import sys
 from builtins import range, super
 from collections import defaultdict
 from copy import copy
 from enum import IntEnum
+from functools import total_ordering
 
 from future import standard_library
 
-from .alias import *
 from .logger import active_logger
 from .skidlbaseobj import ERROR, OK, WARNING, SkidlBaseObject
-from .utilities import *
+from .utilities import (
+    expand_buses,
+    expand_indices,
+    find_num_copies,
+    flatten,
+    from_iadd,
+    rmv_iadd,
+    set_iadd,
+    to_list,
+)
 
 standard_library.install_aliases()
 
 
-
[docs]class Pin(SkidlBaseObject): +
[docs]@total_ordering +class Pin(SkidlBaseObject): """ A class for storing data about pins for a part. @@ -88,6 +100,7 @@

Source code for skidl.pin

         part: Link to the Part object this pin belongs to.
         func: Pin function such as PinType.types.INPUT.
         do_erc: When false, the pin is not checked for ERC violations.
+
     """
 
     # Various types of pins.
@@ -249,13 +262,58 @@ 

Source code for skidl.pin

         self.part = None
         self.name = ""
         self.num = ""
+        self.stub = False
         self.do_erc = True
         self.func = self.types.UNSPEC  # Pin function defaults to unspecified.
 
+        # Set pin number as a random integer so that calling Pin() multiple
+        # times will give pins that are distinct according to __eq__.
+        # This pin number gets overridden if the num is set in attribs.
+        self.num = random.randint(100000, sys.maxsize)
+
         # Attach additional attributes to the pin.
         for k, v in list(attribs.items()):
             setattr(self, k, v)
 
+    def _normalize_num(self):
+        """Normalize pin numbers into a tuple for comparison purposes.
+
+        Returns:
+            tuple: Tuple consisting of BGA row identifier and numeric column.
+                If it's not a BGA pin, then the tuple contains just a single number.
+        """
+
+        # Split the pin number into an initial alpha BGA row followed by column number.
+        n = list(re.match(r"(\D*)(.*)", str(self.num)).group(1, 2))
+
+        # Uppercase the BGA row. This has no effect if it's not a BGA.
+        n[0] = n[0].upper()
+
+        # Convert the column number (or just the single pin number) to an integer if possible.
+        try:
+            n[-1] = int(n[-1])
+        except ValueError:
+            pass
+
+        # return the pin number tuple.
+        return n
+
+    def __lt__(self, o):
+        if not isinstance(o, type(self)):
+            return NotImplemented
+        if self.part != o.part:
+            raise ValueError("Comparing pins on different parts not supported.")
+        return self._normalize_num() < o._normalize_num()
+
+    def __eq__(self, o):
+        if not isinstance(o, type(self)):
+            return NotImplemented
+        return self.part == o.part and self._normalize_num() == o._normalize_num()
+
+    # Defining an __eq__ method will make Pins unhashable unless we
+    # explicitly define a hash method.
+    __hash__ = SkidlBaseObject.__hash__
+
 
[docs] def copy(self, num_copies=None, **attribs): """ Return copy or list of copies of a pin including any net connection. @@ -307,6 +365,10 @@

Source code for skidl.pin

             # The copy is not on a net, yet.
             cpy.nets = []
 
+            # Attach additional attributes to the pin.
+            for k, v in list(attribs.items()):
+                setattr(cpy, k, v)
+
             # Connect the new pin to the same net as the original.
             if self.nets:
                 self.nets[0] += cpy
@@ -314,10 +376,6 @@ 

Source code for skidl.pin

             # Copy the aliases for the pin if it has them.
             cpy.aliases = self.aliases
 
-            # Attach additional attributes to the pin.
-            for k, v in list(attribs.items()):
-                setattr(cpy, k, v)
-
             copies.append(cpy)
 
         # Return a list of the copies made or just a single copy.
@@ -538,6 +596,10 @@ 

Source code for skidl.pin

         """Return a list containing this pin."""
         return to_list(self)
+ @property + def pins(self): + return self.get_pins() +
[docs] def create_network(self): """Create a network from a single pin.""" from .network import Network @@ -712,51 +774,6 @@

Source code for skidl.pin

 ##############################################################################
 
 
-
[docs]class PinList(list): - """ - A list of Pin objects that's meant to look something like a Pin to a Part. - This is used for vector I/O of XSPICE parts. - """ - - def __init__(self, num, name, part): - super().__init__() - # The list needs the following attributes to behave like a Pin. - self.num = num - self.name = name - self.part = part - - def __getitem__(self, i): - """ - Get a Pin from the list. Add Pin objects to the list if they don't exist. - """ - if i >= len(self): - self.extend([Pin(num=j, part=self.part) for j in range(len(self), i + 1)]) - return super().__getitem__(i) - -
[docs] def copy(self): - """ - Return a copy of a PinList for use when a Part is copied. - """ - cpy = PinList(self.num, self.name, self.part) - for pin in self: - cpy += pin.copy() - return cpy
- -
[docs] def disconnect(self): - """Disconnect all the pins in the list.""" - for pin in self: - pin.disconnect()
- -
[docs] def is_connected(self): - for pin in self: - if pin.is_connected(): - return True - return False
- - -############################################################################## - - # This will make all the Pin.drive members into attributes of the Pin class # so things like Pin.INPUT will work as well as Pin.types.INPUT. Pin.add_type() @@ -864,7 +881,7 @@

Navigation

\ No newline at end of file diff --git a/docs/api/html/_modules/skidl/protonet.html b/docs/api/html/_modules/skidl/protonet.html index 2fe4dc39..23712b7e 100644 --- a/docs/api/html/_modules/skidl/protonet.html +++ b/docs/api/html/_modules/skidl/protonet.html @@ -69,7 +69,7 @@

Source code for skidl.protonet

 from .network import Network
 from .pin import Pin
 from .skidlbaseobj import SkidlBaseObject
-from .utilities import *
+from .utilities import expand_buses, flatten
 
 standard_library.install_aliases()
 
@@ -196,7 +196,7 @@ 

Navigation

\ No newline at end of file diff --git a/docs/api/html/_modules/skidl/schlib.html b/docs/api/html/_modules/skidl/schlib.html index 9b9ab162..940d449b 100644 --- a/docs/api/html/_modules/skidl/schlib.html +++ b/docs/api/html/_modules/skidl/schlib.html @@ -60,12 +60,14 @@

Source code for skidl.schlib

     unicode_literals,
 )
 
+import re
 from builtins import object, str
 
 from future import standard_library
 
+from .alias import Alias
 from .logger import active_logger
-from .utilities import *
+from .utilities import cnvt_to_var_name, filter_list, flatten, list_or_scalar, opened
 
 standard_library.install_aliases()
 
@@ -97,6 +99,8 @@ 

Source code for skidl.schlib

 
         import skidl
 
+        from .tools import tool_modules
+
         if tool is None:
             tool = skidl.get_default_tool()
 
@@ -120,7 +124,12 @@ 

Source code for skidl.schlib

         else:
             try:
                 # Use the tool name to find the function for loading the library.
-                load_func = getattr(self, "_load_sch_lib_{}".format(tool))
+                tool_modules[tool].load_sch_lib(
+                    self,
+                    filename,
+                    skidl.lib_search_paths[tool],
+                    lib_section=lib_section,
+                )
             except AttributeError:
                 # OK, that didn't work so well...
                 active_logger.raise_(
@@ -128,9 +137,6 @@ 

Source code for skidl.schlib

                     "Unsupported ECAD tool library: {}.".format(tool),
                 )
             else:
-                load_func(
-                    filename, skidl.lib_search_paths[tool], lib_section=lib_section
-                )
                 self.filename = filename
                 # Cache a reference to the library.
                 self._cache[filename] = self
@@ -147,9 +153,9 @@ 

Source code for skidl.schlib

 
         for part in flatten(parts):
             # Parts with the same name are not allowed in the library.
-            # Also, do not check the backup library to see if the parts
-            # are in there because that's probably a different library.
-            if not self.get_parts(use_backup_lib=False, name=re.escape(part.name)):
+            if not self.get_parts_by_name(
+                part.name, be_thorough=False, allow_failure=True
+            ):
                 self.parts.append(part.copy(dest=TEMPLATE))
                 # Place a pointer to this library into the added part.
                 self.parts[-1].lib = self
@@ -167,82 +173,80 @@ 

Source code for skidl.schlib

                 of the attribute.
 
         Returns:
-            A single Part or a list of Parts that match all the criteria.
+            A list of Parts that match all the criteria.
         """
 
-        import skidl
+        from .skidl import get_query_backup_lib, load_backup_lib
 
-        parts = list_or_scalar(filter_list(self.parts, **criteria))
-        if not parts and use_backup_lib and skidl.QUERY_BACKUP_LIB:
+        parts = filter_list(self.parts, **criteria)
+        if not parts and use_backup_lib and get_query_backup_lib():
+            # if not parts and use_backup_lib and skidl.QUERY_BACKUP_LIB:
             try:
-                backup_lib_ = skidl.load_backup_lib()
+                backup_lib_ = load_backup_lib()
                 parts = backup_lib_.get_parts(use_backup_lib=False, **criteria)
             except AttributeError:
                 pass
         return parts
-
[docs] def get_part_by_name( - self, name, allow_multiples=False, silent=False, get_name_only=False +
[docs] def get_parts_quick(self, name): + """Do a quick search for a part name or alias.""" + return [prt for prt in self.parts if prt.aliases == name]
+ +
[docs] def get_parts_by_name( + self, + name, + be_thorough=True, + allow_multiples=False, + allow_failure=False, + partial_parse=False, ): """ Return a Part with the given name or alias from the part list. Args: name: The part name or alias to search for in the library. + be_thorough: Do thorough search, not just simple string matching. allow_multiples: If true, return a list of parts matching the name. If false, return only the first matching part and issue a warning if there were more than one. - silent: If true, don't issue errors or warnings. + allow_failure: Return None if no matches found. Issue no errors/warnings. + partial_parse: If true, don't fully parse any parts that are found. Returns: - A single Part or a list of Parts that match all the criteria. + A list of Parts that match all the criteria. """ - # First check to see if there is a part or parts with a matching name. - parts = self.get_parts(name=name) + # Start with a simple search for the part name. + names = Alias(name, name.lower(), name.upper()) + parts = self.get_parts_quick(names) - # No part with that name, so check for an alias that matches. - if not parts: + # Simple search failed, so try the more thorough search method. + if not parts and be_thorough: parts = self.get_parts(aliases=name) - # No part with that alias either, so signal an error. - if not parts: - message = "Unable to find part {} in library {}.".format( - name, getattr(self, "filename", "UNKNOWN") - ) - if not silent: - active_logger.error(message) - raise ValueError(message) + # No parts found, so signal an error. + if not parts and not allow_failure: + message = "Unable to find part {} in library {}.".format( + name, getattr(self, "filename", "UNKNOWN") + ) + active_logger.raise_(ValueError, message) - # Multiple parts with that name or alias exists, so return the list - # of parts or just the first part on the list. - if isinstance(parts, (list, tuple)): + if len(parts) > 1 and not allow_multiples: + message = "Found multiple parts matching {}. Selecting {}.".format( + name, parts[0].name + ) + active_logger.warning(message) + parts = parts[0:1] # Just keep the first part. - # Return the entire list if multiples are allowed. - if allow_multiples: - parts = [p.parse(get_name_only) for p in parts] + # Do whatever parsing was requested for the found parts. + for part in parts: + part.parse(partial_parse) - # Just return the first part from the list if multiples are not - # allowed and issue a warning. - else: - if not silent: - active_logger.warning( - "Found multiple parts matching {}. Selecting {}.".format( - name, parts[0].name - ) - ) - parts = parts[0] - parts.parse(get_name_only) - - # Only a single matching part was found, so return that. - else: - parts.parse(get_name_only) - - # Return the library part or parts that were found. return parts
- # Get part by name or alias using []'s. - __getitem__ = get_part_by_name + def __getitem__(self, id): + """Get part by name or alias.""" + return list_or_scalar(self.get_parts_by_name(id)) def __str__(self): """Return a list of the part names in this library as a string.""" @@ -270,15 +274,14 @@

Source code for skidl.schlib

             s = re.sub(r"(Pin\()", r"\n            \1", s)
             return s
 
-        import skidl
+        import skidl.tools
 
         from .tools import SKIDL
 
         if tool is None:
             tool = SKIDL
 
-        if not file_:
-            file_ = libname + skidl.lib_suffixes[tool]
+        file_ = file_ or (libname + skidl.tools.lib_suffixes[tool])
 
         export_str = "from skidl import Pin, Part, Alias, SchLib, SKIDL, TEMPLATE\n\n"
         export_str += "SKIDL_lib_version = '0.0.1'\n\n"
@@ -333,7 +336,7 @@ 

Navigation

\ No newline at end of file diff --git a/docs/api/html/_modules/skidl/scriptinfo.html b/docs/api/html/_modules/skidl/scriptinfo.html index 4f5f4679..867df421 100644 --- a/docs/api/html/_modules/skidl/scriptinfo.html +++ b/docs/api/html/_modules/skidl/scriptinfo.html @@ -100,18 +100,17 @@

Source code for skidl.scriptinfo

             continue
         trc = teil[1]
 
-    # trc contains highest level calling script name
-    # check if we have been compiled
+    # trc contains highest level calling script name.
+    # Check if we have been compiled.
     if getattr(sys, "frozen", False):
         scriptdir, scriptname = os.path.split(sys.executable)
         return {"dir": scriptdir, "name": scriptname, "source": trc}
 
-    # from here on, we are in the interpreted case
+    # From here on, we are in the interpreted case
     scriptdir, trc = os.path.split(trc)
-    # if trc did not contain directory information,
+    # If trc did not contain directory information,
     # the current working directory is what we need
-    if not scriptdir:
-        scriptdir = os.getcwd()
+    scriptdir = scriptdir or os.getcwd()
 
     scr_dict = {"name": trc, "source": trc, "dir": scriptdir}
     return scr_dict
@@ -200,7 +199,7 @@

Navigation

\ No newline at end of file diff --git a/docs/api/html/_modules/skidl/skidl.html b/docs/api/html/_modules/skidl/skidl.html index 21c1d3e3..f90a6894 100644 --- a/docs/api/html/_modules/skidl/skidl.html +++ b/docs/api/html/_modules/skidl/skidl.html @@ -56,20 +56,20 @@

Source code for skidl.skidl

     unicode_literals,
 )
 
-import json
 import os
 import sys
-from builtins import open, super
+from builtins import open
 
 from future import standard_library
 
 from .circuit import Circuit
 from .common import builtins
-from .logger import active_logger, get_script_name, stop_log_file_output
-from .part_query import footprint_cache
+from .config import SkidlConfig
+from .logger import get_script_name, stop_log_file_output
+from .part import default_empty_footprint_handler
 from .pin import Pin
-from .tools import ALL_TOOLS, KICAD, SKIDL, SPICE, lib_suffixes
-from .utilities import *
+from .tools import KICAD, SKIDL, lib_suffixes
+from .utilities import norecurse
 
 standard_library.install_aliases()
 
@@ -82,95 +82,13 @@ 

Source code for skidl.skidl

     pass
 
 
-
[docs]class SkidlCfg(dict): - """Class for holding SKiDL configuration.""" - - CFG_FILE_NAME = ".skidlcfg" - - def __init__(self, *dirs): - super().__init__() - self.load(*dirs) - -
[docs] def load(self, *dirs): - """Load SKiDL configuration from JSON files in given dirs.""" - for dir in dirs: - path = os.path.join(dir, self.CFG_FILE_NAME) - path = os.path.expanduser(path) - path = os.path.abspath(path) - try: - with open(path) as cfg_fp: - merge_dicts(self, json.load(cfg_fp)) - except (FileNotFoundError, IOError): - pass
- -
[docs] def store(self, dir="."): - """Store SKiDL configuration as JSON in directory as .skidlcfg file.""" - path = os.path.join(dir, self.CFG_FILE_NAME) - path = os.path.expanduser(path) - path = os.path.abspath(path) - with open(path, "w") as cfg_fp: - json.dump(self, cfg_fp, indent=4)
- - -
[docs]def get_kicad_lib_tbl_dir(): - """Get the path to where the global fp-lib-table file is found.""" - - paths = ( - "$HOME/.config/kicad", - "~/.config/kicad", - "%APPDATA%/kicad", - "$HOME/Library/Preferences/kicad", - "~/Library/Preferences/kicad", - ) - for path in paths: - path = os.path.normpath(os.path.expanduser(os.path.expandvars(path))) - if os.path.lexists(path): - return path - return ""
- - ############################################################################### # Globals that are used by everything else. ############################################################################### -# Get SKiDL configuration. -skidl_cfg = SkidlCfg("/etc", "~", ".") - -# If no configuration files were found, set some default lib search paths. -if "lib_search_paths" not in skidl_cfg: - skidl_cfg["lib_search_paths"] = {tool: ["."] for tool in ALL_TOOLS} - - # Add the location of the default KiCad part libraries. - try: - skidl_cfg["lib_search_paths"][KICAD].append(os.environ["KICAD_SYMBOL_DIR"]) - except KeyError: - active_logger.warning( - "KICAD_SYMBOL_DIR environment variable is missing, so the default KiCad symbol libraries won't be searched." - ) - - # Add the location of the default SKiDL part libraries. - default_skidl_libs = os.path.join( - os.path.dirname(os.path.abspath(__file__)), "libs" - ) - skidl_cfg["lib_search_paths"][SKIDL].append(default_skidl_libs) - -# Shortcut to library search paths. +# Get SKiDL configuration and set global search paths. +skidl_cfg = SkidlConfig() lib_search_paths = skidl_cfg["lib_search_paths"] - -# If no configuration files were found, set some default footprint search paths. -if "footprint_search_paths" not in skidl_cfg: - dir_ = get_kicad_lib_tbl_dir() - skidl_cfg["footprint_search_paths"] = {tool: [dir_] for tool in ALL_TOOLS} - -# Cause the footprint cache to be invalidated if the footprint search path changes. -
[docs]def invalidate_footprint_cache(self, k, v): - footprint_cache.reset()
- - -skidl_cfg["footprint_search_paths"] = TriggerDict(skidl_cfg["footprint_search_paths"]) -skidl_cfg["footprint_search_paths"].trigger_funcs[KICAD] = invalidate_footprint_cache - -# Shortcut to footprint search paths. footprint_search_paths = skidl_cfg["footprint_search_paths"] # Set default toolset being used with SKiDL. @@ -256,6 +174,8 @@

Source code for skidl.skidl

 reset = default_circuit.reset
 backup_parts = default_circuit.backup_parts
 
+empty_footprint_handler = default_empty_footprint_handler
+
 # Define a tag for nets that convey power (e.g., VCC or GND).
 POWER = Pin.drives.POWER
 
@@ -302,7 +222,7 @@ 

Navigation

\ No newline at end of file diff --git a/docs/api/html/_modules/skidl/skidlbaseobj.html b/docs/api/html/_modules/skidl/skidlbaseobj.html index 8c0837e4..bb0346c2 100644 --- a/docs/api/html/_modules/skidl/skidlbaseobj.html +++ b/docs/api/html/_modules/skidl/skidlbaseobj.html @@ -97,6 +97,24 @@

Source code for skidl.skidlbaseobj

         else:
             self.fields[key] = value
 
+    @property
+    def name(self):
+        return self._name
+
+    @name.setter
+    def name(self, nm):
+        del self.name  # Remove any pre-existing name.
+        self.aliases += nm
+        self._name = nm
+
+    @name.deleter
+    def name(self):
+        try:
+            self.aliases.discard(self._name)
+            self._name = None
+        except AttributeError:
+            pass
+
     @property
     def aliases(self):
         try:
@@ -257,7 +275,7 @@ 

Navigation

\ No newline at end of file diff --git a/docs/api/html/_modules/skidl/tools/kicad/kicad.html b/docs/api/html/_modules/skidl/tools/kicad/kicad.html index 7edcface..3282ad85 100644 --- a/docs/api/html/_modules/skidl/tools/kicad/kicad.html +++ b/docs/api/html/_modules/skidl/tools/kicad/kicad.html @@ -68,12 +68,11 @@

Source code for skidl.tools.kicad.kicad

 
 from future import standard_library
 
-from ...coord import *
 from ...logger import active_logger
-from ...part import LIBRARY, TEMPLATE
 from ...pckg_info import __version__
 from ...scriptinfo import get_script_name, scriptinfo
 from ...utilities import *
+from . import constants, v5, v6
 
 standard_library.install_aliases()
 
@@ -85,11 +84,30 @@ 

Source code for skidl.tools.kicad.kicad

 lib_suffix = [".lib", ".kicad_sym"]
 
 
-
[docs]def load_sch_lib(self, filename=None, lib_search_paths_=None, lib_section=None): +
[docs]def get_kicad_lib_tbl_dir(): + """Get the path to where the global fp-lib-table file is found.""" + + paths = ( + "$HOME/.config/kicad", + "~/.config/kicad", + "%APPDATA%/kicad", + "$HOME/Library/Preferences/kicad", + "~/Library/Preferences/kicad", + ) + + for path in paths: + path = os.path.normpath(os.path.expanduser(os.path.expandvars(path))) + if os.path.lexists(path): + return path + return ""
+ + +
[docs]def load_sch_lib(lib, filename=None, lib_search_paths_=None, lib_section=None): """ Load the parts from a KiCad schematic library file. Args: + lib (SchLib): SKiDL library object. filename: The name of the KiCad schematic library file. """ @@ -115,839 +133,38 @@

Source code for skidl.tools.kicad.kicad

             "Unable to open KiCad Schematic Library File {}".format(filename)
         )
 
+    # TODO: Find a way to use find_and_read_file() and pass the results.
     if suffix == ".kicad_sym":
-        _load_sch_lib_kicad_v6(self, f, filename, lib_search_paths_)
+        v6.load_sch_lib(lib, f, filename, lib_search_paths_)
     else:
-        _load_sch_lib_kicad(self, f, filename, lib_search_paths_)
- - -def _load_sch_lib_kicad(self, f, filename, lib_search_paths_): - """ - Load the parts from a KiCad schematic library file. - - Args: - filename: The name of the KiCad schematic library file. - """ - - from ...part import Part - from .. import KICAD - - # Check the file header to make sure it's a KiCad library. - header = [] - header = [f.readline()] - if header and "EESchema-LIBRARY" not in header[0]: - raise RuntimeError( - "The file {} is not a KiCad Schematic Library File.\n".format(filename) - ) - - # Read the definition of each part line-by-line and then create - # a Part object that gets stored in the part list. - part_defn = [] - for line in f: - - # Skip over comments. - if line.startswith("#"): - pass - - # Look for the start of a part definition. - elif line.startswith("DEF"): - # Initialize the part definition with the first line. - # This will also signal that succeeding lines should be added. - part_defn = [line] - part_name = line.split()[1] # Get the part name. - part_aliases = [] - - # If gathering the part definition has begun, then continue adding lines. - elif part_defn: - part_defn.append(line) - - # Get aliases to add to search text. - if line.startswith("ALIAS"): - part_aliases = line.split()[1:] - - # If the current line ends this part definition, then create - # the Part object and add it to the part list. Be sure to - # indicate that the Part object is being added to a library - # and not to a schematic netlist. - # Also, add null attributes in case a DCM file is not - # available for this part. - if line.startswith("ENDDEF"): - self.add_parts( - Part( - part_defn=part_defn, - tool=KICAD, - dest=LIBRARY, - filename=filename, - name=part_name, - aliases=part_aliases, - keywords="", - datasheet="", - description="", - search_text="", - tool_version="kicad", - ) - ) - - # Clear the part definition in preparation for the next one. - part_defn = [] - - # Now add information from any associated DCM file. - base_fn = os.path.splitext(filename)[0] # Strip any extension. - f, _ = find_and_open_file(base_fn, lib_search_paths_, ".dcm", allow_failure=True) - if f: - part_desc = {} - for line in f: - - # Skip over comments. - if line.startswith("#"): - pass - - # Look for the start of a part description. - elif line.startswith("$CMP"): - part_desc["name"] = line.split()[-1] - - # If gathering the part definition has begun, then continue adding lines. - elif part_desc: - if line.startswith("D"): - part_desc["description"] = " ".join(line.split()[1:]) - elif line.startswith("K"): - part_desc["keywords"] = " ".join(line.split()[1:]) - elif line.startswith("F"): - part_desc["datasheet"] = " ".join(line.split()[1:]) - elif line.startswith("$ENDCMP"): - try: - part = self.get_part_by_name( - re.escape(part_desc["name"]), - silent=True, - get_name_only=True, - ) - except Exception as e: - pass - else: - part.description = part_desc.get("description", "") - part.keywords = part_desc.get("keywords", "") - part.datasheet = part_desc.get("datasheet", "") - part_desc = {} - else: - pass - - # Create text string to be used when searching for parts. - for part in self.parts: - search_text_pieces = [part.filename, part.name, part.description, part.keywords] - search_text_pieces.extend(part.aliases) - # Join the various text pieces by newlines so the ^ and $ special characters - # can be used to detect the start and end of a piece of text during RE searches. - part.search_text = "\n".join(search_text_pieces) - - -def _split_into_symbols(libstr): - """Split a KiCad V6 library and return a list of symbol strings.""" - - # Split using "(symbol" as delimiter and discard any preamble. - libstr = libstr.replace("( ", "(") - delimiter = "(symbol " - pieces = libstr.split(delimiter)[1:] - - symbol_name = "_" # Name of current symbol being assembled. - symbols = {} # Symbols indexed by their names. - - # Go through the pieces and assemble each symbol. - for piece in pieces: - - # Get the symbol name immediately following the delimiter. - name = piece.split(None, 1)[0] - name = name.replace('"', "") # Remove quotes around name. - name1 = "_".join(name.split("_")[:-2]) # Remove '_#_#' from subsymbols. - - if name1 == symbol_name: - # if name.startswith(symbol_name): - # If the name starts with the same string as the - # current symbol, then this is a unit of the symbol. - # Therefore, just append the unit to the symbol. - symbols[symbol_name] += delimiter + piece - else: - # Otherwise, this is the start of a new symbol. - # Remove the library name preceding the symbol name. - symbol_name = name.split(":", 1)[-1] - symbols[symbol_name] = delimiter + piece - - return symbols - - -def _load_sch_lib_kicad_v6(self, f, filename, lib_search_paths_): - """ - Load the parts from a KiCad schematic library file. - - Args: - filename: The name of the KiCad schematic library file. - """ + v5.load_sch_lib(lib, f, filename, lib_search_paths_)
- from ...part import Part - - # Parse the library and return a nested list of library parts. - lib_sexp = "".join(f.readlines()) - - parts = _split_into_symbols(lib_sexp) - - def extract_quoted_string(part, property_type): - """Extract quoted string from a property in a part symbol definition.""" - try: - # Quoted string follows the property type id. - value = part.split(property_type)[1] - except IndexError: - # Property didn't exist, so return empty string. - return "" - # Remove quotes and return the string. - return re.findall(r'"(.*?)(?<!\\)"', value)[0] - - # Create Part objects for each part in library. - for part_name, part_defn in parts.items(): - - # Get part properties. - keywords = extract_quoted_string(part_defn, "ki_keywords") - datasheet = extract_quoted_string(part_defn, "Datasheet") - description = extract_quoted_string(part_defn, "ki_description") - - # Join the various text pieces by newlines so the ^ and $ special characters - # can be used to detect the start and end of a piece of text during RE searches. - search_text = "\n".join([filename, part_name, description, keywords]) - - # Create a Part object and add it to the library object. - self.add_parts( - Part( - part_defn=part_defn, - tool=tool_name, - dest=LIBRARY, - filename=filename, - name=part_name, - aliases=list(), # No aliases in KiCad V6? - keywords=keywords, - datasheet=datasheet, - description=description, - search_text=search_text, - tool_version="kicad_v6", - ) - ) - -
[docs]def parse_lib_part(self, get_name_only=False): +
[docs]def parse_lib_part(part, partial_parse=False): """ Create a Part using a part definition from a KiCad schematic library. Args: - get_name_only: If true, scan the part definition until the + part (Part): SKiDL Part object. + partial_parse: If true, scan the part definition until the name and aliases are found. The rest of the definition will be parsed if the part is actually used. """ - - if self.tool_version == "kicad_v6": - _parse_lib_part_kicad_v6(self, get_name_only) + if part.tool_version == "kicad_v6": + v6.parse_lib_part(part, partial_parse) else: - _parse_lib_part_kicad(self, get_name_only)
- - -# Named tuples for part DRAW primitives. - -DrawDef = namedtuple( - "DrawDef", - "name ref zero name_offset show_nums show_names num_units lock_units power_symbol", -) + v5.parse_lib_part(part, partial_parse)
-DrawF0 = namedtuple("DrawF0", "ref x y size orientation visibility halign valign") -DrawF1 = namedtuple( - "DrawF1", "name x y size orientation visibility halign valign fieldname" -) - -DrawArc = namedtuple( - "DrawArc", - "cx cy radius start_angle end_angle unit dmg thickness fill startx starty endx endy", -) - -DrawCircle = namedtuple("DrawCircle", "cx cy radius unit dmg thickness fill") - -DrawPoly = namedtuple("DrawPoly", "point_count unit dmg thickness points fill") - -DrawRect = namedtuple("DrawRect", "x1 y1 x2 y2 unit dmg thickness fill") - -DrawText = namedtuple( - "DrawText", "angle x y size hidden unit dmg text italic bold halign valign" -) - -DrawPin = namedtuple( - "DrawPin", - "name num x y length orientation num_size name_size unit dmg electrical_type shape", -) - - -def _parse_lib_part_kicad(self, get_name_only): - """ - Create a Part using a part definition from a KiCad schematic library. - - This method was written based on the code from - https://github.com/KiCad/kicad-library-utils/tree/master/schlib. - It's covered by GPL3. +
[docs]def gen_netlist(circuit): + """Generate a netlist from a Circuit object. Args: - get_name_only: If true, scan the part definition until the - name and aliases are found. The rest of the definition - will be parsed if the part is actually used. - """ - - from ...pin import Pin - - _DEF_KEYS = [ - "name", - "reference", - "unused", - "text_offset", - "draw_pinnumber", - "draw_pinname", - "unit_count", - "units_locked", - "option_flag", - ] - _F0_KEYS = [ - "reference", - "posx", - "posy", - "text_size", - "text_orient", - "visibility", - "htext_justify", - "vtext_justify", - ] - _FN_KEYS = [ - "name", - "posx", - "posy", - "text_size", - "text_orient", - "visibility", - "htext_justify", - "vtext_justify", - "fieldname", - ] - _ARC_KEYS = [ - "posx", - "posy", - "radius", - "start_angle", - "end_angle", - "unit", - "convert", - "thickness", - "fill", - "startx", - "starty", - "endx", - "endy", - ] - _CIRCLE_KEYS = ["posx", "posy", "radius", "unit", "convert", "thickness", "fill"] - _POLY_KEYS = ["point_count", "unit", "convert", "thickness", "points", "fill"] - _RECT_KEYS = [ - "startx", - "starty", - "endx", - "endy", - "unit", - "convert", - "thickness", - "fill", - ] - _TEXT_KEYS = [ - "direction", - "posx", - "posy", - "text_size", - "text_type", - "unit", - "convert", - "text", - "italic", - "bold", - "hjustify", - "vjustify", - ] - _PIN_KEYS = [ - "name", - "num", - "posx", - "posy", - "length", - "direction", - "name_text_size", - "num_text_size", - "unit", - "convert", - "electrical_type", - "pin_type", - ] - _DRAW_KEYS = { - "arcs": _ARC_KEYS, - "circles": _CIRCLE_KEYS, - "polylines": _POLY_KEYS, - "rectangles": _RECT_KEYS, - "texts": _TEXT_KEYS, - "pins": _PIN_KEYS, - } - _DRAW_ELEMS = { - "arcs": "A", - "circles": "C", - "polylines": "P", - "rectangles": "S", - "texts": "T", - "pins": "X", - } - _KEYS = { - "DEF": _DEF_KEYS, - "F0": _F0_KEYS, - "F": _FN_KEYS, - "A": _ARC_KEYS, - "C": _CIRCLE_KEYS, - "P": _POLY_KEYS, - "S": _RECT_KEYS, - "T": _TEXT_KEYS, - "X": _PIN_KEYS, - } - - def numberize(v): - """If possible, convert a string into a number.""" - try: - return int(v) - except ValueError: - try: - return float(v) - except ValueError: - pass - return v # Unable to convert to number. Return string. - - # Return if there's nothing to do (i.e., part has already been parsed). - if not self.part_defn: - return - - self.aliases = [] # Part aliases. - self.fplist = [] # Footprint list. - self.draw = [] # Drawing commands for symbol, including pins. - - building_fplist = False # True when working on footprint list in defn. - building_draw = False # True when gathering part drawing from defn. - - pins = {} # Dict of symbol pins to check for duplicates. - - # Regular expression for non-quoted and quoted text pieces. - unqu = r'[^\s"]+' # Word without spaces or double-quotes. - qu = r'(?<!\\)".*?(?<!\\)"' # Quoted string, possibly with escaped quotes. - srch = "|".join([unqu + qu, qu, unqu]) - srch = re.compile(srch) - - # Go through the part definition line-by-line. - for line in self.part_defn: - - # Split the line into words. - line = line.replace("\n", "") - - # Extract all the non-quoted and quoted text pieces, accounting for escaped quotes. - line = re.findall(srch, line) # Replace line with list of pieces of line. - - # The first word indicates the type of part definition data that will follow. - if line[0] in _KEYS: - # Get the keywords for the current part definition data. - key_list = _KEYS[line[0]] - # Make a list of the values in the part data associated with each key. - # Use an empty string for any missing values so every key will be - # associated with something. - values = line[1:] + ["" for _ in range(len(key_list) - len(line[1:]))] - values = [rmv_quotes(v) for v in values] # Remove any quotes from values. - - # Create a dictionary of part definition keywords and values. - if line[0] == "DEF": - self.definition = dict(list(zip(_DEF_KEYS, values))) - self.name = self.definition["name"] - - # To handle libraries quickly, just get the name and - # aliases and parse the rest of the part definition later. - if get_name_only: - if self.aliases: - # Name found, aliases already found so we're done. - return - # Name found so scan defn to see if aliases are present. - # (The majority of parts don't have aliases.) - for ln in self.part_defn: - if re.match(r"^\s*ALIAS\s", ln): - # Found aliases, so store them. - self.aliases = re.findall(srch, ln)[1:] - return - return - - # Add DEF field to list of things to draw. - values = [numberize(v) for v in values] - self.draw.append(DrawDef(*values)) - - # End the parsing of the part definition. - elif line[0] == "ENDDEF": - break + circuit (Circuit): Circuit object. - # Create a dictionary of F0 part field keywords and values. - elif line[0] == "F0": - field_dict = dict(list(zip(_F0_KEYS, values))) - # Add the field name and its value as an attribute to the part. - self.fields["F0"] = field_dict["reference"] - # Add F0 field to list of things to draw. - values = [numberize(v) for v in values] - self.draw.append(DrawF0(*values)) - - # Create a dictionary of the other part field keywords and values. - elif line[0][0] == "F": - # Make a list of field values with empty strings for missing fields. - values = line[1:] + ["" for _ in range(len(_FN_KEYS) - len(line[1:]))] - values = [rmv_quotes(v) for v in values] # Remove any quotes from values. - field_dict = dict(list(zip(_FN_KEYS, values))) - # If no field name at end of line, use the field identifier F1, F2, ... - field_dict["fieldname"] = field_dict["fieldname"] or line[0] - # Add the field name and its value as an attribute to the part. - self.fields[field_dict["fieldname"]] = field_dict["name"] - # Add F1 field to list of things to draw. - if line[0] == "F1": - values = [numberize(v) for v in values] - self.draw.append(DrawF1(*values)) - - # Create a list of part aliases. - elif line[0] == "ALIAS": - self.aliases = line[1:] - - # Start the list of part footprints. - elif line[0] == "$FPLIST": - building_fplist = True - - # End the list of part footprints. - elif line[0] == "$ENDFPLIST": - building_fplist = False - - # Start gathering the drawing primitives for the part symbol. - elif line[0] == "DRAW": - building_draw = True - - # End the gathering of drawing primitives. - elif line[0] == "ENDDRAW": - building_draw = False - - # Every other line is either a footprint or a drawing primitive. - else: - # If the footprint list is being built, then add this line to it. - if building_fplist: - self.fplist.append( - line[0].strip().rstrip() - ) # Remove begin & end whitespace. - - # Else if the drawing primitives are being gathered, process the - # current line to see what type of primitive is in play. - elif building_draw: - - values = [numberize(v) for v in values] - - # Gather arcs. - if line[0] == "A": - self.draw.append(DrawArc(*values)) - - # Gather circles. - elif line[0] == "C": - self.draw.append(DrawCircle(*values)) - - # Gather polygons. - elif line[0] == "P": - n_points = values[0] - points = values[4 : 4 + (2 * n_points)] - values = values[0:4] + [points] - if len(line) > (5 + len(points)): - values += [line[-1]] - else: - values += [""] - self.draw.append(DrawPoly(*values)) - - # Gather rectangles. - elif line[0] == "S": - self.draw.append(DrawRect(*values)) - - # Gather text. - elif line[0] == "T": - self.draw.append(DrawText(*values)) - - # Gather the pin symbols. This is what we really want since - # this defines the names, numbers and attributes of the - # pins associated with the part. - elif line[0] == "X": - # Get the information for this pin. - values[0:2] = line[ - 1:3 - ] # Restore pin num & name in case they were made into integers. - pin = DrawPin(*values) - try: - # See if the pin number already exists for this part. - rpt_pin = pins[pin.num] - except KeyError: - # No, this pin number is unique (so far), so store it - # using the pin number as the dict key. - self.draw.append(pin) - pins[pin.num] = pin - else: - # Uh, oh: Repeated pin number! Check to see if the - # duplicated pins have the same I/O type and unit num. - if ( - pin.electrical_type != rpt_pin.electrical_type - or pin.unit != rpt_pin.unit - ): - active_logger.warning( - "Non-identical pins with the same number ({}) in symbol drawing {}".format( - pin.num, self.name - ) - ) - - # Found something unknown in the drawing section. - else: - msg = "Found something strange in {} symbol drawing: {}.".format( - self.name, line - ) - active_logger.warning(msg) - - # Found something unknown outside the footprint list or drawing section. - else: - msg = "Found something strange in {} symbol definition: {}.".format( - self.name, line - ) - active_logger.warning(msg) - - # Define some shortcuts to part information. - self.num_units = int(self.definition["unit_count"]) # # of units within the part. - self.name = self.definition["name"] # Part name (e.g., 'LM324'). - self.ref_prefix = self.definition["reference"] # Part ref prefix (e.g., 'R'). - - # Clear the part reference field directly. Don't use the setter function - # since it will try to generate and assign a unique part reference if - # passed a value of None. - self._ref = None - - # Make a Pin object from the information in the KiCad pin data fields. - def kicad_pin_to_pin(kicad_pin): - p = Pin() # Create a blank pin. - - # Replicate the KiCad pin fields as attributes in the Pin object. - # Note that this update will not give the pins valid references - # to the current part, but we'll fix that soon. - p.__dict__.update(kicad_pin._asdict()) - - pin_type_translation = { - "I": Pin.types.INPUT, - "O": Pin.types.OUTPUT, - "B": Pin.types.BIDIR, - "T": Pin.types.TRISTATE, - "P": Pin.types.PASSIVE, - "U": Pin.types.UNSPEC, - "W": Pin.types.PWRIN, - "w": Pin.types.PWROUT, - "C": Pin.types.OPENCOLL, - "E": Pin.types.OPENEMIT, - "N": Pin.types.NOCONNECT, - } - p.func = pin_type_translation[p.electrical_type] - - return p - - self.pins = [kicad_pin_to_pin(p) for p in pins.values()] - - # Make sure all the pins have a valid reference to this part. - self.associate_pins() - - # Create part units if there are more than 1. - if self.num_units > 1: - for i in range(1, self.num_units + 1): - self.make_unit("u" + num_to_chars(i), **{"unit": i}) - - # Part definition has been parsed, so clear it out. This prevents a - # part from being parsed more than once. - self.part_defn = None - - -def _parse_lib_part_kicad_v6(self, get_name_only): - """ - Create a Part using a part definition from a KiCad V6 schematic library. - - Args: - get_name_only: If true, scan the part definition until the - name and aliases are found. The rest of the definition - will be parsed if the part is actually used. + Returns: + str: String containing netlist text. """ - - # For info on part library format, look at: - # https://docs.google.com/document/d/1lyL_8FWZRouMkwqLiIt84rd2Htg4v1vz8_2MzRKHRkc/edit - # https://gitlab.com/kicad/code/kicad/-/blob/master/eeschema/sch_plugins/kicad/sch_sexpr_parser.cpp - - from ...pin import Pin - - # Return if there's nothing to do (i.e., part has already been parsed). - if not self.part_defn: - return - - # If a part def already exists, the name has already been set, so exit. - if get_name_only: - return - - self.aliases = [] # Part aliases. - self.fplist = [] # Footprint list. - self.draw = [] # Drawing commands for symbol, including pins. - - part_defn = parse_sexp(self.part_defn, allow_underflow=True) - - for item in part_defn: - if to_list(item)[0] == "extends": - # Populate this part (child) from another part (parent) it is extended from. - - # Make a copy of the parent part from the library. - parent_part_name = item[1] - parent_part = self.lib[parent_part_name].copy(dest=TEMPLATE) - - # Remove parent attributes that we don't want to overwrite in the child. - parent_part_dict = parent_part.__dict__ - for key in ( - "part_defn", - "name", - "aliases", - "description", - "datasheet", - "keywords", - "search_text", - ): - try: - del parent_part_dict[key] - except KeyError: - pass - - # Overwrite child with the parent part. - self.__dict__.update(parent_part_dict) - - # Make sure all the pins have a valid reference to the child. - self.associate_pins() - - # Copy part units so all the pin and part references stay valid. - self.copy_units(parent_part) - - # Perform some operations on the child part. - for item in part_defn: - cmd = to_list(item)[0] - if cmd == "del": - self.rmv_pins(item[1]) - elif cmd == "swap": - self.swap_pins(item[1], item[2]) - elif cmd == "renum": - self.renumber_pin(item[1], item[2]) - elif cmd == "rename": - self.rename_pin(item[1], item[2]) - elif cmd == "property_del": - del self.fields[item[1]] - elif cmd == "alternate": - pass - - break - - # Populate part fields from symbol properties. - properties = { - item[1]: item[2:] for item in part_defn if to_list(item)[0] == "property" - } - for name, data in properties.items(): - value = data[0] - for item in data[1:]: - if to_list(item)[0] == "id": - self.fields["F" + str(item[1])] = value - break - self.fields[name] = value - - self.ref_prefix = self.fields["F0"] # Part ref prefix (e.g., 'R'). - - # Association between KiCad and SKiDL pin types. - pin_io_type_translation = { - "input": Pin.types.INPUT, - "output": Pin.types.OUTPUT, - "bidirectional": Pin.types.BIDIR, - "tri_state": Pin.types.TRISTATE, - "passive": Pin.types.PASSIVE, - "unspecified": Pin.types.UNSPEC, - "power_in": Pin.types.PWRIN, - "power_out": Pin.types.PWROUT, - "open_collector": Pin.types.OPENCOLL, - "open_emitter": Pin.types.OPENEMIT, - "no_connect": Pin.types.NOCONNECT, - } - - # Find all the units within a symbol. Skip the first item which is the - # 'symbol' marking the start of the entire part definition. - units = [item for item in part_defn[1:] if to_list(item)[0] == "symbol"] - self.num_units = len(units) - - # Get pins and assign them to each unit as well as the entire part. - unit_nums = [] # Stores unit numbers for units with pins. - for unit in units: - - # Extract the part name, unit number, and conversion flag. - unit_name_pieces = unit[1].split("_") # unit name follows 'symbol' - symbol_name = "_".join(unit_name_pieces[:-2]) - assert symbol_name == self.name - unit_num = int(unit_name_pieces[-2]) - conversion_flag = int(unit_name_pieces[-1]) - - # Don't add this unit to the part if the conversion flag is 0. - if not conversion_flag: - continue - - # Get the pins for this unit. - unit_pins = [item for item in unit if to_list(item)[0] == "pin"] - - # Save unit number if the unit has pins. Use this to create units - # after the entire part is created. - if unit_pins: - unit_nums.append(unit_num) - - # Process the pins for the current unit. - for pin in unit_pins: - - # Pin electrical type immediately follows the "pin" tag. - pin_func = pin_io_type_translation[pin[1]] - - # Find the pin name and number starting somewhere after the pin function and shape. - pin_name = "" - pin_number = None - for item in pin[3:]: - item = to_list(item) - if item[0] == "name": - pin_name = item[1] - elif item[0] == "number": - pin_number = item[1] - - # Add the pins that were found to the total part. Include the unit identifier - # in the pin so we can find it later when the part unit is created. - self.add_pins( - Pin(name=pin_name, num=pin_number, func=pin_func, unit=unit_num) - ) - - # Clear the part reference field directly. Don't use the setter function - # since it will try to generate and assign a unique part reference if - # passed a value of None. - self._ref = None - - # Make sure all the pins have a valid reference to this part. - self.associate_pins() - - # Create the units now that all the part pins have been added. - if len(unit_nums) > 1: - for unit_num in unit_nums: - unit_label = "u" + num_to_chars(unit_num) - self.make_unit(unit_label, unit=unit_num) - - # Part definition has been parsed, so clear it out. This prevents a - # part from being parsed more than once. - self.part_defn = None - - -
[docs]def gen_netlist(self): from .. import KICAD scr_dict = scriptinfo() @@ -963,11 +180,11 @@

Source code for skidl.tools.kicad.kicad

     )
     netlist = template.format(**locals())
     netlist += "  (components"
-    for p in sorted(self.parts, key=lambda p: str(p.ref)):
+    for p in sorted(circuit.parts, key=lambda p: str(p.ref)):
         netlist += "\n" + p.generate_netlist_component(KICAD)
     netlist += ")\n"
     netlist += "  (nets"
-    sorted_nets = sorted(self.get_nets(), key=lambda n: str(n.name))
+    sorted_nets = sorted(circuit.get_nets(), key=lambda n: str(n.name))
     for code, n in enumerate(sorted_nets, 1):
         n.code = code
         netlist += "\n" + n.generate_netlist_net(KICAD)
@@ -975,30 +192,35 @@ 

Source code for skidl.tools.kicad.kicad

     return netlist
-
[docs]def gen_netlist_comp(self): - ref = add_quotes(self.ref) +
[docs]def gen_netlist_comp(part): + """Generate the netlist text describing a component. - value = add_quotes(self.value_str) + Args: + part (Part): Part object. - try: - footprint = self.footprint - except AttributeError: - active_logger.error( - "No footprint for {part}/{ref}.".format(part=self.name, ref=ref) - ) - footprint = "No Footprint" + Returns: + str: String containing component netlist description. + """ + + from ...circuit import HIER_SEP + + ref = add_quotes(part.ref) + + value = add_quotes(part.value_str) + + footprint = getattr(part, "footprint", "") footprint = add_quotes(footprint) - lib_filename = getattr(getattr(self, "lib", ""), "filename", "NO_LIB") - part_name = add_quotes(self.name) + lib_filename = getattr(getattr(part, "lib", ""), "filename", "NO_LIB") + part_name = add_quotes(part.name) # Embed the hierarchy along with a random integer into the sheetpath for each component. # This enables hierarchical selection in pcbnew. - hierarchy = add_quotes("/" + self.hierarchical_name.replace(".", "/")) + hierarchy = add_quotes("/" + part.hierarchical_name.replace(HIER_SEP, "/")) tstamps = hierarchy fields = "" - for fld_name, fld_value in self.fields.items(): + for fld_name, fld_value in part.fields.items(): fld_value = add_quotes(fld_value) if fld_value: fld_name = add_quotes(fld_name) @@ -1021,11 +243,19 @@

Source code for skidl.tools.kicad.kicad

     return txt
-
[docs]def gen_netlist_net(self): - code = add_quotes(self.code) - name = add_quotes(self.name) +
[docs]def gen_netlist_net(net): + """Generate the netlist text describing a net. + + Args: + part (Net): Net object. + + Returns: + str: String containing net netlist description. + """ + code = add_quotes(net.code) + name = add_quotes(net.name) txt = " (net (code {code}) (name {name})".format(**locals()) - for p in sorted(self.get_pins(), key=str): + for p in sorted(net.pins, key=str): part_ref = add_quotes(p.part.ref) pin_num = add_quotes(p.num) txt += "\n (node (ref {part_ref}) (pin {pin_num}))".format(**locals()) @@ -1033,8 +263,17 @@

Source code for skidl.tools.kicad.kicad

     return txt
-
[docs]def gen_pcb(self, file_): - """Create a KiCad PCB file directly from a Circuit object.""" +
[docs]def gen_pcb(circuit, pcb_file, fp_libs=None): + """Create a KiCad PCB file directly from a Circuit object. + + Args: + circuit (Circuit): Circuit object. + pcb_file: Either a file object that can be written to, or a string + containing a file name, or None. + fp_libs: List of directories containing footprint libraries. + Returns: + None. + """ # Keep the import in here so it doesn't get triggered unless this is used # so it eases some problems with tox testing. @@ -1047,11 +286,19 @@

Source code for skidl.tools.kicad.kicad

             "kinet2pcb module is missing. Can't generate a KiCad PCB without it."
         )
     else:
-        file_ = file_ or (get_script_name() + ".kicad_pcb")
-        kinet2pcb.kinet2pcb(self, file_)
+ pcb_file = pcb_file or (get_script_name() + ".kicad_pcb") + kinet2pcb.kinet2pcb(circuit, pcb_file, fp_libs)
+ + +
[docs]def gen_xml(circuit): + """Generate the XML describing a circuit. + Args: + circuit (Circuit): Circuit object. -
[docs]def gen_xml(self): + Returns: + str: String containing the XML for the circuit. + """ from .. import KICAD scr_dict = scriptinfo() @@ -1069,11 +316,11 @@

Source code for skidl.tools.kicad.kicad

     )
     netlist = template.format(**locals())
     netlist += "  <components>"
-    for p in self.parts:
+    for p in circuit.parts:
         netlist += "\n" + p.generate_xml_component(KICAD)
     netlist += "\n  </components>\n"
     netlist += "  <nets>"
-    for code, n in enumerate(self.get_nets()):
+    for code, n in enumerate(circuit.get_nets()):
         n.code = code
         netlist += "\n" + n.generate_xml_net(KICAD)
     netlist += "\n  </nets>\n"
@@ -1081,23 +328,31 @@ 

Source code for skidl.tools.kicad.kicad

     return netlist
-
[docs]def gen_xml_comp(self): - ref = self.ref - value = self.value_str +
[docs]def gen_xml_comp(part): + """Generate the XML describing a component. + + Args: + part (Part): Part object. + + Returns: + str: String containing the XML for the part. + """ + ref = part.ref + value = part.value_str try: - footprint = self.footprint + footprint = part.footprint except AttributeError: active_logger.error( - "No footprint for {part}/{ref}.".format(part=self.name, ref=ref) + "No footprint for {part}/{ref}.".format(part=part.name, ref=ref) ) footprint = "No Footprint" - lib_filename = getattr(getattr(self, "lib", ""), "filename", "NO_LIB") - part_name = add_quotes(self.name) + lib_filename = getattr(getattr(part, "lib", ""), "filename", "NO_LIB") + part_name = add_quotes(part.name) fields = "" - for fld_name, fld_value in self.fields.items(): + for fld_name, fld_value in part.fields.items(): fld_value = add_quotes(fld_value) if fld_value: fld_name = add_quotes(fld_name) @@ -1120,11 +375,11 @@

Source code for skidl.tools.kicad.kicad

     return txt
-
[docs]def gen_xml_net(self): - code = self.code - name = self.name +
[docs]def gen_xml_net(net): + code = net.code + name = net.name txt = ' <net code="{code}" name="{name}">'.format(**locals()) - for p in self.get_pins(): + for p in net.pins: part_ref = p.part.ref pin_num = p.num txt += '\n <node ref="{part_ref}" pin="{pin_num}"/>'.format(**locals()) @@ -1132,603 +387,22 @@

Source code for skidl.tools.kicad.kicad

     return txt
-
[docs]def gen_svg_comp(self, symtx, net_stubs=None): +
[docs]def gen_svg_comp(part, symtx, net_stubs=None): """ Generate SVG for this component. Args: - self: Part object for which an SVG symbol will be created. + part: Part object for which an SVG symbol will be created. + symtx: String such as "HR" that indicates symbol mirroring/rotation. net_stubs: List of Net objects whose names will be connected to part symbol pins as connection stubs. - symtx: String such as "HR" that indicates symbol mirroring/rotation. - Returns: SVG for the part symbol.""" - - def tx(obj, ops): - """Transform Point, number, or direction according to the list of opcodes.""" - - def H(obj): - # Flip horizontally. - if isinstance(obj, Point): - return Point(-obj.x, obj.y) - if isinstance(obj, (float, int)): - return 180.0 - obj - else: - return {"U": "U", "D": "D", "L": "R", "R": "L"}[obj] - - def V(obj): - # Flip vertically. - if isinstance(obj, Point): - return Point(obj.x, -obj.y) - if isinstance(obj, (float, int)): - return -obj - else: - return {"U": "D", "D": "U", "L": "L", "R": "R"}[obj] - - def R(obj): - # Rotate right. - if isinstance(obj, Point): - return Point(-obj.y, obj.x) - if isinstance(obj, (float, int)): - return obj + 90.0 - else: - return {"U": "R", "D": "L", "L": "U", "R": "D"}[obj] - - def L(obj): - # Rotate left. - if isinstance(obj, Point): - return Point(obj.y, -obj.x) - if isinstance(obj, (float, int)): - return obj - 90.0 - else: - return {"U": "L", "D": "R", "L": "D", "R": "U"}[obj] - - # Each character in ops applies a geometrical transformation. - for op in ops: - obj = locals()[op.upper()](obj) # op selects the H, V, L, or R subroutine. - return obj - - def draw_text(text, size, justify, origin, rotation, offset, class_, extra=""): - return " ".join( - [ - "<text", - "class='{class_}'", - "text-anchor='{justify}'", - "x='{origin.x}' y='{origin.y}'", - "transform='rotate({rotation} {origin.x} {origin.y}) translate({offset.x} {offset.y})'", - "style='font-size:{size}px'", - "{extra}", - ">", - "{text}", - "</text>", - ] - ).format(**locals()) - - def make_pin_dir_tbl(abs_xoff=20): - - # abs_xoff is the absolute distance of name/num from the end of the pin. - rel_yoff_num = -0.15 # Relative distance of number above pin line. - rel_yoff_name = ( - 0.2 # Relative distance that places name midline even with pin line. - ) - - # Tuple for storing information about pins in each of four directions: - # direction: The direction the pin line is drawn from start to end. - # side: The side of the symbol the pin is on. (Opposite of the direction.) - # angle: The angle of the name/number text for the pin (usually 0, -90.). - # num_justify: Text justification of the pin number. - # name_justify: Text justification of the pin name. - # num_offset: (x,y) offset of the pin number w.r.t. the end of the pin. - # name_offset: (x,y) offset of the pin name w.r.t. the end of the pin. - PinDir = namedtuple( - "PinDir", - "direction side angle num_justify name_justify num_offset name_offset net_offset", - ) - - return { - "U": PinDir( - Point(0, -1), - "bottom", - -90, - "end", - "start", - Point(-abs_xoff, rel_yoff_num), - Point(abs_xoff, rel_yoff_name), - Point(abs_xoff, rel_yoff_num), - ), - "D": PinDir( - Point(0, 1), - "top", - -90, - "start", - "end", - Point(abs_xoff, rel_yoff_num), - Point(-abs_xoff, rel_yoff_name), - Point(-abs_xoff, rel_yoff_num), - ), - "L": PinDir( - Point(-1, 0), - "right", - 0, - "start", - "end", - Point(abs_xoff, rel_yoff_num), - Point(-abs_xoff, rel_yoff_name), - Point(-abs_xoff, rel_yoff_num), - ), - "R": PinDir( - Point(1, 0), - "left", - 0, - "end", - "start", - Point(-abs_xoff, rel_yoff_num), - Point(abs_xoff, rel_yoff_name), - Point(abs_xoff, rel_yoff_num), - ), - } - - fill_tbl = {"f": "background_fill", "F": "pen_fill", "N": ""} - - scale = 0.30 # Scale of KiCad units to SVG units. - default_thickness = 1 / scale # Default line thickness = 1. - default_pin_name_offset = 20 - - # Named tuple for storing component pin information. - PinInfo = namedtuple("PinInfo", "x y side pid") - - # Get maximum length of net stub name if any are needed for this part symbol. - net_stubs = net_stubs or [] # Empty list of stub nets if argument is None. - max_stub_len = 0 # If no net stubs are needed, this stays at zero. - for pin in self.get_pins(): - for net in pin.get_nets(): - # Don't let names for no-connect nets affect maximum stub length. - if net in [NC, None]: - continue - if net in net_stubs: - max_stub_len = max(len(net.name), max_stub_len) - - # Go through each graphic object that makes up the component symbol. - for obj in self.draw: - - obj_pin_info = ( - [] - ) # Component pin info so they can be generated once bbox is known. - obj_svg = [] # Component graphic objects. - obj_filled_svg = [] # Filled component graphic objects. - obj_txt_svg = [] # Component text (because it has to be drawn last). - obj_bbox = BBox() # Bounding box of all the component objects. - - if isinstance(obj, DrawDef): - def_ = obj - show_name = def_.name[0] != "~" - show_nums = def_.show_nums == "Y" - show_names = def_.show_names == "Y" - # Make pin direction table with symbol-specific name offset. - pin_dir_tbl = make_pin_dir_tbl(def_.name_offset or default_pin_name_offset) - # Make structures for holding info on each part unit. - num_units = def_.num_units - unit_pin_info = [[] for _ in range(num_units + 1)] - unit_svg = [[] for _ in range(num_units + 1)] - unit_filled_svg = [[] for _ in range(num_units + 1)] - unit_txt_svg = [[] for _ in range(num_units + 1)] - unit_bbox = [BBox() for _ in range(num_units + 1)] - - elif isinstance(obj, DrawF0): - f0 = obj - if f0.visibility != "I": - # F0 field is not invisible. - origin = tx(Point(f0.x, -f0.y), symtx) * scale - orientation = f0.orientation + f0.halign - dir = { - "HL": "L", - "HC": "L", - "HR": "R", - "VL": "D", - "VC": "D", - "VR": "U", - }[orientation] - dir = tx(dir, symtx) - angle = pin_dir_tbl[dir].angle - size = f0.size * scale - justify = "middle" if f0.halign == "C" else pin_dir_tbl[dir].num_justify - offset = ( - tx( - {"T": Point(0, 1), "B": Point(0, 0), "C": Point(0, 0.5)}[ - f0.valign[0] - ], - symtx, - ) - * size - ) - class_ = "part_ref_text" - extra = 's:attribute="ref"' - obj_txt_svg.append( - draw_text("X", size, justify, origin, angle, offset, class_, extra) - ) - - elif isinstance(obj, DrawF1): - f1 = obj - if f1.visibility != "I" and show_name: - # F1 field is not invisible. - origin = tx(Point(f1.x, -f1.y), symtx) * scale - orientation = f1.orientation + f1.halign - dir = { - "HL": "L", - "HC": "L", - "HR": "R", - "VL": "D", - "VC": "D", - "VR": "U", - }[orientation] - dir = tx(dir, symtx) - angle = pin_dir_tbl[dir].angle - size = f1.size * scale - justify = "middle" if f1.halign == "C" else pin_dir_tbl[dir].num_justify - offset = ( - tx( - {"T": Point(0, 1), "B": Point(0, 0), "C": Point(0, 0.5)}[ - f1.valign[0] - ], - symtx, - ) - * size - ) - class_ = "part_name_text" - extra = 's:attribute="value"' - obj_txt_svg.append( - draw_text("X", size, justify, origin, angle, offset, class_, extra) - ) - - elif isinstance(obj, DrawArc): - arc = obj - center = tx(Point(arc.cx, -arc.cy), symtx) * scale - radius = arc.radius * scale - start = tx(Point(arc.startx, -arc.starty), symtx) * scale - end = tx(Point(arc.endx, -arc.endy), symtx) * scale - start_angle = tx(arc.start_angle / 10, symtx) - end_angle = tx(arc.end_angle / 10, symtx) - clock_wise = int(end_angle < start_angle) - large_arc = int(abs(end_angle - start_angle) > 180) - thickness = (arc.thickness or default_thickness) * scale - fill = fill_tbl.get(arc.fill, "") - radius_pt = Point(radius, radius) - obj_bbox.add(center - radius_pt) - obj_bbox.add(center + radius_pt) - svg = obj_filled_svg if fill else obj_svg - svg.append( - " ".join( - [ - "<path", - 'd="M {start.x} {start.y} A {radius} {radius} 0 {large_arc} {clock_wise} {end.x} {end.y}"', - 'style="stroke-width:{thickness}"', - 'class="$cell_id symbol {fill}"', - "/>", - ] - ).format(**locals()) - ) - - elif isinstance(obj, DrawCircle): - circle = obj - center = tx(Point(circle.cx, -circle.cy), symtx) * scale - radius = circle.radius * scale - thickness = (circle.thickness or default_thickness) * scale - fill = fill_tbl.get(circle.fill, "") - radius_pt = Point(radius, radius) - obj_bbox.add(center - radius_pt) - obj_bbox.add(center + radius_pt) - svg = obj_filled_svg if fill else obj_svg - svg.append( - " ".join( - [ - "<circle", - 'cx="{center.x}" cy="{center.y}" r="{radius}"', - 'style="stroke-width:{thickness}"', - 'class="$cell_id symbol {fill}"', - "/>", - ] - ).format(**locals()) - ) - - elif isinstance(obj, DrawPoly): - poly = obj - pts = [ - tx(Point(x, -y), symtx) * scale - for x, y in zip(poly.points[0::2], poly.points[1::2]) - ] - path = [] - path_op = "M" - for pt in pts: - obj_bbox.add(pt) - path.append("{path_op} {pt.x} {pt.y}".format(**locals())) - path_op = "L" - path = " ".join(path) - thickness = (poly.thickness or default_thickness) * scale - fill = fill_tbl.get(poly.fill, "") - svg = obj_filled_svg if fill else obj_svg - svg.append( - " ".join( - [ - "<path", - 'd="{path}"', - 'style="stroke-width:{thickness}"', - 'class="$cell_id symbol {fill}"', - "/>", - ] - ).format(**locals()) - ) - - elif isinstance(obj, DrawRect): - rect = obj - start = tx(Point(rect.x1, -rect.y1), symtx) * scale - end = tx(Point(rect.x2, -rect.y2), symtx) * scale - obj_bbox.add(start) - obj_bbox.add(end) - rect_bbox = BBox(start, end) - thickness = (rect.thickness or default_thickness) * scale - fill = fill_tbl.get(rect.fill, "") - svg = obj_filled_svg if fill else obj_svg - svg.append( - " ".join( - [ - "<rect", - 'x="{rect_bbox.min.x}" y="{rect_bbox.min.y}"', - 'width="{rect_bbox.w}" height="{rect_bbox.h}"', - 'style="stroke-width:{thickness}"', - 'class="$cell_id symbol {fill}"', - "/>", - ] - ).format(**locals()) - ) - - elif isinstance(obj, DrawText): - text = obj - origin = tx(Point(text.x, -text.y), symtx) * scale - angle = tx(text.angle, symtx) - size = text.size * scale - justify = {"L": "start", "C": "middle", "R": "end"}[text.halign] - offset = ( - tx( - {"T": Point(0, 1), "B": Point(0, 0), "C": Point(0, 0.5)}[ - text.valign - ], - symtx, - ) - * size - ) - obj_txt_svg.append( - draw_text( - text.text, size, justify, origin, angle, offset, class_="part_text" - ) - ) - - elif isinstance(obj, DrawPin): - - pin = obj - part_pin = self[ - pin.num - ] # Get Pin object associated with this pin drawing object. - - try: - visible = pin.shape[0] != "N" - except IndexError: - visible = True # No pin shape given, so it is visible by default. - - # Start pin group. - orientation = tx(pin.orientation, symtx) - dir = pin_dir_tbl[orientation].direction - if part_pin.net in [None, NC]: - # Unconnected pins remain at the length of the default symbol pin. - extension = Point(0, 0) - else: - # Extend the pin if it's connected to a net. - extension = ( - dir - * ( - pin.name_size * 0.5 * max_stub_len - + 2 * abs(pin_dir_tbl[orientation].net_offset.x) - ) - * scale - ) - start = tx(Point(pin.x, -pin.y), symtx) * scale - extension - side = pin_dir_tbl[orientation].side - obj_pin_info.append(PinInfo(x=start.x, y=start.y, side=side, pid=pin.num)) - - if visible: - # Draw pin if it's not invisible. - - # Create line for pin lead. - l = dir * pin.length * scale - end = start + l + extension - thickness = default_thickness * scale - obj_bbox.add(start) - obj_bbox.add(end) - obj_svg.append( - " ".join( - [ - "<path", - 'd="M {start.x} {start.y} L {end.x} {end.y}"', - 'style="stroke-width:{thickness}"', - 'class="$cell_id symbol"' "/>", - ] - ).format(**locals()) - ) - - # Create pin number. - if show_nums: - angle = pin_dir_tbl[orientation].angle - num_justify = pin_dir_tbl[orientation].num_justify - num_size = pin.num_size * scale - num_offset = pin_dir_tbl[orientation].num_offset * scale - num_offset.y = num_offset.y * pin.num_size - # Pin nums are text, but they go into graphical SVG because they are part of a pin object. - obj_svg.append( - draw_text( - str(pin.num), - num_size, - num_justify, - end, - angle, - num_offset, - "pin_num_text", - ) - ) - - # Create pin name. - if pin.name != "~" and show_names: - name_justify = pin_dir_tbl[orientation].name_justify - name_size = pin.name_size * scale - name_offset = pin_dir_tbl[orientation].name_offset * scale - name_offset.y = name_offset.y * pin.name_size - # Pin names are text, but they go into graphical SVG because they are part of a pin object. - obj_svg.append( - draw_text( - str(pin.name), - name_size, - name_justify, - end, - angle, - name_offset, - "pin_name_text", - ) - ) - - # Create net stub name. - if max_stub_len: - # Only do this if stub length > 0; otherwise, no stubs are needed. - for net in part_pin.get_nets(): - # Don't create stubs for no-connect nets. - if net in [NC, None]: - continue - if net in net_stubs: - net_justify = pin_dir_tbl[orientation].name_justify - net_size = ( - pin.name_size * scale - ) # Net name font size same as pin name font size. - net_offset = pin_dir_tbl[orientation].net_offset * scale - net_offset.y = net_offset.y * pin.name_size - obj_svg.append( - draw_text( - net.name, - net_size, - net_justify, - start, - angle, - net_offset, - "net_name_text", - ) - ) - break # Only one label is needed per stub. - - else: - active_logger.error( - "Unknown graphical object {} in part symbol {}.".format( - type(obj), self.name - ) - ) - - # Enter the current object into the SVG for this part. - unit = getattr(obj, "unit", 0) - if unit == 0: - # Anything in unit #0 gets added to all units. - for pin_info in unit_pin_info: - pin_info.extend(obj_pin_info) - for svg in unit_svg: - svg.extend(obj_svg) - for svg in unit_filled_svg: - svg.extend(obj_filled_svg) - for txt_svg in unit_txt_svg: - txt_svg.extend(obj_txt_svg) - for bbox in unit_bbox: - bbox.add(obj_bbox) - else: - unit_pin_info[unit].extend(obj_pin_info) - unit_svg[unit].extend(obj_svg) - unit_filled_svg[unit].extend(obj_filled_svg) - unit_txt_svg[unit].extend(obj_txt_svg) - unit_bbox[unit].add(obj_bbox) - - # End of loop through all the component objects. - - # Assemble and name the SVGs for all the part units. - svg = [] - for unit in range(1, num_units + 1): - bbox = unit_bbox[unit] - - # Assign part unit name. - if max_stub_len: - # If net stubs are attached to symbol, then it's only to be used - # for a specific part. Therefore, tag the symbol name with the unique - # part reference so it will only be used by this part. - symbol_name = "{self.name}_{self.ref}_{unit}_{symtx}".format(**locals()) - else: - # No net stubs means this symbol can be used for any part that - # also has no net stubs, so don't tag it with a specific part reference. - symbol_name = "{self.name}_{unit}_{symtx}".format(**locals()) - - # Begin SVG for part unit. Translate it so the bbox.min is at (0,0). - translate = bbox.min * -1 - svg.append( - " ".join( - [ - "<g", - 's:type="{symbol_name}"', - 's:width="{bbox.w}"', - 's:height="{bbox.h}"', - 'transform="translate({translate.x},{translate.y})"', - ">", - ] - ).format(**locals()) - ) - - # Add part alias. - svg.append('<s:alias val="{symbol_name}"/>'.format(**locals())) - - # Add part unit text and graphics. - svg.extend(unit_filled_svg[unit]) # Filled items go on the bottom. - svg.extend(unit_svg[unit]) # Then unfilled items. - svg.extend(unit_txt_svg[unit]) # Text comes last. - - # Place a visible bounding-box around symbol for trouble-shooting. - show_bbox = False - if show_bbox: - svg.append( - " ".join( - [ - "<rect", - 'x="{bbox.min.x}" y="{bbox.min.y}"', - 'width="{bbox.w}" height="{bbox.h}"', - 'style="stroke-width:3; stroke:#f00"', - 'class="$cell_id symbol"', - "/>", - ] - ).format(**locals()) - ) - - # Keep the pins out of the grouped text & graphics but adjust their coords - # to account for moving the bbox. - for pin_info in unit_pin_info[unit]: - pin_pt = Point(pin_info.x, pin_info.y) - side = pin_info.side - pid = pin_info.pid - pin_svg = '<g s:x="{pin_pt.x}" s:y="{pin_pt.y}" s:pid="{pid}" s:position="{side}"/>'.format( - **locals() - ) - svg.append(pin_svg) - - # Finish SVG for part unit. - svg.append("</g>") - - return "\n".join(svg)
- - -
[docs]def gen_pinboxes(self): - """Generate bounding box and I/O pin positions for each unit in a part.""" - pass
- - -
[docs]def gen_schematic(self, route): - pass
+ Returns: SVG for the part symbol. + """ + if part.tool_version == "kicad_v6": + return v6.gen_svg_comp(part, symtx, net_stubs=None) + else: + return v5.gen_svg_comp(part, symtx, net_stubs=None)
@@ -1767,7 +441,7 @@

Navigation

\ No newline at end of file diff --git a/docs/api/html/_modules/skidl/tools/skidl/skidl.html b/docs/api/html/_modules/skidl/tools/skidl/skidl.html index 20a2864c..f6e35ade 100644 --- a/docs/api/html/_modules/skidl/tools/skidl/skidl.html +++ b/docs/api/html/_modules/skidl/tools/skidl/skidl.html @@ -64,8 +64,6 @@

Source code for skidl.tools.skidl.skidl

 
 from future import standard_library
 
-from ...logger import active_logger
-
 standard_library.install_aliases()
 
 
@@ -83,13 +81,16 @@ 

Source code for skidl.tools.skidl.skidl

         filename: The name of the SKiDL schematic library file.
     """
 
+    from ...logger import active_logger
     from ...schlib import SchLib
-    from ...skidl import active_logger, lib_suffixes
-    from ...utilities import find_and_open_file
+    from ...skidl import lib_suffixes
+    from ...utilities import find_and_read_file
     from .. import SKIDL
 
     try:
-        f, path = find_and_open_file(filename, lib_search_paths_, lib_suffixes[SKIDL])
+        contents, path = find_and_read_file(
+            filename, lib_search_paths_, lib_suffixes[SKIDL]
+        )
     except FileNotFoundError as e:
         raise FileNotFoundError(
             "Unable to open SKiDL Schematic Library File {} ({})".format(
@@ -102,7 +103,7 @@ 

Source code for skidl.tools.skidl.skidl

         vars_ = {
             "__file__": path,
         }
-        exec(f.read(), vars_)  # Execute and store library in dict.
+        exec(contents, vars_)  # Execute and store library in dict.
 
         # Now look through the dict to find the library object.
         for val in vars_.values():
@@ -115,12 +116,12 @@ 

Source code for skidl.tools.skidl.skidl

         raise ValueError("No SchLib object found in {}".format(filename))
 
     except Exception as e:
-        active_logger.error("Problem with {}".format(f))
+        active_logger.error("Problem with {}".format(filename))
         active_logger.error(e)
         raise
-
[docs]def parse_lib_part(self, get_name_only=False): # pylint: disable=unused-argument +
[docs]def parse_lib_part(self, partial_parse=False): # pylint: disable=unused-argument """ Create a Part using a part definition from a SKiDL library. """ @@ -166,7 +167,7 @@

Navigation

\ No newline at end of file diff --git a/docs/api/html/_modules/skidl/tools/spice/spice.html b/docs/api/html/_modules/skidl/tools/spice/spice.html index 41273ec2..5db52248 100644 --- a/docs/api/html/_modules/skidl/tools/spice/spice.html +++ b/docs/api/html/_modules/skidl/tools/spice/spice.html @@ -61,16 +61,18 @@

Source code for skidl.tools.spice.spice

 )
 
 import os.path
+import re
+import sys
 from builtins import dict, int, object, range, str, zip
 
 from future import standard_library
 
-from ...common import USING_PYTHON2
+from ...alias import Alias
 from ...logger import active_logger
 from ...net import Net
-from ...part import Part
-from ...pin import Pin, PinList
-from ...utilities import *
+from ...part import LIBRARY, Part
+from ...pin import Pin
+from ...utilities import INDEX_SEPARATOR, find_and_open_file, find_and_read_file
 
 standard_library.install_aliases()
 
@@ -127,8 +129,6 @@ 

Source code for skidl.tools.spice.spice

         lib_search_paths_ : List of directories to search for the file.
     """
 
-    from ...part import Part
-    from ...pin import Pin
     from ...skidl import lib_suffixes
     from .. import SPICE
 
@@ -137,14 +137,13 @@ 

Source code for skidl.tools.spice.spice

         spice_lib_path = os.path.abspath(filename)
     else:
         # A file name was given, so find the absolute file path in the search paths.
-        fp, spice_lib_path = find_and_open_file(
+        _, spice_lib_path = find_and_open_file(
             filename=filename,
             paths=lib_search_paths_,
             ext=lib_suffixes[SPICE],
             exclude_binary=True,
             descend=-1,
         )
-        fp.close()  # Close the file pointer. We just need the path to the file.
 
     # Read the Spice library from the given path.
     spice_lib = SpiceLibrary(
@@ -198,7 +197,7 @@ 

Source code for skidl.tools.spice.spice

                     else:
                         # Now find a symbol file for the part to assign names to the pins.
                         # First, check for LTSpice symbol file.
-                        sym_file, sym_file_path = find_and_open_file(
+                        sym_file, _ = find_and_read_file(
                             part.name,
                             lib_search_paths_,
                             ".asy",
@@ -209,7 +208,7 @@ 

Source code for skidl.tools.spice.spice

                         if sym_file:
                             pin_names = []
                             pin_indices = []
-                            for sym_line in sym_file:
+                            for sym_line in sym_file.split("\n"):
                                 if not sym_line:
                                     continue
                                 if sym_line.lower().startswith("pinattr pinname"):
@@ -218,7 +217,6 @@ 

Source code for skidl.tools.spice.spice

                                     pin_indices.append(sym_line.split()[2])
                                 elif sym_line.lower().startswith("symattr description"):
                                     part.description = " ".join(sym_line.split()[2:])
-                            sym_file.close()
 
                             # Pin names and indices should be matched by the order they
                             # appeared in the symbol file. Each index should match the
@@ -227,7 +225,7 @@ 

Source code for skidl.tools.spice.spice

                                 part.pins[int(index) - 1].name = name
                         else:
                             # No LTSpice symbol file, so check for PSPICE symbol file.
-                            sym_file, sym_file_path = find_and_open_file(
+                            sym_file, _ = find_and_read_file(
                                 filename,
                                 lib_search_paths_,
                                 ".slb",
@@ -238,7 +236,7 @@ 

Source code for skidl.tools.spice.spice

                             if sym_file:
                                 pin_names = []
                                 active = False
-                                for sym_line in sym_file:
+                                for sym_line in sym_file.split("\n"):
                                     sym_line = sym_line.strip()
                                     if not sym_line:
                                         continue
@@ -250,7 +248,6 @@ 

Source code for skidl.tools.spice.spice

                                             pin_names.append(line_parts[6])
                                         elif line_parts[0] == "d":
                                             part.description = " ".join(line_parts[1:])
-                                sym_file.close()
 
                                 pin_indices = list(range(len(pin_names)))
                                 for pin, name in zip(part.pins, pin_names):
@@ -260,7 +257,7 @@ 

Source code for skidl.tools.spice.spice

                     self.add_parts(part)
-
[docs]def parse_lib_part(self, get_name_only=False): # pylint: disable=unused-argument +
[docs]def parse_lib_part(self, partial_parse=False): # pylint: disable=unused-argument """ Create a Part using a part definition from a SPICE library. """ @@ -300,15 +297,13 @@

Source code for skidl.tools.spice.spice

     """
 
     from ...skidl import lib_search_paths
+    from .. import SPICE
 
-    if USING_PYTHON2:
-        return None
-
-    # Replace any special chars in all net names because Spice won't like them.
-    # Don't use self.get_nets() because that only returns a single net from a
-    # group of attached nets so the other nets won't get renamed.
-    for net in self.nets:
-        net.replace_spec_chars_in_name()
+    if sys.version_info.major == 2:
+        active_logger.raise_(
+            NotImplementedError,
+            "PySpice does not support Python 2, so a SPICE netlist cannot be generated.",
+        )
 
     # Create an empty PySpice circuit.
     title = kwargs.pop("title", "")  # Get title and remove it from kwargs.
@@ -396,9 +391,11 @@ 

Source code for skidl.tools.spice.spice

 
 
[docs]def node(net_pin_part): if isinstance(net_pin_part, Net): - return net_pin_part.name + # Replace any special chars in a net name because Spice doesn't like them. + return re.sub(r"\W", "_", net_pin_part.name) if isinstance(net_pin_part, Pin): - return net_pin_part.net.name + # Replace any special chars in a net name because Spice doesn't like them. + return re.sub(r"\W", "_", net_pin_part.net.name) if isinstance(net_pin_part, Part): return net_pin_part.ref
@@ -551,7 +548,7 @@

Source code for skidl.tools.spice.spice

         if isinstance(pin, Pin):
             # Add a non-vector pin. Use _xspice_node() in case pin is unconnected.
             args.append(_xspice_node(pin))
-        elif isinstance(pin, PinList):
+        elif isinstance(pin, XspicePinList):
             # Add pins from a pin vector.
             args.append("[" + " ".join([node(p) for p in pin]) + "]")
         else:
@@ -562,6 +559,136 @@ 

Source code for skidl.tools.spice.spice

 
     # Add the part to the PySpice circuit.
     getattr(circuit, part.pyspice["name"])(*args, **kwargs)
+ + +
[docs]def add_xspice_io(part, io): + """ + Add XSPICE I/O to the pins of a part. + """ + if not io: + return + + # Change a string into a list with a single string element. + if isinstance(io, basestring): + io = [io] + + # Join all the pin name arguments into a comma-separated string and then split them into a list. + ios = re.split(INDEX_SEPARATOR, ",".join(io)) + + # Add a pin to the part for each pin name. + for i, arg in enumerate(ios): + arg = arg.strip() # Strip any spaces that may have been between pin names. + + # If [pin_name] or pin_name[], then add a PinList to the part. Don't use + # part.add_pins() because it will flatten the PinList and add nothing since + # the PinList is empty. + if arg[0] + arg[-1] == "[]": + part.pins.append(XspicePinList(num=i, name=arg[1:-1], part=part)) + elif arg[-2:] == "[]": + part.pins.append(XspicePinList(num=i, name=arg[0:-2], part=part)) + else: + # Add a simple, non-vector pin. + part.add_pins(Pin(num=i, name=arg))
+ + +
[docs]def convert_for_spice(part, spice_part, pin_map): + """Convert a Part object for use with SPICE. + + Args: + part: SKiDL Part object that will be converted for use as a SPICE component. + spice_part (Part): The type of SPICE Part to be converted to. + pin_map (dict): Dict with pin numbers/names of part as keys and num/names of spice_part pins as replacement values. + """ + + # Give the part access to the PySpice information from the SPICE part. + part.pyspice = spice_part.pyspice + + # Give the part the additional aliases from the SPICE part. + part.aliases += spice_part.aliases + + # Look-up pin names/numbers to create a mapping between actual Pin objects. + pin_map = [[part[dst], spice_part[src]] for dst, src in pin_map.items()] + + # Pull some info from the SPICE part pins into the part pins. + for dst_pin, src_pin in pin_map: + dst_pin.num = src_pin.num + dst_pin.name = src_pin.name + dst_pin.aliases += src_pin.aliases
+ + +
[docs]class XspicePinList(list): + """ + A list of Pin objects that's meant to look something like a Pin to a Part. + This is used for vector I/O of XSPICE parts. + """ + + def __init__(self, num, name, part): + super().__init__() + # The list needs the following attributes to behave like a Pin. + self.aliases = Alias() + self.num = num + self.name = name + self.part = part + + def __getitem__(self, i): + """ + Get a Pin from the list. Add Pin objects to the list if they don't exist. + """ + l = super().__len__() + if i >= l: + self.extend([Pin(num=j, part=self.part) for j in range(l, i + 1)]) + return super().__getitem__(i) + + def __iter__(self): + if super().__len__() == 0: + tmp = [Pin()] + return (p for p in tmp) + return (p for p in super().__iter__()) # Return generator expr. + + def __len__(self): + l = super().__len__() + return l or 1 + +
[docs] def copy(self, **attribs): + """ + Return a copy of a PinList for use when a Part is copied. + + Args: + attribs(dict): Attributes to apply to copied part pins. + """ + cpy = self.__class__(self.num, self.name, self.part) + for pin in self: + cpy += pin.copy(**attribs) + return cpy
+ +
[docs] def disconnect(self): + """Disconnect all the pins in the list.""" + for pin in self: + pin.disconnect()
+ +
[docs] def is_connected(self): + for pin in self: + if pin.is_connected(): + return True + return False
+ + @property + def name(self): + return self._name + + @name.setter + def name(self, nm): + del self.name # Remove any pre-existing name. + self.aliases += nm + self._name = nm + + @name.deleter + def name(self): + try: + self.aliases.discard(self._name) + self._name = None + except AttributeError: + pass
@@ -600,7 +727,7 @@

Navigation

\ No newline at end of file diff --git a/docs/api/html/_modules/skidl/utilities.html b/docs/api/html/_modules/skidl/utilities.html index eafd138b..cdb30638 100644 --- a/docs/api/html/_modules/skidl/utilities.html +++ b/docs/api/html/_modules/skidl/utilities.html @@ -60,66 +60,23 @@

Source code for skidl.utilities

     unicode_literals,
 )
 
+from future import standard_library
+
+standard_library.install_aliases()
+
 import collections
 import os
 import os.path
 import re
-import sys
 import traceback
-from builtins import chr, dict, int, object, open, range, str, super, zip
+from builtins import chr, dict, int, open, range, str, super
 from collections import namedtuple
 from contextlib import contextmanager
 
-from future import standard_library
-
-from .common import *
-
-standard_library.install_aliases()
-
-
 """Separator for strings containing multiple indices."""
 INDEX_SEPARATOR = re.compile("[, \t]+")
 
 
-
[docs]def norecurse(f): - """Decorator that keeps a function from recursively calling itself. - - Parameters - ---------- - f: function - """ - - def func(*args, **kwargs): - # If a function's name is on the stack twice (once for the current call - # and a second time for the previous call), then return withcurrent_level - # executing the function. - if len([1 for l in traceback.extract_stack() if l[2] == f.__name__]) > 1: - return None - - # Otherwise, not a recursive call so execute the function and return result. - return f(*args, **kwargs) - - return func
- - -
[docs]class TriggerDict(dict): - """This dict triggers a function when one of its entries changes.""" - - def __init__(self, *args, **kwargs): - super().__init__(*args, **kwargs) - - # Create a dict of functions that will be run if their associated - # key entries change. The functions arguments will be the main - # TriggerDict, the key, and the new value to be stored. - self.trigger_funcs = dict() - - def __setitem__(self, k, v): - if k in self.trigger_funcs: - if v != self[k]: - self.trigger_funcs[k](self, k, v) - super().__setitem__(k, v)
- -
[docs]def is_binary_file(filename): """Return true if a file contains binary (non-text) characters.""" text_chars = bytearray({7, 8, 9, 10, 12, 13, 27} | set(range(0x20, 0x100)) - {0x7F}) @@ -130,121 +87,6 @@

Source code for skidl.utilities

         return False
-
[docs]def merge_dicts(dct, merge_dct): - """ - Dict merge that recurses through both dicts and updates keys. - - Args: - dct: The dict that will be updated. - merge_dct: The dict whose values will be inserted into dct. - - Returns: - Nothing. - """ - - for k, v in list(merge_dct.items()): - if ( - k in dct - and isinstance(dct[k], dict) - and isinstance(merge_dct[k], collections.Mapping) - ): - merge_dicts(dct[k], merge_dct[k]) - else: - dct[k] = merge_dct[k]
- - -
[docs]def find_and_open_file( - filename, paths=None, ext=None, allow_failure=False, exclude_binary=False, descend=0 -): - """ - Search for a file in list of paths, open it and return file pointer and full file name. - - Args: - filename: Base file name (e.g., "my_file"). - paths: List of paths to search for the file. - ext: The extension for the file (e.g., ".txt"). - allow_failure: If false, failure to find file raises and exception. - exclude_binary: If true, skip files that contain binary data. - descend: If 0, don't search lower-level directories. If positive, search - that many levels down for the file. If negative, descend into - subdirectories withcurrent_level limit. - """ - - from .logger import active_logger - - if os.path.isabs(filename): - # Ignore search paths if the file already has an absolute path. - paths = [os.path.abspath(os.path.dirname(filename))] - elif not paths: - # If no search paths are given, use the current working directory. - paths = ["."] - - # Remove any directory path from the file name. - _, filename = os.path.split(filename) - - # Get the list of file extensions to check against. - base, suffix = os.path.splitext(filename) - if suffix: - # If an explicit file extension was given, just use that. - exts = [suffix] - else: - exts = to_list(ext) - - # Create the regular expression for matching against the filename. - exts = [re.escape(ext) for ext in exts] - match_name = re.escape(base) + "(" + "|".join(exts) + ")$" - - # Search through the directory paths for a file whose name matches the regular expression. - for path in paths: - # Search through the files in a particular directory path. - descent_ctr = descend # Controls the descent through the path. - for root, dirnames, filenames in os.walk(path): - # Get files in the current directory whose names match the regular expression. - for fn in [f for f in filenames if re.match(match_name, f)]: - abs_filename = os.path.join(root, fn) - if not exclude_binary or not is_binary_file(abs_filename): - try: - # Return the first file that matches the criteria. - return open(abs_filename, encoding="latin_1"), abs_filename - except (IOError, FileNotFoundError, TypeError): - # File failed, so keep searching. - pass - # Keep descending on this path as long as the descent counter is non-zero. - if descent_ctr == 0: - break # Cease search of this path if the counter is zero. - descent_ctr -= 1 # Decrement the counter for the next directory level. - - # Couldn't find a matching file. - if allow_failure: - return None, None - else: - active_logger.raise_( - FileNotFoundError, "Can't open file: {}.\n".format(filename) - )
- - -
[docs]def add_unique_attr(obj, name, value, check_dup=False): - """Create an attribute if the attribute name isn't already used.""" - from .logger import active_logger - - try: - getattr(obj, name) - if check_dup: - active_logger.warning( - "Unable to create attribute {name} of type {typ1} because one already exists of type {typ2} in {obj}".format( - name=name, - typ1=type(value), - typ2=type(getattr(obj, name)), - obj=str(obj), - ) - ) - else: - setattr(obj, name, value) - - except AttributeError: - setattr(obj, name, value)
- -
[docs]def num_to_chars(num): """Return a string like 'AB' when given a number like 28.""" num -= 1 @@ -289,14 +131,9 @@

Source code for skidl.utilities

     return s
-
[docs]def is_iterable(x): - """ - Return True if x is iterable (but not a string). - """ - try: - return not isinstance(iter(x), type(iter(""))) - except TypeError: - return False
+
[docs]def cnvt_to_var_name(s): + """Convert a string to a legal Python variable name and return it.""" + return re.sub(r"\W|^(?=\d)", "_", s)
[docs]def to_list(x): @@ -308,11 +145,6 @@

Source code for skidl.utilities

     return [x]  # Wasn't a list, so make it into one.
-
[docs]def cnvt_to_var_name(s): - """Convert a string to a legal Python variable name and return it.""" - return re.sub(r"\W|^(?=\d)", "_", s)
- -
[docs]def list_or_scalar(lst): """ Return a list if passed a multi-element list, otherwise return a single scalar. @@ -341,7 +173,7 @@

Source code for skidl.utilities

     """
     lst = []
     for item in nested_list:
-        if isinstance(item, (list, tuple)):
+        if isinstance(item, (list, tuple, set)):
             lst.extend(flatten(item))
         else:
             lst.append(item)
@@ -366,6 +198,28 @@ 

Source code for skidl.utilities

         delattr(obj, attr)
+
[docs]def add_unique_attr(obj, name, value, check_dup=False): + """Create an attribute if the attribute name isn't already used.""" + from .logger import active_logger + + try: + getattr(obj, name) + if check_dup: + active_logger.warning( + "Unable to create attribute {name} of type {typ1} because one already exists of type {typ2} in {obj}".format( + name=name, + typ1=type(value), + typ2=type(getattr(obj, name)), + obj=str(obj), + ) + ) + else: + setattr(obj, name, value) + + except AttributeError: + setattr(obj, name, value)
+ +
[docs]def from_iadd(objs): """Return True if one or more objects have attribute iadd_flag set to True.""" try: @@ -387,6 +241,29 @@

Source code for skidl.utilities

     rmv_attr(objs, "iadd_flag")
+
[docs]def merge_dicts(dct, merge_dct): + """ + Dict merge that recurses through both dicts and updates keys. + + Args: + dct: The dict that will be updated. + merge_dct: The dict whose values will be inserted into dct. + + Returns: + Nothing. + """ + + for k, v in list(merge_dct.items()): + if ( + k in dct + and isinstance(dct[k], dict) + and isinstance(merge_dct[k], collections.Mapping) + ): + merge_dicts(dct[k], merge_dct[k]) + else: + dct[k] = merge_dct[k]
+ + # Store names that have been previously assigned. name_heap = set([None]) prefix_counts = collections.Counter() @@ -743,6 +620,19 @@

Source code for skidl.utilities

     return ids
+
[docs]def expand_buses(pins_nets_buses): + """ + Take list of pins, nets, and buses and return a list of only pins and nets. + """ + + # This relies on the fact that a bus is an iterable of its nets, + # and pins/nets return an iterable containing only a single pin/net. + pins_nets = [] + for pnb in pins_nets_buses: + pins_nets.extend(pnb) + return pins_nets
+ +
[docs]def find_num_copies(**attribs): """ Return the number of copies to make based on the number of attribute values. @@ -789,6 +679,171 @@

Source code for skidl.utilities

         return 0  # If the list if empty.
+
[docs]def norecurse(f): + """Decorator that keeps a function from recursively calling itself. + + Parameters + ---------- + f: function + """ + + def func(*args, **kwargs): + # If a function's name is on the stack twice (once for the current call + # and a second time for the previous call), then return withcurrent_level + # executing the function. + if len([1 for l in traceback.extract_stack() if l[2] == f.__name__]) > 1: + return None + + # Otherwise, not a recursive call so execute the function and return result. + return f(*args, **kwargs) + + return func
+ + +
[docs]class TriggerDict(dict): + """This dict triggers a function when one of its entries changes.""" + + def __init__(self, *args, **kwargs): + super().__init__(*args, **kwargs) + + # Create a dict of functions that will be run if their associated + # key entries change. The functions arguments will be the main + # TriggerDict, the key, and the new value to be stored. + self.trigger_funcs = dict() + + def __setitem__(self, k, v): + if k in self.trigger_funcs: + if v != self[k]: + self.trigger_funcs[k](self, k, v) + super().__setitem__(k, v)
+ + +
[docs]def find_and_open_file( + filename, paths=None, ext=None, allow_failure=False, exclude_binary=False, descend=0 +): + """ + Search for a file in list of paths, open it and return file pointer and full file name. + + Args: + filename: Base file name (e.g., "my_file"). + paths: List of paths to search for the file. + ext: The extension for the file (e.g., ".txt"). + allow_failure: If false, failure to find file raises and exception. + exclude_binary: If true, skip files that contain binary data. + descend: If 0, don't search lower-level directories. If positive, search + that many levels down for the file. If negative, descend into + subdirectories withcurrent_level limit. + + Returns: + File pointer and file name or None, None if file could not be opened. + """ + + import urllib.parse + import urllib.request + + from .logger import active_logger + + def is_url(s): + return bool(urllib.parse.urlparse(s).scheme) + + if is_url(filename): + # This is a URL. Use the URL path as the search path except for + # the ending file name. Maybe not the best thing to use, but + # os.path.dirname() will do this. + paths = [os.path.dirname(filename)] + elif os.path.isabs(filename): + # Replace search paths if the file already has an absolute path. + paths = [os.path.abspath(os.path.dirname(filename))] + elif not paths: + # If no search paths are given, use the current working directory. + paths = ["."] + + # Remove any directory path from the file name. This even works with URLs. + _, filename = os.path.split(filename) + + # Get the list of file extensions to check against. + base, suffix = os.path.splitext(filename) + if suffix: + # If an explicit file extension was given, just use that. + exts = [suffix] + else: + exts = to_list(ext) + + # Create the regular expression for matching against the filename. + # exts = [re.escape(ext) for ext in exts] + match_name = re.escape(base) + "(" + "|".join(exts) + ")$" + + # Search through the directory paths for a file whose name matches the regular expression. + for path in paths: + if is_url(path): + for ext in exts: + link = os.path.join(path, base + ext) + try: + return urllib.request.urlopen(link), link + except urllib.error.HTTPError: + # File failed, so keep searching. + pass + else: + # Search through the files in a particular directory path. + descent_ctr = descend # Controls the descent through the path. + for root, dirnames, filenames in os.walk(path): + # Get files in the current directory whose names match the regular expression. + for fn in [f for f in filenames if re.match(match_name, f)]: + abs_filename = os.path.join(root, fn) + if not exclude_binary or not is_binary_file(abs_filename): + try: + # Return the first file that matches the criteria. + return open(abs_filename, encoding="latin_1"), abs_filename + except (IOError, FileNotFoundError, TypeError): + # File failed, so keep searching. + pass + # Keep descending on this path as long as the descent counter is non-zero. + if descent_ctr == 0: + break # Cease search of this path if the counter is zero. + descent_ctr -= 1 # Decrement the counter for the next directory level. + + # Couldn't find a matching file. + if allow_failure: + return None, None + else: + active_logger.raise_( + FileNotFoundError, "Can't open file: {}.\n".format(filename) + )
+ + +
[docs]def find_and_read_file( + filename, paths=None, ext=None, allow_failure=False, exclude_binary=False, descend=0 +): + """Search for a file in list of paths, open it and return its contents. + + Args: + filename: Base file name (e.g., "my_file"). + paths: List of paths to search for the file. + ext: The extension for the file (e.g., ".txt"). + allow_failure: If false, failure to find file raises and exception. + exclude_binary: If true, skip files that contain binary data. + descend: If 0, don't search lower-level directories. If positive, search + that many levels down for the file. If negative, descend into + subdirectories withcurrent_level limit. + + Returns: + File contents and file name or None, None if file could not be opened. + """ + fp, fn = find_and_open_file( + filename, paths, ext, allow_failure, exclude_binary, descend + ) + if fp: + contents = fp.read() + fp.close() + try: + contents = contents.decode("latin_1") + except AttributeError: + # File contents were already decoded. + pass + return contents, fn + return None, None
+ +
[docs]@contextmanager def opened(f_or_fn, mode): """ @@ -817,68 +872,6 @@

Source code for skidl.utilities

                 type(f_or_fn)
             )
         )
- - -
[docs]def expand_buses(pins_nets_buses): - """ - Take list of pins, nets, and buses and return a list of only pins and nets. - """ - - # This relies on the fact that a bus is an iterable of its nets, - # and pins/nets return an iterable containing only a single pin/net. - pins_nets = [] - for pnb in pins_nets_buses: - pins_nets.extend(pnb) - return pins_nets
- - -# Regular expression for parsing nested S-expressions. -_sexp_term_regex = re.compile( - r"""(?mx) - \s*(?: - (?P<brackl>\()| - (?P<brackr>\))| - (?P<num>[+-]?\d+\.\d+(?=[\ \)])|\-?\d+(?=[\ \)]))| - (?P<sq>"([^"]|(?<=\\)")*")| - (?P<s>[^(^)\s]+) - )""" -) - - -
[docs]def parse_sexp(sexp, allow_underflow=False): - """Parse an S-expression and return a nested list.""" - - # code extracted from: http://rosettacode.org/wiki/S-Expressions - - stack = [] - current_level = [] - for termtypes in re.finditer(_sexp_term_regex, sexp): - term, value = [(t, v) for t, v in termtypes.groupdict().items() if v][0] - if term == "brackl": - stack.append(current_level) - current_level = [] - elif term == "brackr": - if not stack: - if allow_underflow: - return current_level[0] - else: - raise RunTimeError("Bracketing mismatch!") - tmp, current_level = current_level, stack.pop(-1) - current_level.append(tmp) - elif term == "num": - v = float(value) - if v.is_integer(): - v = int(v) - current_level.append(v) - elif term == "sq": - current_level.append(value[1:-1].replace(r"\"", '"')) - elif term == "s": - current_level.append(value) - else: - raise NotImplementedError("Error: %r" % (term, value)) - if stack: - raise RunTimeError("Bracketing mismatch!") - return current_level[0]
@@ -917,7 +910,7 @@

Navigation

\ No newline at end of file diff --git a/docs/api/html/_sources/rst_output/skidl.arrange.rst.txt b/docs/api/html/_sources/rst_output/skidl.arrange.rst.txt deleted file mode 100644 index 972b2c2d..00000000 --- a/docs/api/html/_sources/rst_output/skidl.arrange.rst.txt +++ /dev/null @@ -1,7 +0,0 @@ -skidl.arrange module -==================== - -.. automodule:: skidl.arrange - :members: - :undoc-members: - :show-inheritance: diff --git a/docs/api/html/_sources/rst_output/skidl.coord.rst.txt b/docs/api/html/_sources/rst_output/skidl.coord.rst.txt deleted file mode 100644 index 12f6fcdf..00000000 --- a/docs/api/html/_sources/rst_output/skidl.coord.rst.txt +++ /dev/null @@ -1,7 +0,0 @@ -skidl.coord module -================== - -.. automodule:: skidl.coord - :members: - :undoc-members: - :show-inheritance: diff --git a/docs/api/html/_sources/rst_output/skidl.netlist_to_skidl_main.rst.txt b/docs/api/html/_sources/rst_output/skidl.netlist_to_skidl_main.rst.txt deleted file mode 100644 index 5cac4baa..00000000 --- a/docs/api/html/_sources/rst_output/skidl.netlist_to_skidl_main.rst.txt +++ /dev/null @@ -1,7 +0,0 @@ -skidl.netlist\_to\_skidl\_main module -===================================== - -.. automodule:: skidl.netlist_to_skidl_main - :members: - :undoc-members: - :show-inheritance: diff --git a/docs/api/html/_sources/rst_output/skidl.rst.txt b/docs/api/html/_sources/rst_output/skidl.rst.txt index 419e7172..58a2e97c 100644 --- a/docs/api/html/_sources/rst_output/skidl.rst.txt +++ b/docs/api/html/_sources/rst_output/skidl.rst.txt @@ -13,6 +13,8 @@ Subpackages :maxdepth: 4 skidl.libs + skidl.schematics + skidl.scripts skidl.tools Submodules @@ -22,18 +24,17 @@ Submodules :maxdepth: 4 skidl.alias - skidl.arrange skidl.bus skidl.circuit skidl.common - skidl.coord + skidl.config skidl.erc + skidl.group skidl.interface skidl.logger skidl.net skidl.netclass skidl.netlist_to_skidl - skidl.netlist_to_skidl_main skidl.netpinlist skidl.network skidl.note diff --git a/docs/api/html/_sources/rst_output/skidl.tools.kicad.rst.txt b/docs/api/html/_sources/rst_output/skidl.tools.kicad.rst.txt index b92aae9d..5a61e5ac 100644 --- a/docs/api/html/_sources/rst_output/skidl.tools.kicad.rst.txt +++ b/docs/api/html/_sources/rst_output/skidl.tools.kicad.rst.txt @@ -12,4 +12,8 @@ Submodules .. toctree:: :maxdepth: 4 + skidl.tools.kicad.constants + skidl.tools.kicad.eeschema_v5 skidl.tools.kicad.kicad + skidl.tools.kicad.v5 + skidl.tools.kicad.v6 diff --git a/docs/api/html/_static/basic.css b/docs/api/html/_static/basic.css index 9b94688d..bd473cdc 100644 --- a/docs/api/html/_static/basic.css +++ b/docs/api/html/_static/basic.css @@ -4,7 +4,7 @@ * * Sphinx stylesheet -- basic theme. * - * :copyright: Copyright 2007-2021 by the Sphinx team, see AUTHORS. + * :copyright: Copyright 2007-2022 by the Sphinx team, see AUTHORS. * :license: BSD, see LICENSE for details. * */ @@ -731,8 +731,9 @@ dl.glossary dt { .classifier:before { font-style: normal; - margin: 0.5em; + margin: 0 0.5em; content: ":"; + display: inline-block; } abbr, acronym { @@ -756,6 +757,7 @@ span.pre { -ms-hyphens: none; -webkit-hyphens: none; hyphens: none; + white-space: nowrap; } div[class*="highlight-"] { diff --git a/docs/api/html/_static/doctools.js b/docs/api/html/_static/doctools.js index 8cbf1b16..e1bfd708 100644 --- a/docs/api/html/_static/doctools.js +++ b/docs/api/html/_static/doctools.js @@ -4,7 +4,7 @@ * * Sphinx JavaScript utilities for all documentation. * - * :copyright: Copyright 2007-2021 by the Sphinx team, see AUTHORS. + * :copyright: Copyright 2007-2022 by the Sphinx team, see AUTHORS. * :license: BSD, see LICENSE for details. * */ @@ -154,9 +154,7 @@ var Documentation = { this.fixFirefoxAnchorBug(); this.highlightSearchWords(); this.initIndexTable(); - if (DOCUMENTATION_OPTIONS.NAVIGATION_WITH_KEYS) { - this.initOnKeyListeners(); - } + this.initOnKeyListeners(); }, /** @@ -264,6 +262,16 @@ var Documentation = { hideSearchWords : function() { $('#searchbox .highlight-link').fadeOut(300); $('span.highlighted').removeClass('highlighted'); + var url = new URL(window.location); + url.searchParams.delete('highlight'); + window.history.replaceState({}, '', url); + }, + + /** + * helper function to focus on search bar + */ + focusSearchBar : function() { + $('input[name=q]').first().focus(); }, /** @@ -288,27 +296,54 @@ var Documentation = { }, initOnKeyListeners: function() { + // only install a listener if it is really needed + if (!DOCUMENTATION_OPTIONS.NAVIGATION_WITH_KEYS && + !DOCUMENTATION_OPTIONS.ENABLE_SEARCH_SHORTCUTS) + return; + $(document).keydown(function(event) { var activeElementType = document.activeElement.tagName; // don't navigate when in search box, textarea, dropdown or button if (activeElementType !== 'TEXTAREA' && activeElementType !== 'INPUT' && activeElementType !== 'SELECT' - && activeElementType !== 'BUTTON' && !event.altKey && !event.ctrlKey && !event.metaKey - && !event.shiftKey) { - switch (event.keyCode) { - case 37: // left - var prevHref = $('link[rel="prev"]').prop('href'); - if (prevHref) { - window.location.href = prevHref; - return false; - } - break; - case 39: // right - var nextHref = $('link[rel="next"]').prop('href'); - if (nextHref) { - window.location.href = nextHref; - return false; - } - break; + && activeElementType !== 'BUTTON') { + if (event.altKey || event.ctrlKey || event.metaKey) + return; + + if (!event.shiftKey) { + switch (event.key) { + case 'ArrowLeft': + if (!DOCUMENTATION_OPTIONS.NAVIGATION_WITH_KEYS) + break; + var prevHref = $('link[rel="prev"]').prop('href'); + if (prevHref) { + window.location.href = prevHref; + return false; + } + break; + case 'ArrowRight': + if (!DOCUMENTATION_OPTIONS.NAVIGATION_WITH_KEYS) + break; + var nextHref = $('link[rel="next"]').prop('href'); + if (nextHref) { + window.location.href = nextHref; + return false; + } + break; + case 'Escape': + if (!DOCUMENTATION_OPTIONS.ENABLE_SEARCH_SHORTCUTS) + break; + Documentation.hideSearchWords(); + return false; + } + } + + // some keyboard layouts may need Shift to get / + switch (event.key) { + case '/': + if (!DOCUMENTATION_OPTIONS.ENABLE_SEARCH_SHORTCUTS) + break; + Documentation.focusSearchBar(); + return false; } } }); diff --git a/docs/api/html/_static/documentation_options.js b/docs/api/html/_static/documentation_options.js index 2fa8c97f..724e3825 100644 --- a/docs/api/html/_static/documentation_options.js +++ b/docs/api/html/_static/documentation_options.js @@ -8,5 +8,7 @@ var DOCUMENTATION_OPTIONS = { LINK_SUFFIX: '.html', HAS_SOURCE: true, SOURCELINK_SUFFIX: '.txt', - NAVIGATION_WITH_KEYS: false + NAVIGATION_WITH_KEYS: false, + SHOW_SEARCH_SUMMARY: true, + ENABLE_SEARCH_SHORTCUTS: true, }; \ No newline at end of file diff --git a/docs/api/html/_static/language_data.js b/docs/api/html/_static/language_data.js index 863704b3..ebe2f03b 100644 --- a/docs/api/html/_static/language_data.js +++ b/docs/api/html/_static/language_data.js @@ -5,7 +5,7 @@ * This script contains the language-specific data used by searchtools.js, * namely the list of stopwords, stemmer, scorer and splitter. * - * :copyright: Copyright 2007-2021 by the Sphinx team, see AUTHORS. + * :copyright: Copyright 2007-2022 by the Sphinx team, see AUTHORS. * :license: BSD, see LICENSE for details. * */ diff --git a/docs/api/html/_static/searchtools.js b/docs/api/html/_static/searchtools.js index e09f9263..0a44e858 100644 --- a/docs/api/html/_static/searchtools.js +++ b/docs/api/html/_static/searchtools.js @@ -4,7 +4,7 @@ * * Sphinx JavaScript utilities for the full-text search. * - * :copyright: Copyright 2007-2021 by the Sphinx team, see AUTHORS. + * :copyright: Copyright 2007-2022 by the Sphinx team, see AUTHORS. * :license: BSD, see LICENSE for details. * */ @@ -172,10 +172,6 @@ var Search = { } // stem the word var word = stemmer.stemWord(tmp[i].toLowerCase()); - // prevent stemmer from cutting word smaller than two chars - if(word.length < 3 && tmp[i].length >= 3) { - word = tmp[i]; - } var toAppend; // select the correct list if (word[0] == '-') { @@ -276,13 +272,16 @@ var Search = { setTimeout(function() { displayNextItem(); }, 5); - } else if (DOCUMENTATION_OPTIONS.HAS_SOURCE) { + } else if (DOCUMENTATION_OPTIONS.SHOW_SEARCH_SUMMARY) { $.ajax({url: requestUrl, dataType: "text", complete: function(jqxhr, textstatus) { var data = jqxhr.responseText; if (data !== '' && data !== undefined) { - listItem.append(Search.makeSearchSummary(data, searchterms, hlterms)); + var summary = Search.makeSearchSummary(data, searchterms, hlterms); + if (summary) { + listItem.append(summary); + } } Search.output.append(listItem); setTimeout(function() { @@ -290,7 +289,7 @@ var Search = { }, 5); }}); } else { - // no source available, just display title + // just display title Search.output.append(listItem); setTimeout(function() { displayNextItem(); @@ -325,7 +324,9 @@ var Search = { var results = []; for (var prefix in objects) { - for (var name in objects[prefix]) { + for (var iMatch = 0; iMatch != objects[prefix].length; ++iMatch) { + var match = objects[prefix][iMatch]; + var name = match[4]; var fullname = (prefix ? prefix + '.' : '') + name; var fullnameLower = fullname.toLowerCase() if (fullnameLower.indexOf(object) > -1) { @@ -339,7 +340,6 @@ var Search = { } else if (parts[parts.length - 1].indexOf(object) > -1) { score += Scorer.objPartialMatch; } - var match = objects[prefix][name]; var objname = objnames[match[1]][2]; var title = titles[match[0]]; // If more than one term searched for, we require other words to be @@ -498,6 +498,9 @@ var Search = { */ makeSearchSummary : function(htmlText, keywords, hlwords) { var text = Search.htmlToText(htmlText); + if (text == "") { + return null; + } var textLower = text.toLowerCase(); var start = 0; $.each(keywords, function() { diff --git a/docs/api/html/genindex.html b/docs/api/html/genindex.html index 05a6b1f1..8f74a6ad 100644 --- a/docs/api/html/genindex.html +++ b/docs/api/html/genindex.html @@ -75,25 +75,29 @@

Index

A

+ - - + - + @@ -1494,24 +1748,28 @@

T

  • (skidl.pin.Pin.types attribute)
  • +
  • Tx (class in skidl.schematics.geometry) +
  • -
  • angle (skidl.tools.kicad.kicad.DrawText attribute) -
  • -
  • apply() (skidl.arrange.Arranger method) -
  • -
  • area (skidl.coord.BBox property) -
  • -
  • arrange_kl() (skidl.arrange.Arranger method) +
  • angle (skidl.tools.kicad.v5.DrawText attribute)
  • -
  • arrange_randomly() (skidl.arrange.Arranger method) -
  • -
  • Arranger (class in skidl.arrange) +
  • area (skidl.schematics.geometry.BBox property)
  • associate_pins() (skidl.part.Part method)
  • @@ -157,7 +157,9 @@

    B

  • - skidl.coord + skidl.config
  • @@ -1208,6 +1373,13 @@

    S

  • +
  • + skidl.group + +
  • @@ -1257,13 +1429,6 @@

    S

  • -
  • - skidl.netlist_to_skidl_main - -
  • @@ -1273,8 +1438,6 @@

    S

  • module
  • -
    • skidl.network @@ -1317,6 +1480,8 @@

      S

    • module
    +
    • skidl.pin @@ -1332,10 +1497,45 @@

      S

  • - skidl.pyspice + skidl.schematics
  • +
  • + skidl.schematics.debug_draw + +
  • +
  • + skidl.schematics.gen_schematic + +
  • +
  • + skidl.schematics.geometry + +
  • +
  • + skidl.schematics.place + +
  • +
  • + skidl.schematics.route + +
  • @@ -1350,6 +1550,20 @@

    S

  • +
  • + skidl.scripts + +
  • +
  • + skidl.scripts.netlist_to_skidl_main + +
  • @@ -1378,6 +1592,20 @@

    S

  • +
  • + skidl.tools.kicad.constants + +
  • +
  • + skidl.tools.kicad.eeschema_v5 + +
  • @@ -1385,6 +1613,20 @@

    S

  • +
  • + skidl.tools.kicad.v5 + +
  • +
  • + skidl.tools.kicad.v6 + +
  • @@ -1424,33 +1666,37 @@

    S

  • SkidlBaseObject (class in skidl.skidlbaseobj)
  • -
  • SkidlCfg (class in skidl.skidl) +
  • SkidlConfig (class in skidl.config)
  • SkidlLogFileHandler (class in skidl.logger)
  • SkidlLogger (class in skidl.logger)
  • SkidlPart (class in skidl.part) +
  • +
  • snap() (skidl.schematics.geometry.Point method)
  • split_name() (skidl.pin.Pin method)
  • split_pin_names() (skidl.part.Part method)
  • -
  • start_angle (skidl.tools.kicad.kicad.DrawArc attribute) +
  • start_angle (skidl.tools.kicad.v5.DrawArc attribute)
  • -
  • startx (skidl.tools.kicad.kicad.DrawArc attribute) +
  • startx (skidl.tools.kicad.v5.DrawArc attribute)
  • -
  • starty (skidl.tools.kicad.kicad.DrawArc attribute) +
  • starty (skidl.tools.kicad.v5.DrawArc attribute)
  • stop_file_output() (skidl.logger.SkidlLogger method)
  • stop_log_file_output() (in module skidl.logger)
  • -
  • store() (skidl.skidl.SkidlCfg method) +
  • store() (skidl.config.Config method)
  • -
  • SubCircuit() (in module skidl.circuit) +
  • SubCircuit() (in module skidl.group)
  • -
  • subcircuit() (in module skidl.circuit) +
  • subcircuit() (in module skidl.group) +
  • +
  • summary() (skidl.logger.SkidlLogger method)
  • swap_pins() (skidl.part.Part method)
  • @@ -1466,16 +1712,24 @@

    T

  • test_validity() (skidl.net.Net method)
  • -
  • text (skidl.tools.kicad.kicad.DrawText attribute) +
  • text (skidl.tools.kicad.v5.DrawText attribute)
  • -
  • thickness (skidl.tools.kicad.kicad.DrawArc attribute) +
  • thickness (skidl.tools.kicad.v5.DrawArc attribute)
  • +
  • to_eeschema() (skidl.part.Part method) + +
  • U

    @@ -1522,6 +1780,8 @@

    U

  • (skidl.pin.Pin.types attribute)
  • +
  • ur (skidl.schematics.geometry.BBox property) +
  • @@ -1536,22 +1796,24 @@

    V

  • (skidl.part.PartUnit method)
  • -
  • valign (skidl.tools.kicad.kicad.DrawF0 attribute) +
  • valign (skidl.tools.kicad.v5.DrawF0 attribute)
  • @@ -1560,7 +1822,7 @@

    V

    W

    - - - + + + - - - + + + + + + + + + + + + + + + @@ -198,6 +218,16 @@

    Python Module Index

    + + + + + + + + + + + + + + + + + +
        skidl.alias
        - skidl.arrange -
        @@ -91,13 +86,18 @@

    Python Module Index

        - skidl.coord + skidl.config
        skidl.erc
        + skidl.group +
        @@ -133,11 +133,6 @@

    Python Module Index

        skidl.netlist_to_skidl
        - skidl.netlist_to_skidl_main -
        @@ -186,7 +181,32 @@

    Python Module Index

        - skidl.pyspice + skidl.schematics +
        + skidl.schematics.debug_draw +
        + skidl.schematics.gen_schematic +
        + skidl.schematics.geometry +
        + skidl.schematics.place +
        + skidl.schematics.route
        skidl.scriptinfo
        + skidl.scripts +
        + skidl.scripts.netlist_to_skidl_main +
        @@ -218,11 +248,31 @@

    Python Module Index

        skidl.tools.kicad
        + skidl.tools.kicad.constants +
        + skidl.tools.kicad.eeschema_v5 +
        skidl.tools.kicad.kicad
        + skidl.tools.kicad.v5 +
        + skidl.tools.kicad.v6 +
        @@ -286,7 +336,7 @@

    Navigation

    \ No newline at end of file diff --git a/docs/api/html/readme.html b/docs/api/html/readme.html index 6c5784b9..8132b6dd 100644 --- a/docs/api/html/readme.html +++ b/docs/api/html/readme.html @@ -5,7 +5,8 @@ - + + SKiDL — SKiDL documentation @@ -51,29 +52,29 @@

    Navigation

    -
    +

    SKiDL

    SKiDL source code decoumentation.

    -
    +

    Description

    The SKiDL Python package lets you compactly describe the interconnection of electronic circuits and components. The resulting Python program performs electrical rules checking for common mistakes and outputs a netlist that serves as input to a PCB layout tool.

    -
    -
    +
    +

    Installation

    You can install SKiDL using pip:

    pip install skidl
     
    -
    -
    + +

    Usage

    Learn howe to use SKiDL with this tutorial.

    -
    -
    + +
    @@ -82,8 +83,9 @@

    Usage

    \ No newline at end of file diff --git a/docs/api/html/rst_output/skidl.common.html b/docs/api/html/rst_output/skidl.common.html index 9a9aeca0..c3ee255d 100644 --- a/docs/api/html/rst_output/skidl.common.html +++ b/docs/api/html/rst_output/skidl.common.html @@ -5,7 +5,8 @@ - + + skidl.common module — SKiDL documentation @@ -43,10 +44,10 @@

    Navigation

    -
    +

    skidl.common module

    Stuff everyone needs.

    -
    +
    @@ -91,7 +92,7 @@

    Navigation

    \ No newline at end of file diff --git a/docs/api/html/rst_output/skidl.coord.html b/docs/api/html/rst_output/skidl.coord.html deleted file mode 100644 index bc42746c..00000000 --- a/docs/api/html/rst_output/skidl.coord.html +++ /dev/null @@ -1,138 +0,0 @@ - - - - - - - - - skidl.coord module — SKiDL documentation - - - - - - - - - - - - - -

    - - - -
    -
    -
    -
    - -
    -

    skidl.coord module

    -
    -
    -class skidl.coord.BBox(*pts)[source]
    -

    Bases: object

    -
    -
    -add(*objs)[source]
    -
    - -
    -
    -property area
    -
    - -
    -
    -property h
    -
    - -
    -
    -round()[source]
    -
    - -
    -
    -property w
    -
    - -
    - -
    -
    -class skidl.coord.Point(x, y)[source]
    -

    Bases: object

    -
    -
    -round()[source]
    -
    - -
    - -
    - - -
    -
    -
    -
    - -
    -
    - - - - \ No newline at end of file diff --git a/docs/api/html/rst_output/skidl.erc.html b/docs/api/html/rst_output/skidl.erc.html index 4d970277..3aece7c5 100644 --- a/docs/api/html/rst_output/skidl.erc.html +++ b/docs/api/html/rst_output/skidl.erc.html @@ -5,7 +5,8 @@ - + + skidl.erc module — SKiDL documentation @@ -43,7 +44,7 @@

    Navigation

    -
    +

    skidl.erc module

    ERC functions for Circuit, Part, Pin, Net, Bus, Interface objects.

    @@ -64,7 +65,7 @@

    Navigation

    Do an electrical rules check on a part in the schematic.

    -
    +
    @@ -109,7 +110,7 @@

    Navigation

    \ No newline at end of file diff --git a/docs/api/html/rst_output/skidl.html b/docs/api/html/rst_output/skidl.html index 0c440052..77d06ab8 100644 --- a/docs/api/html/rst_output/skidl.html +++ b/docs/api/html/rst_output/skidl.html @@ -5,7 +5,8 @@ - + + skidl package — SKiDL documentation @@ -43,7 +44,7 @@

    Navigation

    - + +
    @@ -135,8 +153,9 @@

    Submodules
    -

    Table of Contents

    -
      +

      This Page

        @@ -180,7 +200,7 @@

        Navigation

      \ No newline at end of file diff --git a/docs/api/html/rst_output/skidl.interface.html b/docs/api/html/rst_output/skidl.interface.html index 57f48f72..696b305e 100644 --- a/docs/api/html/rst_output/skidl.interface.html +++ b/docs/api/html/rst_output/skidl.interface.html @@ -5,7 +5,8 @@ - + + skidl.interface module — SKiDL documentation @@ -43,25 +44,25 @@

      Navigation

      -
      +

      skidl.interface module

      Handles interfaces for subsystems with complicated I/O.

      -class skidl.interface.Interface(*args, **kwargs)[source]
      -

      Bases: dict

      +class skidl.interface.Interface(*args, **kwargs)[source] +

      Bases: dict

      An Interface bundles a group of nets/buses into a single entity with each net/bus becoming an attribute. An Interface is also usable as a dict where the attribute names serve as keys. This means the ** operator works on an Interface.

      -erc_list = []
      +erc_list = []
      -
      +
      @@ -106,7 +107,7 @@

      Navigation

      \ No newline at end of file diff --git a/docs/api/html/rst_output/skidl.libs.convert_libs.html b/docs/api/html/rst_output/skidl.libs.convert_libs.html index e173a8e5..5f816436 100644 --- a/docs/api/html/rst_output/skidl.libs.convert_libs.html +++ b/docs/api/html/rst_output/skidl.libs.convert_libs.html @@ -5,7 +5,8 @@ - + + skidl.libs.convert_libs module — SKiDL documentation @@ -43,14 +44,14 @@

      Navigation

      -
      +

      skidl.libs.convert_libs module

      skidl.libs.convert_libs.convert_libs(from_dir, to_dir)[source]
      -
      +
      @@ -95,7 +96,7 @@

      Navigation

      \ No newline at end of file diff --git a/docs/api/html/rst_output/skidl.libs.html b/docs/api/html/rst_output/skidl.libs.html index 0ebc6c7c..b612a4ac 100644 --- a/docs/api/html/rst_output/skidl.libs.html +++ b/docs/api/html/rst_output/skidl.libs.html @@ -5,7 +5,8 @@ - + + skidl.libs package — SKiDL documentation @@ -43,17 +44,17 @@

      Navigation

      -
      +

      skidl.libs package

      - -
      + +
      @@ -62,14 +63,16 @@

      Submodules
      -

      Table of Contents

      -
        +

        This Page

          @@ -106,7 +109,7 @@

          Navigation

        \ No newline at end of file diff --git a/docs/api/html/rst_output/skidl.logger.html b/docs/api/html/rst_output/skidl.logger.html index ed497c0b..64df35e0 100644 --- a/docs/api/html/rst_output/skidl.logger.html +++ b/docs/api/html/rst_output/skidl.logger.html @@ -5,7 +5,8 @@ - + + skidl.logger module — SKiDL documentation @@ -43,12 +44,12 @@

        Navigation

        -
        +

        skidl.logger module

        Logging for generic messages and ERC.

        -class skidl.logger.ActiveLogger(logger)[source]
        +class skidl.logger.ActiveLogger(logger)[source]

        Bases: skidl.logger.SkidlLogger

        Currently-active logger for a given phase of operations.

        @@ -83,8 +84,8 @@

        Navigation

        -class skidl.logger.CountCalls(func)[source]
        -

        Bases: object

        +class skidl.logger.CountCalls(func)[source] +

        Bases: object

        Decorator for counting the number of times a function is called.

        This is used for counting errors and warnings passed to logging functions, making it easy to track if and how many errors/warnings were issued.

        @@ -97,8 +98,8 @@

        Navigation

        -class skidl.logger.SkidlLogFileHandler(*args, **kwargs)[source]
        -

        Bases: logging.FileHandler

        +class skidl.logger.SkidlLogFileHandler(*args, **kwargs)[source] +

        Bases: logging.FileHandler

        Logger that outputs messages to a file.

        @@ -109,8 +110,8 @@

        Navigation

        -class skidl.logger.SkidlLogger(*args, **kwargs)[source]
        -

        Bases: logging.Logger

        +class skidl.logger.SkidlLogger(*args, **kwargs)[source]
        +

        Bases: logging.Logger

        SKiDL logger that can stop output to log files and delete them.

        @@ -204,6 +205,11 @@

        Navigation

        Stop file outputs for all log handlers of this logger.

        +
        +
        +summary(msg, *args, **kwargs)[source]
        +
        +
        warning(msg, *args, **kwargs)[source]
        @@ -221,7 +227,7 @@

        Navigation

        Stop loggers from creating files containing log messages.

        -
        +
        @@ -266,7 +272,7 @@

        Navigation

        \ No newline at end of file diff --git a/docs/api/html/rst_output/skidl.net.html b/docs/api/html/rst_output/skidl.net.html index 550cb205..8cdbcfbb 100644 --- a/docs/api/html/rst_output/skidl.net.html +++ b/docs/api/html/rst_output/skidl.net.html @@ -5,7 +5,8 @@ - + + skidl.net module — SKiDL documentation @@ -43,12 +44,12 @@

        Navigation

        -
        +

        skidl.net module

        Handles nets.

        -class skidl.net.NCNet(name=None, circuit=None, *pins_nets_buses, **attribs)[source]
        +class skidl.net.NCNet(name=None, circuit=None, *pins_nets_buses, **attribs)[source]

        Bases: skidl.net.Net

        Lists of unconnected pins are stored using this Net subclass.

        This is a netlist subclass used for storing lists of pins which are @@ -72,7 +73,7 @@

        Navigation

        -property drive
        +property drive

        Get the drive strength of this net.

        The drive strength is always NOCONNECT_DRIVE. It can’t be changed. The drive strength cannot be deleted.

        @@ -88,7 +89,7 @@

        Navigation

        -class skidl.net.Net(name=None, circuit=None, *pins_nets_buses, **attribs)[source]
        +class skidl.net.Net(name=None, circuit=None, *pins_nets_buses, **attribs)[source]

        Bases: skidl.skidlbaseobj.SkidlBaseObject

        Lists of connected pins are stored as nets using this class.

        @@ -172,7 +173,7 @@

        Navigation

        -property drive
        +property drive

        Get, set and delete the drive strength of this net.

        The drive strength cannot be set to a value less than its current value. So as pins are added to a net, the drive strength reflects the @@ -181,12 +182,12 @@

        Navigation

        -erc_list = [<function dflt_net_erc>]
        +erc_list = [<function dflt_net_erc>]
        -classmethod fetch(name, *args, **attribs)[source]
        +classmethod fetch(name, *args, **attribs)[source]

        Get the net with the given name from a circuit, or create it if not found.

        @@ -214,7 +215,7 @@

        Navigation

        -classmethod get(name, circuit=None)[source]
        +classmethod get(name, circuit=None)[source]

        Get the net with the given name from a circuit, or return None.

        @@ -258,7 +259,7 @@

        Navigation

        -property name
        +property name

        Get, set and delete the name of this net.

        When setting the net name, if another net with the same name is found, the name for this net is adjusted to make it unique.

        @@ -266,7 +267,7 @@

        Navigation

        -property netclass
        +property netclass

        Get, set and delete the net class assigned to this net.

        If not net class is set, then reading the net class returns None.

        You can’t overwrite the net class of a net once it’s set. @@ -275,9 +276,14 @@

        Navigation

        existing net class of a net.

        -
        -
        -replace_spec_chars_in_name()[source]
        +
        +
        +property nets
        +
        + +
        +
        +property pins
        @@ -287,12 +293,12 @@

        Navigation

        -property valid
        +property valid
        -property width
        +property width

        Return width of a Net, which is always 1.

        @@ -300,8 +306,8 @@

        Navigation

        -class skidl.net.Traversal(nets, pins)
        -

        Bases: tuple

        +class skidl.net.Traversal(nets, pins) +

        Bases: tuple

        nets
        @@ -316,7 +322,7 @@

        Navigation

        -
        +
        @@ -361,7 +367,7 @@

        Navigation

        \ No newline at end of file diff --git a/docs/api/html/rst_output/skidl.netclass.html b/docs/api/html/rst_output/skidl.netclass.html index d922349d..0e9f456a 100644 --- a/docs/api/html/rst_output/skidl.netclass.html +++ b/docs/api/html/rst_output/skidl.netclass.html @@ -5,7 +5,8 @@ - + + skidl.netclass module — SKiDL documentation @@ -43,16 +44,16 @@

        Navigation

        -
        +

        skidl.netclass module

        Class for PCBNEW net classes.

        -class skidl.netclass.NetClass(name, **attribs)[source]
        -

        Bases: object

        +class skidl.netclass.NetClass(name, **attribs)[source] +

        Bases: object

        -
        +
        @@ -97,7 +98,7 @@

        Navigation

        \ No newline at end of file diff --git a/docs/api/html/rst_output/skidl.netlist_to_skidl.html b/docs/api/html/rst_output/skidl.netlist_to_skidl.html index 3bc94104..1b4334cc 100644 --- a/docs/api/html/rst_output/skidl.netlist_to_skidl.html +++ b/docs/api/html/rst_output/skidl.netlist_to_skidl.html @@ -5,7 +5,8 @@ - + + skidl.netlist_to_skidl module — SKiDL documentation @@ -43,7 +44,7 @@

        Navigation

        -
        +

        skidl.netlist_to_skidl module

        Convert a netlist into an equivalent SKiDL program.

        @@ -51,7 +52,7 @@

        Navigation

        skidl.netlist_to_skidl.netlist_to_skidl(netlist_src)[source]
        -
        +
        @@ -96,7 +97,7 @@

        Navigation

        \ No newline at end of file diff --git a/docs/api/html/rst_output/skidl.netlist_to_skidl_main.html b/docs/api/html/rst_output/skidl.netlist_to_skidl_main.html deleted file mode 100644 index 06654772..00000000 --- a/docs/api/html/rst_output/skidl.netlist_to_skidl_main.html +++ /dev/null @@ -1,102 +0,0 @@ - - - - - - - - - skidl.netlist_to_skidl_main module — SKiDL documentation - - - - - - - - - - - - - -

        - - - -
        -
        -
        -
        - -
        -

        skidl.netlist_to_skidl_main module

        -

        Command-line program to convert a netlist into an equivalent SKiDL program.

        -
        -
        -skidl.netlist_to_skidl_main.main()[source]
        -
        - -
        - - -
        -
        -
        -
        - -
        -
        - - - - \ No newline at end of file diff --git a/docs/api/html/rst_output/skidl.netpinlist.html b/docs/api/html/rst_output/skidl.netpinlist.html index 761bd700..60783760 100644 --- a/docs/api/html/rst_output/skidl.netpinlist.html +++ b/docs/api/html/rst_output/skidl.netpinlist.html @@ -5,7 +5,8 @@ - + + skidl.netpinlist module — SKiDL documentation @@ -43,21 +44,21 @@

        Navigation

        -
        +

        skidl.netpinlist module

        Specialized list for handling nets, pins, and buses.

        -class skidl.netpinlist.NetPinList(iterable=(), /)[source]
        -

        Bases: list

        +class skidl.netpinlist.NetPinList(iterable=(), /)[source] +

        Bases: list

        -property aliases
        +property aliases
        -property circuit
        +property circuit

        Get the circuit the pins/nets are members of.

        @@ -69,23 +70,23 @@

        Navigation

        -property do_erc
        +property do_erc
        -property drive
        +property drive
        -property width
        +property width

        Return width, which is the same as using the len() operator.

        -
        +
        @@ -130,7 +131,7 @@

        Navigation

        \ No newline at end of file diff --git a/docs/api/html/rst_output/skidl.network.html b/docs/api/html/rst_output/skidl.network.html index 51a26650..79cf1c06 100644 --- a/docs/api/html/rst_output/skidl.network.html +++ b/docs/api/html/rst_output/skidl.network.html @@ -5,7 +5,8 @@ - + + skidl.network module — SKiDL documentation @@ -43,13 +44,13 @@

        Navigation

        -
        +

        skidl.network module

        Object for for handling series and parallel networks of two-pin parts, nets, and pins.

        -class skidl.network.Network(*objs)[source]
        -

        Bases: list

        +class skidl.network.Network(*objs)[source] +

        Bases: list

        create_network()[source]
        @@ -76,7 +77,7 @@

        Navigation

        -
        +
        @@ -121,7 +122,7 @@

        Navigation

        \ No newline at end of file diff --git a/docs/api/html/rst_output/skidl.note.html b/docs/api/html/rst_output/skidl.note.html index 94e22744..bc77ca77 100644 --- a/docs/api/html/rst_output/skidl.note.html +++ b/docs/api/html/rst_output/skidl.note.html @@ -5,7 +5,8 @@ - + + skidl.note module — SKiDL documentation @@ -43,17 +44,17 @@

        Navigation

        -
        +

        skidl.note module

        Supports user-specified notes that can be attached to other SKiDL objects.

        -class skidl.note.Note(*notes)[source]
        -

        Bases: list

        +class skidl.note.Note(*notes)[source] +

        Bases: list

        Stores one or more strings as notes.

        -
        +
        @@ -98,7 +99,7 @@

        Navigation

        \ No newline at end of file diff --git a/docs/api/html/rst_output/skidl.package.html b/docs/api/html/rst_output/skidl.package.html index 92a30b35..13a152a0 100644 --- a/docs/api/html/rst_output/skidl.package.html +++ b/docs/api/html/rst_output/skidl.package.html @@ -5,7 +5,8 @@ - + + skidl.package module — SKiDL documentation @@ -43,12 +44,12 @@

        Navigation

        -
        +

        skidl.package module

        Package a subcircuit so it can be used like a Part.

        -class skidl.package.Package(**kwargs)[source]
        +class skidl.package.Package(**kwargs)[source]

        Bases: skidl.interface.Interface

        @@ -63,7 +64,7 @@

        Navigation

        Decorator that creates a package for a subcircuit routine.

        -
        +
        @@ -108,7 +109,7 @@

        Navigation

        \ No newline at end of file diff --git a/docs/api/html/rst_output/skidl.part.html b/docs/api/html/rst_output/skidl.part.html index a3432ae6..12118116 100644 --- a/docs/api/html/rst_output/skidl.part.html +++ b/docs/api/html/rst_output/skidl.part.html @@ -5,7 +5,8 @@ - + + skidl.part module — SKiDL documentation @@ -43,12 +44,12 @@

        Navigation

        -
        +

        skidl.part module

        Handles parts.

        -class skidl.part.Part(lib=None, name=None, dest=NETLIST, tool=None, connections=None, part_defn=None, circuit=None, ref_prefix='U', ref=None, tag=None, pin_splitters=None, tool_version=None, **kwargs)[source]
        +class skidl.part.Part(lib=None, name=None, dest=NETLIST, tool=None, connections=None, part_defn=None, circuit=None, ref_prefix='', ref=None, tag=None, pin_splitters=None, tool_version=None, **kwargs)[source]

        Bases: skidl.skidlbaseobj.SkidlBaseObject

        A class for storing a definition of a schematic part.

        @@ -90,12 +91,6 @@

        Navigation

        Add one or more pins to a part.

        -
        -
        -add_xspice_io(io)[source]
        -

        Add XSPICE I/O to the pins of a part.

        -
        -
        associate_pins()[source]
        @@ -108,6 +103,20 @@

        Navigation

        Return True if any part pin is connected to a net in the list.

        +
        +
        +convert_for_spice(spice_part, pin_map)[source]
        +

        Convert a Part object for use with SPICE.

        +
        +
        Parameters
        +
          +
        • spice_part (Part) – The type of SPICE Part to be converted to.

        • +
        • pin_map (dict) – Dict with pin numbers/names of self as keys and num/names of spice_part pins as replacement values.

        • +
        +
        +
        +
        +
        copy(num_copies=None, dest=NETLIST, circuit=None, io=None, **attribs)[source]
        @@ -165,7 +174,7 @@

        Navigation

        -erc_list = [<function dflt_part_erc>]
        +erc_list = [<function dflt_part_erc>]
        @@ -176,7 +185,7 @@

        Navigation

        -property foot
        +property foot

        Get, set and delete the part footprint.

        @@ -191,12 +200,6 @@

        Navigation

        -
        -
        -generate_pinboxes(tool=None)[source]
        -

        Generate the pinboxes for arranging parts in a schematic.

        -
        -
        generate_svg_component(symtx='', tool=None, net_stubs=None)[source]
        @@ -216,7 +219,7 @@

        Navigation

        -classmethod get(text, circuit=None)[source]
        +classmethod get(text, circuit=None)[source]

        Get the part with the given text from a circuit, or return None.

        Parameters
        @@ -264,9 +267,15 @@

        Navigation

        +
        +
        +grab_pins()[source]
        +

        Grab pins back from PartUnits.

        +
        +
        -property hierarchical_name
        +property hierarchical_name
        @@ -320,37 +329,42 @@

        Navigation

        -property match_pin_regex
        +property match_pin_regex

        Get, set and delete the enable/disable of pin regular-expression matching.

        +
        +
        +property ordered_pins
        +
        +
        -parse(get_name_only=False)[source]
        +parse(partial_parse=False)[source]

        Create a part from its stored part definition.

        Parameters
        -

        get_name_only – When true, just get the name and aliases for the +

        partial_parse – When true, just get the name and aliases for the part. Leave the rest unparsed.

        -
        -
        -pin_aliases_to_attributes()[source]
        -

        Make each pin alias into an attribute of the part.

        -
        -
        -property ref
        +property ref

        Get, set and delete the part reference.

        When setting the part reference, if another part with the same reference is found, the reference for this part is adjusted to make it unique.

        +
        +
        +release_pins()[source]
        +

        A Part can’t release pins back to its PartUnits, so do nothing.

        +
        +
        rename_pin(pin_id, new_pin_name)[source]
        @@ -370,23 +384,15 @@

        Navigation

        -
        -set_pin_alias(alias, *pin_ids, **criteria)[source]
        -

        Set the alias for a part pin.

        +
        +similarity(part)[source]
        +

        Return a measure of how similar two parts are.

        Parameters
        -
          -
        • alias – The alias for the pin.

        • -
        • pin_ids – A list of strings containing pin names, numbers, -regular expressions, slices, lists or tuples.

        • -
        -
        -
        Keyword Arguments
        -

        criteria – Key/value pairs that specify attribute values the -pin must have in order to be selected.

        +

        part (Part) – The part to compare to for similarity.

        -
        Returns
        -

        Nothing.

        +
        Returns
        +

        Float value for similarity (larger means more similar).

        @@ -405,10 +411,32 @@

        Navigation

        -property tag
        +property tag

        Return the part’s tag.

        +
        +
        +to_eeschema(tx)
        +

        Create EESCHEMA code for a part.

        +
        +
        Parameters
        +
          +
        • part (Part) – SKiDL part.

        • +
        • tx (Tx) – Transformation matrix.

        • +
        +
        +
        Returns
        +

        EESCHEMA code for the part.

        +
        +
        Return type
        +

        string

        +
        +
        +

        Notes

        +

        https://en.wikibooks.org/wiki/Kicad/file_formats#Schematic_Files_Format

        +
        +
        validate()[source]
        @@ -417,7 +445,7 @@

        Navigation

        -property value
        +property value

        Get, set and delete the part value.

        @@ -425,7 +453,7 @@

        Navigation

        -class skidl.part.PartUnit(parent, label, *pin_ids, **criteria)[source]
        +class skidl.part.PartUnit(parent, label, *pin_ids, **criteria)[source]

        Bases: skidl.part.Part

        Create a PartUnit from a set of pins in a Part object.

        Parts can be organized into smaller pieces called PartUnits. A PartUnit @@ -460,15 +488,27 @@

        Navigation

        Add selected pins from the parent to the part unit.

        +
        +
        +grab_pins()[source]
        +

        Grab pin from Part and assign to PartUnit.

        +
        +
        -property ref
        +property ref

        Get, set and delete the part reference.

        When setting the part reference, if another part with the same reference is found, the reference for this part is adjusted to make it unique.

        +
        +
        +release_pins()[source]
        +

        Return PartUnit pins to parent Part.

        +
        +
        validate()[source]
        @@ -479,8 +519,8 @@

        Navigation

        -class skidl.part.PinNameSearch(part)[source]
        -

        Bases: object

        +class skidl.part.PinNameSearch(part)[source] +

        Bases: object

        A class for restricting part pin indexing to only pin names while ignoring pin numbers.

        @@ -492,8 +532,8 @@

        Navigation

        -class skidl.part.PinNumberSearch(part)[source]
        -

        Bases: object

        +class skidl.part.PinNumberSearch(part)[source] +

        Bases: object

        A class for restricting part pin indexing to only pin numbers while ignoring pin names.

        @@ -505,7 +545,7 @@

        Navigation

        -class skidl.part.SkidlPart(lib=None, name=None, dest=TEMPLATE, tool=None, connections=None, **attribs)[source]
        +class skidl.part.SkidlPart(lib=None, name=None, dest=TEMPLATE, tool=None, connections=None, **attribs)[source]

        Bases: skidl.part.Part

        A class for storing a SKiDL definition of a schematic part. It’s identical to its Part superclass except:

        @@ -519,7 +559,24 @@

        Navigation

      +
      +
      +skidl.part.default_empty_footprint_handler(part)[source]
      +

      Handle the situation of a Part with no footprint when generating netlist/PCB.

      +
      +
      Parameters
      +

      part (Part) – The part with no footprint.

      +
      +
      +
      +

      Note

      +

      By default, this function logs an error message if the footprint is missing. +Override this function if you want to try and set some default footprint +for particular types of parts (such as using an 0805 footprint for a resistor).

      +
      + +
      @@ -564,7 +621,7 @@

      Navigation

      \ No newline at end of file diff --git a/docs/api/html/rst_output/skidl.part_query.html b/docs/api/html/rst_output/skidl.part_query.html index 3228a6e6..297cf7c3 100644 --- a/docs/api/html/rst_output/skidl.part_query.html +++ b/docs/api/html/rst_output/skidl.part_query.html @@ -5,7 +5,8 @@ - + + skidl.part_query module — SKiDL documentation @@ -43,13 +44,13 @@

      Navigation

      -
      +

      skidl.part_query module

      Functions for finding/displaying parts and footprints.

      -class skidl.part_query.FootprintCache(*args, **kwargs)[source]
      -

      Bases: dict

      +class skidl.part_query.FootprintCache(*args, **kwargs)[source] +

      Bases: dict

      Dict for storing footprints from all directories.

      @@ -160,7 +161,7 @@

      Navigation

      -
      +
      @@ -205,7 +206,7 @@

      Navigation

      \ No newline at end of file diff --git a/docs/api/html/rst_output/skidl.pckg_info.html b/docs/api/html/rst_output/skidl.pckg_info.html index 11d57dae..c8bca33e 100644 --- a/docs/api/html/rst_output/skidl.pckg_info.html +++ b/docs/api/html/rst_output/skidl.pckg_info.html @@ -5,7 +5,8 @@ - + + skidl.pckg_info module — SKiDL documentation @@ -43,9 +44,9 @@

      Navigation

      -
      +

      skidl.pckg_info module

      -
      +
      @@ -90,7 +91,7 @@

      Navigation

      \ No newline at end of file diff --git a/docs/api/html/rst_output/skidl.pin.html b/docs/api/html/rst_output/skidl.pin.html index 418d25f8..97a35380 100644 --- a/docs/api/html/rst_output/skidl.pin.html +++ b/docs/api/html/rst_output/skidl.pin.html @@ -5,7 +5,8 @@ - + + skidl.pin module — SKiDL documentation @@ -43,12 +44,12 @@

      Navigation

      -
      +

      skidl.pin module

      Handles part pins.

      -class skidl.pin.PhantomPin(**attribs)[source]
      +class skidl.pin.PhantomPin(**attribs)[source]

      Bases: skidl.pin.Pin

      A pin type that exists solely to tie two pinless nets together. It will not participate in generating any netlists.

      @@ -56,7 +57,7 @@

      Navigation

      -class skidl.pin.Pin(**attribs)[source]
      +class skidl.pin.Pin(**attribs)[source]

      Bases: skidl.skidlbaseobj.SkidlBaseObject

      A class for storing data about pins for a part.

      @@ -90,72 +91,72 @@

      Navigation

      -BIDIR = 3
      +BIDIR = 3
      -INPUT = 1
      +INPUT = 1
      -NOCONNECT = 13
      +NOCONNECT = 13
      -OPENCOLL = 9
      +OPENCOLL = 9
      -OPENEMIT = 10
      +OPENEMIT = 10
      -OUTPUT = 2
      +OUTPUT = 2
      -PASSIVE = 5
      +PASSIVE = 5
      -PULLDN = 12
      +PULLDN = 12
      -PULLUP = 11
      +PULLUP = 11
      -PWRIN = 7
      +PWRIN = 7
      -PWROUT = 8
      +PWROUT = 8
      -TRISTATE = 4
      +TRISTATE = 4
      -UNSPEC = 6
      +UNSPEC = 6
      -classmethod add_type(*pin_types)[source]
      +classmethod add_type(*pin_types)[source]

      Add new pin type identifiers to the list of pin types.

      Parameters
      @@ -172,7 +173,7 @@

      Navigation

      -property circuit
      +property circuit

      Return the circuit of the part the pin belongs to.

      @@ -232,53 +233,53 @@

      Navigation

      -property drive
      +property drive

      Get, set and delete the drive strength of this pin.

      -class drives(value)
      -

      Bases: enum.IntEnum

      +class drives(value) +

      Bases: enum.IntEnum

      An enumeration.

      -NOCONNECT = 1
      +NOCONNECT = 1
      -NONE = 2
      +NONE = 2
      -ONESIDE = 5
      +ONESIDE = 5
      -PASSIVE = 3
      +PASSIVE = 3
      -POWER = 8
      +POWER = 8
      -PULLUPDN = 4
      +PULLUPDN = 4
      -PUSHPULL = 7
      +PUSHPULL = 7
      -TRISTATE = 6
      +TRISTATE = 6
      @@ -326,18 +327,23 @@

      Navigation

      -property net
      +property net

      Return one of the nets the pin is connected to.

      -pin_info = {types.INPUT: {'drive': drives.NONE, 'func_str': 'INPUT', 'function': 'INPUT', 'max_rcv': drives.POWER, 'min_rcv': drives.PASSIVE}, types.OUTPUT: {'drive': drives.PUSHPULL, 'func_str': 'OUTPUT', 'function': 'OUTPUT', 'max_rcv': drives.PASSIVE, 'min_rcv': drives.NONE}, types.BIDIR: {'drive': drives.TRISTATE, 'func_str': 'BIDIR', 'function': 'BIDIRECTIONAL', 'max_rcv': drives.POWER, 'min_rcv': drives.NONE}, types.TRISTATE: {'drive': drives.TRISTATE, 'func_str': 'TRISTATE', 'function': 'TRISTATE', 'max_rcv': drives.TRISTATE, 'min_rcv': drives.NONE}, types.PASSIVE: {'drive': drives.PASSIVE, 'func_str': 'PASSIVE', 'function': 'PASSIVE', 'max_rcv': drives.POWER, 'min_rcv': drives.NONE}, types.UNSPEC: {'drive': drives.NONE, 'func_str': 'UNSPEC', 'function': 'UNSPECIFIED', 'max_rcv': drives.POWER, 'min_rcv': drives.NONE}, types.PWRIN: {'drive': drives.NONE, 'func_str': 'PWRIN', 'function': 'POWER-IN', 'max_rcv': drives.POWER, 'min_rcv': drives.POWER}, types.PWROUT: {'drive': drives.POWER, 'func_str': 'PWROUT', 'function': 'POWER-OUT', 'max_rcv': drives.PASSIVE, 'min_rcv': drives.NONE}, types.OPENCOLL: {'drive': drives.ONESIDE, 'func_str': 'OPENCOLL', 'function': 'OPEN-COLLECTOR', 'max_rcv': drives.TRISTATE, 'min_rcv': drives.NONE}, types.OPENEMIT: {'drive': drives.ONESIDE, 'func_str': 'OPENEMIT', 'function': 'OPEN-EMITTER', 'max_rcv': drives.TRISTATE, 'min_rcv': drives.NONE}, types.PULLUP: {'drive': drives.PULLUPDN, 'func_str': 'PULLUP', 'function': 'PULLUP', 'max_rcv': drives.POWER, 'min_rcv': drives.NONE}, types.PULLDN: {'drive': drives.PULLUPDN, 'func_str': 'PULLDN', 'function': 'PULLDN', 'max_rcv': drives.POWER, 'min_rcv': drives.NONE}, types.NOCONNECT: {'drive': drives.NOCONNECT, 'func_str': 'NOCONNECT', 'function': 'NO-CONNECT', 'max_rcv': drives.NOCONNECT, 'min_rcv': drives.NOCONNECT}}
      +pin_info = {types.INPUT: {'drive': drives.NONE, 'func_str': 'INPUT', 'function': 'INPUT', 'max_rcv': drives.POWER, 'min_rcv': drives.PASSIVE}, types.OUTPUT: {'drive': drives.PUSHPULL, 'func_str': 'OUTPUT', 'function': 'OUTPUT', 'max_rcv': drives.PASSIVE, 'min_rcv': drives.NONE}, types.BIDIR: {'drive': drives.TRISTATE, 'func_str': 'BIDIR', 'function': 'BIDIRECTIONAL', 'max_rcv': drives.POWER, 'min_rcv': drives.NONE}, types.TRISTATE: {'drive': drives.TRISTATE, 'func_str': 'TRISTATE', 'function': 'TRISTATE', 'max_rcv': drives.TRISTATE, 'min_rcv': drives.NONE}, types.PASSIVE: {'drive': drives.PASSIVE, 'func_str': 'PASSIVE', 'function': 'PASSIVE', 'max_rcv': drives.POWER, 'min_rcv': drives.NONE}, types.UNSPEC: {'drive': drives.NONE, 'func_str': 'UNSPEC', 'function': 'UNSPECIFIED', 'max_rcv': drives.POWER, 'min_rcv': drives.NONE}, types.PWRIN: {'drive': drives.NONE, 'func_str': 'PWRIN', 'function': 'POWER-IN', 'max_rcv': drives.POWER, 'min_rcv': drives.POWER}, types.PWROUT: {'drive': drives.POWER, 'func_str': 'PWROUT', 'function': 'POWER-OUT', 'max_rcv': drives.PASSIVE, 'min_rcv': drives.NONE}, types.OPENCOLL: {'drive': drives.ONESIDE, 'func_str': 'OPENCOLL', 'function': 'OPEN-COLLECTOR', 'max_rcv': drives.TRISTATE, 'min_rcv': drives.NONE}, types.OPENEMIT: {'drive': drives.ONESIDE, 'func_str': 'OPENEMIT', 'function': 'OPEN-EMITTER', 'max_rcv': drives.TRISTATE, 'min_rcv': drives.NONE}, types.PULLUP: {'drive': drives.PULLUPDN, 'func_str': 'PULLUP', 'function': 'PULLUP', 'max_rcv': drives.POWER, 'min_rcv': drives.NONE}, types.PULLDN: {'drive': drives.PULLUPDN, 'func_str': 'PULLDN', 'function': 'PULLDN', 'max_rcv': drives.POWER, 'min_rcv': drives.NONE}, types.NOCONNECT: {'drive': drives.NOCONNECT, 'func_str': 'NOCONNECT', 'function': 'NO-CONNECT', 'max_rcv': drives.NOCONNECT, 'min_rcv': drives.NOCONNECT}} +
      + +
      +
      +property pins
      -property ref
      +property ref

      Return the reference of the part the pin belongs to.

      @@ -349,110 +355,85 @@

      Navigation

      -class types(value)
      -

      Bases: enum.IntEnum

      +class types(value) +

      Bases: enum.IntEnum

      An enumeration.

      -BIDIR = 3
      +BIDIR = 3
      -INPUT = 1
      +INPUT = 1
      -NOCONNECT = 13
      +NOCONNECT = 13
      -OPENCOLL = 9
      +OPENCOLL = 9
      -OPENEMIT = 10
      +OPENEMIT = 10
      -OUTPUT = 2
      +OUTPUT = 2
      -PASSIVE = 5
      +PASSIVE = 5
      -PULLDN = 12
      +PULLDN = 12
      -PULLUP = 11
      +PULLUP = 11
      -PWRIN = 7
      +PWRIN = 7
      -PWROUT = 8
      +PWROUT = 8
      -TRISTATE = 4
      +TRISTATE = 4
      -UNSPEC = 6
      +UNSPEC = 6
      -property width
      +property width

      Return width of a Pin, which is always 1.

      -
      -
      -class skidl.pin.PinList(num, name, part)[source]
      -

      Bases: list

      -

      A list of Pin objects that’s meant to look something like a Pin to a Part. -This is used for vector I/O of XSPICE parts.

      -
      -
      -copy()[source]
      -

      Return a copy of a PinList for use when a Part is copied.

      -
      - -
      -
      -disconnect()[source]
      -

      Disconnect all the pins in the list.

      -
      - -
      -
      -is_connected()[source]
      -
      - -
      - -
      +
      @@ -497,7 +478,7 @@

      Navigation

      \ No newline at end of file diff --git a/docs/api/html/rst_output/skidl.protonet.html b/docs/api/html/rst_output/skidl.protonet.html index 5512c62a..a25dbcbc 100644 --- a/docs/api/html/rst_output/skidl.protonet.html +++ b/docs/api/html/rst_output/skidl.protonet.html @@ -5,7 +5,8 @@ - + + skidl.protonet module — SKiDL documentation @@ -43,12 +44,12 @@

      Navigation

      -
      +

      skidl.protonet module

      Prototype of a net which can become a Net or a Bus depending upon what is connected to it.

      -class skidl.protonet.ProtoNet(name=None, circuit=None)[source]
      +class skidl.protonet.ProtoNet(name=None, circuit=None)[source]

      Bases: skidl.skidlbaseobj.SkidlBaseObject

      @@ -63,7 +64,7 @@

      Navigation

      -
      +
      @@ -108,7 +109,7 @@

      Navigation

      \ No newline at end of file diff --git a/docs/api/html/rst_output/skidl.pyspice.html b/docs/api/html/rst_output/skidl.pyspice.html index be12b99b..ce3c099a 100644 --- a/docs/api/html/rst_output/skidl.pyspice.html +++ b/docs/api/html/rst_output/skidl.pyspice.html @@ -5,7 +5,8 @@ - + + skidl.pyspice module — SKiDL documentation @@ -43,10 +44,9 @@

      Navigation

      -
      -

      skidl.pyspice module

      -

      Import this file to reconfigure SKiDL for doing SPICE simulations.

      -
      +
      +

      skidl.pyspice module

      +
      @@ -91,7 +91,7 @@

      Navigation

      \ No newline at end of file diff --git a/docs/api/html/rst_output/skidl.schlib.html b/docs/api/html/rst_output/skidl.schlib.html index 0087c03c..80990894 100644 --- a/docs/api/html/rst_output/skidl.schlib.html +++ b/docs/api/html/rst_output/skidl.schlib.html @@ -5,7 +5,8 @@ - + + skidl.schlib module — SKiDL documentation @@ -43,13 +44,13 @@

      Navigation

      -
      +

      skidl.schlib module

      Handles schematic libraries for various ECAD tools.

      -class skidl.schlib.SchLib(filename=None, tool=None, lib_section=None, **attribs)[source]
      -

      Bases: object

      +class skidl.schlib.SchLib(filename=None, tool=None, lib_section=None, **attribs)[source] +

      Bases: object

      A class for storing parts from a schematic component library file.

      @@ -100,50 +101,58 @@

      Navigation

      -
      -get_part_by_name(name, allow_multiples=False, silent=False, get_name_only=False)[source]
      +
      +get_parts(use_backup_lib=True, **criteria)[source]
      +

      Return parts from a library that match all the given criteria.

      +
      +
      Keyword Arguments
      +

      criteria – One or more keyword-argument pairs. The keyword specifies +the attribute name while the argument contains the desired value +of the attribute.

      +
      +
      Returns
      +

      A list of Parts that match all the criteria.

      +
      +
      +
      + +
      +
      +get_parts_by_name(name, be_thorough=True, allow_multiples=False, allow_failure=False, partial_parse=False)[source]

      Return a Part with the given name or alias from the part list.

      Parameters
      • name – The part name or alias to search for in the library.

      • +
      • be_thorough – Do thorough search, not just simple string matching.

      • allow_multiples – If true, return a list of parts matching the name. If false, return only the first matching part and issue a warning if there were more than one.

      • -
      • silent – If true, don’t issue errors or warnings.

      • +
      • allow_failure – Return None if no matches found. Issue no errors/warnings.

      • +
      • partial_parse – If true, don’t fully parse any parts that are found.

      Returns
      -

      A single Part or a list of Parts that match all the criteria.

      +

      A list of Parts that match all the criteria.

      -
      -get_parts(use_backup_lib=True, **criteria)[source]
      -

      Return parts from a library that match all the given criteria.

      -
      -
      Keyword Arguments
      -

      criteria – One or more keyword-argument pairs. The keyword specifies -the attribute name while the argument contains the desired value -of the attribute.

      -
      -
      Returns
      -

      A single Part or a list of Parts that match all the criteria.

      -
      -
      +
      +get_parts_quick(name)[source]
      +

      Do a quick search for a part name or alias.

      -classmethod reset()[source]
      +classmethod reset()[source]

      Clear the cache of processed library files.

      -
      +
      @@ -188,7 +197,7 @@

      Navigation

      \ No newline at end of file diff --git a/docs/api/html/rst_output/skidl.scriptinfo.html b/docs/api/html/rst_output/skidl.scriptinfo.html index 75a21cec..16f6e17e 100644 --- a/docs/api/html/rst_output/skidl.scriptinfo.html +++ b/docs/api/html/rst_output/skidl.scriptinfo.html @@ -5,7 +5,8 @@ - + + skidl.scriptinfo module — SKiDL documentation @@ -43,7 +44,7 @@

      Navigation

      -
      +

      skidl.scriptinfo module

      Routines for getting information about a script.

      @@ -76,7 +77,7 @@

      Navigation

      http://code.activestate.com/recipes/579018-python-determine-name-and-directory-of-the-top-lev/

      -
      +
      @@ -121,7 +122,7 @@

      Navigation

      \ No newline at end of file diff --git a/docs/api/html/rst_output/skidl.skidl.html b/docs/api/html/rst_output/skidl.skidl.html index 6a70ae61..0405ec61 100644 --- a/docs/api/html/rst_output/skidl.skidl.html +++ b/docs/api/html/rst_output/skidl.skidl.html @@ -5,7 +5,8 @@ - + + skidl.skidl module — SKiDL documentation @@ -43,32 +44,8 @@

      Navigation

      -
      +

      skidl.skidl module

      -
      -
      -class skidl.skidl.SkidlCfg(*dirs)[source]
      -

      Bases: dict

      -

      Class for holding SKiDL configuration.

      -
      -
      -CFG_FILE_NAME = '.skidlcfg'
      -
      - -
      -
      -load(*dirs)[source]
      -

      Load SKiDL configuration from JSON files in given dirs.

      -
      - -
      -
      -store(dir='.')[source]
      -

      Store SKiDL configuration as JSON in directory as .skidlcfg file.

      -
      - -
      -
      skidl.skidl.get_backup_lib()[source]
      @@ -79,22 +56,11 @@

      Navigation

      skidl.skidl.get_default_tool()[source]
      -
      -
      -skidl.skidl.get_kicad_lib_tbl_dir()[source]
      -

      Get the path to where the global fp-lib-table file is found.

      -
      -
      skidl.skidl.get_query_backup_lib()[source]
      -
      -
      -skidl.skidl.invalidate_footprint_cache(self, k, v)[source]
      -
      -
      skidl.skidl.no_files(circuit=default_circuit)[source]
      @@ -119,7 +85,7 @@

      Navigation

      Set the boolean that controls searching for the backup library.

      -
      +
      @@ -164,7 +130,7 @@

      Navigation

      \ No newline at end of file diff --git a/docs/api/html/rst_output/skidl.skidlbaseobj.html b/docs/api/html/rst_output/skidl.skidlbaseobj.html index 23fe5fbc..91803d73 100644 --- a/docs/api/html/rst_output/skidl.skidlbaseobj.html +++ b/docs/api/html/rst_output/skidl.skidlbaseobj.html @@ -5,7 +5,8 @@ - + + skidl.skidlbaseobj module — SKiDL documentation @@ -43,13 +44,13 @@

      Navigation

      -
      +

      skidl.skidlbaseobj module

      Base object for Circuit, Interface, Package, Part, Net, Bus, Pin objects.

      -class skidl.skidlbaseobj.SkidlBaseObject[source]
      -

      Bases: object

      +class skidl.skidlbaseobj.SkidlBaseObject[source] +

      Bases: object

      ERC(*args, **kwargs)[source]
      @@ -70,7 +71,7 @@

      Navigation

      -property aliases
      +property aliases
      @@ -80,22 +81,27 @@

      Navigation

      -erc_assertion_list = []
      +erc_assertion_list = []
      -erc_list = []
      +erc_list = [] +
      + +
      +
      +property name
      -property notes
      +property notes
      -
      +
      @@ -140,7 +146,7 @@

      Navigation

      \ No newline at end of file diff --git a/docs/api/html/rst_output/skidl.tools.html b/docs/api/html/rst_output/skidl.tools.html index 66ff3416..a1e04547 100644 --- a/docs/api/html/rst_output/skidl.tools.html +++ b/docs/api/html/rst_output/skidl.tools.html @@ -5,7 +5,8 @@ - + + skidl.tools package — SKiDL documentation @@ -43,16 +44,20 @@

      Navigation

      -
      +

      skidl.tools package

      This package contains the handler functions for various EDA tools.

      -
      +

      Subpackages

      @@ -83,14 +88,16 @@

      Subpackages
      -

      Table of Contents

      -

      +
      @@ -62,14 +67,16 @@

      Submodules
      -

      Table of Contents

      -
        +

        This Page

          @@ -106,7 +113,7 @@

          Navigation

        \ No newline at end of file diff --git a/docs/api/html/rst_output/skidl.tools.kicad.kicad.html b/docs/api/html/rst_output/skidl.tools.kicad.kicad.html index 370cad56..8570ec6f 100644 --- a/docs/api/html/rst_output/skidl.tools.kicad.kicad.html +++ b/docs/api/html/rst_output/skidl.tools.kicad.kicad.html @@ -5,7 +5,8 @@ - + + skidl.tools.kicad.kicad module — SKiDL documentation @@ -43,610 +44,90 @@

        Navigation

        -
        +

        skidl.tools.kicad.kicad module

        Handler for reading Kicad libraries and generating netlists.

        -
        -
        -class skidl.tools.kicad.kicad.DrawArc(cx, cy, radius, start_angle, end_angle, unit, dmg, thickness, fill, startx, starty, endx, endy)
        -

        Bases: tuple

        -
        -
        -cx
        -

        Alias for field number 0

        -
        - -
        -
        -cy
        -

        Alias for field number 1

        -
        - -
        -
        -dmg
        -

        Alias for field number 6

        -
        - -
        -
        -end_angle
        -

        Alias for field number 4

        -
        - -
        -
        -endx
        -

        Alias for field number 11

        -
        - -
        -
        -endy
        -

        Alias for field number 12

        -
        - -
        -
        -fill
        -

        Alias for field number 8

        -
        - -
        -
        -radius
        -

        Alias for field number 2

        -
        - -
        -
        -start_angle
        -

        Alias for field number 3

        -
        - -
        -
        -startx
        -

        Alias for field number 9

        -
        - -
        -
        -starty
        -

        Alias for field number 10

        -
        - -
        -
        -thickness
        -

        Alias for field number 7

        -
        - -
        -
        -unit
        -

        Alias for field number 5

        -
        - -
        - -
        -
        -class skidl.tools.kicad.kicad.DrawCircle(cx, cy, radius, unit, dmg, thickness, fill)
        -

        Bases: tuple

        -
        -
        -cx
        -

        Alias for field number 0

        -
        - -
        -
        -cy
        -

        Alias for field number 1

        -
        - -
        -
        -dmg
        -

        Alias for field number 4

        -
        - -
        -
        -fill
        -

        Alias for field number 6

        -
        - -
        -
        -radius
        -

        Alias for field number 2

        -
        - -
        -
        -thickness
        -

        Alias for field number 5

        -
        - -
        -
        -unit
        -

        Alias for field number 3

        -
        - -
        - -
        -
        -class skidl.tools.kicad.kicad.DrawDef(name, ref, zero, name_offset, show_nums, show_names, num_units, lock_units, power_symbol)
        -

        Bases: tuple

        -
        -
        -lock_units
        -

        Alias for field number 7

        -
        - -
        -
        -name
        -

        Alias for field number 0

        -
        - -
        -
        -name_offset
        -

        Alias for field number 3

        -
        - -
        -
        -num_units
        -

        Alias for field number 6

        -
        - -
        -
        -power_symbol
        -

        Alias for field number 8

        -
        - -
        -
        -ref
        -

        Alias for field number 1

        -
        - -
        -
        -show_names
        -

        Alias for field number 5

        -
        - -
        -
        -show_nums
        -

        Alias for field number 4

        -
        - -
        -
        -zero
        -

        Alias for field number 2

        -
        - -
        - -
        -
        -class skidl.tools.kicad.kicad.DrawF0(ref, x, y, size, orientation, visibility, halign, valign)
        -

        Bases: tuple

        -
        -
        -halign
        -

        Alias for field number 6

        -
        - -
        -
        -orientation
        -

        Alias for field number 4

        -
        - -
        -
        -ref
        -

        Alias for field number 0

        -
        - -
        -
        -size
        -

        Alias for field number 3

        -
        - -
        -
        -valign
        -

        Alias for field number 7

        -
        - -
        -
        -visibility
        -

        Alias for field number 5

        -
        - -
        -
        -x
        -

        Alias for field number 1

        -
        - -
        -
        -y
        -

        Alias for field number 2

        -
        - -
        - -
        -
        -class skidl.tools.kicad.kicad.DrawF1(name, x, y, size, orientation, visibility, halign, valign, fieldname)
        -

        Bases: tuple

        -
        -
        -fieldname
        -

        Alias for field number 8

        -
        - -
        -
        -halign
        -

        Alias for field number 6

        -
        - -
        -
        -name
        -

        Alias for field number 0

        -
        - -
        -
        -orientation
        -

        Alias for field number 4

        -
        - -
        -
        -size
        -

        Alias for field number 3

        -
        - -
        -
        -valign
        -

        Alias for field number 7

        -
        - -
        -
        -visibility
        -

        Alias for field number 5

        -
        - -
        -
        -x
        -

        Alias for field number 1

        -
        - -
        -
        -y
        -

        Alias for field number 2

        -
        - -
        - -
        -
        -class skidl.tools.kicad.kicad.DrawPin(name, num, x, y, length, orientation, num_size, name_size, unit, dmg, electrical_type, shape)
        -

        Bases: tuple

        -
        -
        -dmg
        -

        Alias for field number 9

        -
        - -
        -
        -electrical_type
        -

        Alias for field number 10

        -
        - -
        -
        -length
        -

        Alias for field number 4

        -
        - -
        -
        -name
        -

        Alias for field number 0

        -
        - -
        -
        -name_size
        -

        Alias for field number 7

        -
        - -
        -
        -num
        -

        Alias for field number 1

        -
        - -
        -
        -num_size
        -

        Alias for field number 6

        -
        - -
        -
        -orientation
        -

        Alias for field number 5

        -
        - -
        -
        -shape
        -

        Alias for field number 11

        -
        - -
        -
        -unit
        -

        Alias for field number 8

        -
        - -
        -
        -x
        -

        Alias for field number 2

        -
        - -
        -
        -y
        -

        Alias for field number 3

        -
        - -
        - -
        -
        -class skidl.tools.kicad.kicad.DrawPoly(point_count, unit, dmg, thickness, points, fill)
        -

        Bases: tuple

        -
        -
        -dmg
        -

        Alias for field number 2

        -
        - -
        -
        -fill
        -

        Alias for field number 5

        -
        - -
        -
        -point_count
        -

        Alias for field number 0

        -
        - -
        -
        -points
        -

        Alias for field number 4

        -
        - -
        -
        -thickness
        -

        Alias for field number 3

        -
        - -
        -
        -unit
        -

        Alias for field number 1

        -
        - -
        - -
        -
        -class skidl.tools.kicad.kicad.DrawRect(x1, y1, x2, y2, unit, dmg, thickness, fill)
        -

        Bases: tuple

        -
        -
        -dmg
        -

        Alias for field number 5

        -
        - -
        -
        -fill
        -

        Alias for field number 7

        -
        - -
        -
        -thickness
        -

        Alias for field number 6

        -
        - -
        -
        -unit
        -

        Alias for field number 4

        -
        - -
        -
        -x1
        -

        Alias for field number 0

        -
        - -
        -
        -x2
        -

        Alias for field number 2

        -
        - -
        -
        -y1
        -

        Alias for field number 1

        -
        - -
        -
        -y2
        -

        Alias for field number 3

        -
        - -
        - -
        -
        -class skidl.tools.kicad.kicad.DrawText(angle, x, y, size, hidden, unit, dmg, text, italic, bold, halign, valign)
        -

        Bases: tuple

        -
        -
        -angle
        -

        Alias for field number 0

        -
        - -
        -
        -bold
        -

        Alias for field number 9

        -
        - -
        -
        -dmg
        -

        Alias for field number 6

        -
        - -
        -
        -halign
        -

        Alias for field number 10

        -
        - -
        -
        -hidden
        -

        Alias for field number 4

        -
        - -
        -
        -italic
        -

        Alias for field number 8

        -
        - -
        -
        -size
        -

        Alias for field number 3

        -
        - -
        -
        -text
        -

        Alias for field number 7

        -
        - -
        -
        -unit
        -

        Alias for field number 5

        -
        - -
        -
        -valign
        -

        Alias for field number 11

        -
        - -
        -
        -x
        -

        Alias for field number 1

        -
        - -
        -
        -y
        -

        Alias for field number 2

        -
        - -
        -
        -skidl.tools.kicad.kicad.gen_netlist(self)[source]
        -
        +skidl.tools.kicad.kicad.gen_netlist(circuit)[source] +

        Generate a netlist from a Circuit object.

        +
        +
        Parameters
        +

        circuit (Circuit) – Circuit object.

        +
        +
        Returns
        +

        String containing netlist text.

        +
        +
        Return type
        +

        str

        +
        +
        +
        -skidl.tools.kicad.kicad.gen_netlist_comp(self)[source]
        -
        +skidl.tools.kicad.kicad.gen_netlist_comp(part)[source] +

        Generate the netlist text describing a component.

        +
        +
        Parameters
        +

        part (Part) – Part object.

        +
        +
        Returns
        +

        String containing component netlist description.

        +
        +
        Return type
        +

        str

        +
        +
        +
        -skidl.tools.kicad.kicad.gen_netlist_net(self)[source]
        -
        +skidl.tools.kicad.kicad.gen_netlist_net(net)[source] +

        Generate the netlist text describing a net.

        +
        +
        Parameters
        +

        part (Net) – Net object.

        +
        +
        Returns
        +

        String containing net netlist description.

        +
        +
        Return type
        +

        str

        +
        +
        +
        -skidl.tools.kicad.kicad.gen_pcb(self, file_)[source]
        +skidl.tools.kicad.kicad.gen_pcb(circuit, pcb_file, fp_libs=None)[source]

        Create a KiCad PCB file directly from a Circuit object.

        +
        +
        Parameters
        +
          +
        • circuit (Circuit) – Circuit object.

        • +
        • pcb_file – Either a file object that can be written to, or a string +containing a file name, or None.

        • +
        • fp_libs – List of directories containing footprint libraries.

        • +
        +
        +
        Returns
        +

        None.

        +
        +
        -
        -
        -skidl.tools.kicad.kicad.gen_pinboxes(self)[source]
        -

        Generate bounding box and I/O pin positions for each unit in a part.

        -
        - -
        -
        -skidl.tools.kicad.kicad.gen_schematic(self, route)[source]
        -
        -
        -skidl.tools.kicad.kicad.gen_svg_comp(self, symtx, net_stubs=None)[source]
        +skidl.tools.kicad.kicad.gen_svg_comp(part, symtx, net_stubs=None)[source]

        Generate SVG for this component.

        Parameters
          -
        • self – Part object for which an SVG symbol will be created.

        • +
        • part – Part object for which an SVG symbol will be created.

        • +
        • symtx – String such as “HR” that indicates symbol mirroring/rotation.

        • net_stubs – List of Net objects whose names will be connected to part symbol pins as connection stubs.

        • -
        • symtx – String such as “HR” that indicates symbol mirroring/rotation.

        @@ -655,44 +136,80 @@

        Navigation

        -skidl.tools.kicad.kicad.gen_xml(self)[source]
        -
        +skidl.tools.kicad.kicad.gen_xml(circuit)[source] +

        Generate the XML describing a circuit.

        +
        +
        Parameters
        +

        circuit (Circuit) – Circuit object.

        +
        +
        Returns
        +

        String containing the XML for the circuit.

        +
        +
        Return type
        +

        str

        +
        +
        +
        -skidl.tools.kicad.kicad.gen_xml_comp(self)[source]
        -
        +skidl.tools.kicad.kicad.gen_xml_comp(part)[source] +

        Generate the XML describing a component.

        +
        +
        Parameters
        +

        part (Part) – Part object.

        +
        +
        Returns
        +

        String containing the XML for the part.

        +
        +
        Return type
        +

        str

        +
        +
        +
        -skidl.tools.kicad.kicad.gen_xml_net(self)[source]
        +skidl.tools.kicad.kicad.gen_xml_net(net)[source]
        +
        +
        +skidl.tools.kicad.kicad.get_kicad_lib_tbl_dir()[source]
        +

        Get the path to where the global fp-lib-table file is found.

        +
        +
        -skidl.tools.kicad.kicad.load_sch_lib(self, filename=None, lib_search_paths_=None, lib_section=None)[source]
        +skidl.tools.kicad.kicad.load_sch_lib(lib, filename=None, lib_search_paths_=None, lib_section=None)[source]

        Load the parts from a KiCad schematic library file.

        Parameters
        -

        filename – The name of the KiCad schematic library file.

        +
          +
        • lib (SchLib) – SKiDL library object.

        • +
        • filename – The name of the KiCad schematic library file.

        • +
        -skidl.tools.kicad.kicad.parse_lib_part(self, get_name_only=False)[source]
        +skidl.tools.kicad.kicad.parse_lib_part(part, partial_parse=False)[source]

        Create a Part using a part definition from a KiCad schematic library.

        Parameters
        -

        get_name_only – If true, scan the part definition until the +

          +
        • part (Part) – SKiDL Part object.

        • +
        • partial_parse – If true, scan the part definition until the name and aliases are found. The rest of the definition -will be parsed if the part is actually used.

          +will be parsed if the part is actually used.

        • +
        -
        +
        @@ -737,7 +254,7 @@

        Navigation

        \ No newline at end of file diff --git a/docs/api/html/rst_output/skidl.tools.skidl.html b/docs/api/html/rst_output/skidl.tools.skidl.html index 24cf7380..29493f07 100644 --- a/docs/api/html/rst_output/skidl.tools.skidl.html +++ b/docs/api/html/rst_output/skidl.tools.skidl.html @@ -5,7 +5,8 @@ - + + skidl.tools.skidl package — SKiDL documentation @@ -43,17 +44,17 @@

        Navigation

        -
        +

        skidl.tools.skidl package

        - -
        + +
        @@ -62,14 +63,16 @@

        Submodules
        -

        Table of Contents

        -
          +

          This Page

            @@ -106,7 +109,7 @@

            Navigation

          \ No newline at end of file diff --git a/docs/api/html/rst_output/skidl.tools.skidl.skidl.html b/docs/api/html/rst_output/skidl.tools.skidl.skidl.html index 49a303e8..9476e139 100644 --- a/docs/api/html/rst_output/skidl.tools.skidl.skidl.html +++ b/docs/api/html/rst_output/skidl.tools.skidl.skidl.html @@ -5,7 +5,8 @@ - + + skidl.tools.skidl.skidl module — SKiDL documentation @@ -43,7 +44,7 @@

          Navigation

          -
          +

          skidl.tools.skidl.skidl module

          Handler for reading SKiDL libraries and generating netlists.

          @@ -59,11 +60,11 @@

          Navigation

          -skidl.tools.skidl.skidl.parse_lib_part(self, get_name_only=False)[source]
          +skidl.tools.skidl.skidl.parse_lib_part(self, partial_parse=False)[source]

          Create a Part using a part definition from a SKiDL library.

          -
          +
          @@ -108,7 +109,7 @@

          Navigation

          \ No newline at end of file diff --git a/docs/api/html/rst_output/skidl.tools.spice.html b/docs/api/html/rst_output/skidl.tools.spice.html index 50db7149..9143377e 100644 --- a/docs/api/html/rst_output/skidl.tools.spice.html +++ b/docs/api/html/rst_output/skidl.tools.spice.html @@ -5,7 +5,8 @@ - + + skidl.tools.spice package — SKiDL documentation @@ -43,17 +44,17 @@

          Navigation

          -
          +

          skidl.tools.spice package

          - -
          + +
          @@ -62,14 +63,16 @@

          Submodules
          -

          Table of Contents

          -
            +

            This Page

              @@ -106,7 +109,7 @@

              Navigation

            \ No newline at end of file diff --git a/docs/api/html/rst_output/skidl.tools.spice.spice.html b/docs/api/html/rst_output/skidl.tools.spice.spice.html index 3edc7628..7956bec6 100644 --- a/docs/api/html/rst_output/skidl.tools.spice.spice.html +++ b/docs/api/html/rst_output/skidl.tools.spice.spice.html @@ -5,7 +5,8 @@ - + + skidl.tools.spice.spice module — SKiDL documentation @@ -43,7 +44,7 @@

            Navigation

            -
            +

            skidl.tools.spice.spice module

            Handler for reading SPICE libraries.

            @@ -54,18 +55,53 @@

            Navigation

            -class skidl.tools.spice.spice.Parameters(**params)[source]
            -

            Bases: dict

            +class skidl.tools.spice.spice.Parameters(**params)[source] +

            Bases: dict

            Class for holding Spice subcircuit parameters.

            -class skidl.tools.spice.spice.XspiceModel(*args, **kwargs)[source]
            -

            Bases: object

            +class skidl.tools.spice.spice.XspiceModel(*args, **kwargs)[source] +

            Bases: object

            Object to hold the parameters for an XSPICE model.

            +
            +
            +class skidl.tools.spice.spice.XspicePinList(num, name, part)[source]
            +

            Bases: list

            +

            A list of Pin objects that’s meant to look something like a Pin to a Part. +This is used for vector I/O of XSPICE parts.

            +
            +
            +copy(**attribs)[source]
            +

            Return a copy of a PinList for use when a Part is copied.

            +
            +
            Parameters
            +

            attribs (dict) – Attributes to apply to copied part pins.

            +
            +
            +
            + +
            +
            +disconnect()[source]
            +

            Disconnect all the pins in the list.

            +
            + +
            +
            +is_connected()[source]
            +
            + +
            +
            +property name
            +
            + +
            +
            skidl.tools.spice.spice.add_part_to_circuit(part, circuit)[source]
            @@ -94,6 +130,12 @@

            Navigation

            +
            +
            +skidl.tools.spice.spice.add_xspice_io(part, io)[source]
            +

            Add XSPICE I/O to the pins of a part.

            +
            +
            skidl.tools.spice.spice.add_xspice_to_circuit(part, circuit)[source]
            @@ -108,6 +150,21 @@

            Navigation

            +
            +
            +skidl.tools.spice.spice.convert_for_spice(part, spice_part, pin_map)[source]
            +

            Convert a Part object for use with SPICE.

            +
            +
            Parameters
            +
              +
            • part – SKiDL Part object that will be converted for use as a SPICE component.

            • +
            • spice_part (Part) – The type of SPICE Part to be converted to.

            • +
            • pin_map (dict) – Dict with pin numbers/names of part as keys and num/names of spice_part pins as replacement values.

            • +
            +
            +
            +
            +
            skidl.tools.spice.spice.gen_netlist(self, **kwargs)[source]
            @@ -150,11 +207,11 @@

            Navigation

            -skidl.tools.spice.spice.parse_lib_part(self, get_name_only=False)[source]
            +skidl.tools.spice.spice.parse_lib_part(self, partial_parse=False)[source]

            Create a Part using a part definition from a SPICE library.

            -
            +
            @@ -199,7 +256,7 @@

            Navigation

            \ No newline at end of file diff --git a/docs/api/html/rst_output/skidl.utilities.html b/docs/api/html/rst_output/skidl.utilities.html index 82716a90..f907a44c 100644 --- a/docs/api/html/rst_output/skidl.utilities.html +++ b/docs/api/html/rst_output/skidl.utilities.html @@ -5,7 +5,8 @@ - + + skidl.utilities module — SKiDL documentation @@ -43,13 +44,13 @@

            Navigation

            -
            +

            skidl.utilities module

            Utility functions used by the rest of SKiDL.

            -class skidl.utilities.TriggerDict(*args, **kwargs)[source]
            -

            Bases: dict

            +class skidl.utilities.TriggerDict(*args, **kwargs)[source] +

            Bases: dict

            This dict triggers a function when one of its entries changes.

            @@ -154,6 +155,32 @@

            Navigation

            subdirectories withcurrent_level limit.

          +
          Returns
          +

          File pointer and file name or None, None if file could not be opened.

          +
          + + + +
          +
          +skidl.utilities.find_and_read_file(filename, paths=None, ext=None, allow_failure=False, exclude_binary=False, descend=0)[source]
          +

          Search for a file in list of paths, open it and return its contents.

          +
          +
          Parameters
          +
            +
          • filename – Base file name (e.g., “my_file”).

          • +
          • paths – List of paths to search for the file.

          • +
          • ext – The extension for the file (e.g., “.txt”).

          • +
          • allow_failure – If false, failure to find file raises and exception.

          • +
          • exclude_binary – If true, skip files that contain binary data.

          • +
          • descend – If 0, don’t search lower-level directories. If positive, search +that many levels down for the file. If negative, descend into +subdirectories withcurrent_level limit.

          • +
          +
          +
          Returns
          +

          File contents and file name or None, None if file could not be opened.

          +
          @@ -226,12 +253,6 @@

          Navigation

          Return true if a file contains binary (non-text) characters.

          -
          -
          -skidl.utilities.is_iterable(x)[source]
          -

          Return True if x is iterable (but not a string).

          -
          -
          skidl.utilities.list_or_scalar(lst)[source]
          @@ -301,12 +322,6 @@

          Navigation

          -
          -
          -skidl.utilities.parse_sexp(sexp, allow_underflow=False)[source]
          -

          Parse an S-expression and return a nested list.

          -
          -
          skidl.utilities.reset_get_unique_name()[source]
          @@ -349,7 +364,7 @@

          Navigation

          Return x if it is already a list, or return a list containing x if x is a scalar.

          -
          +
          @@ -394,7 +409,7 @@

          Navigation

          \ No newline at end of file diff --git a/docs/api/html/search.html b/docs/api/html/search.html index 1ac053ba..79988a59 100644 --- a/docs/api/html/search.html +++ b/docs/api/html/search.html @@ -51,13 +51,14 @@

          Navigation

          Search

          -
          - +

          @@ -104,7 +105,7 @@

          Navigation

          \ No newline at end of file diff --git a/docs/api/html/searchindex.js b/docs/api/html/searchindex.js index 3dadf423..1c02208b 100644 --- a/docs/api/html/searchindex.js +++ b/docs/api/html/searchindex.js @@ -1 +1 @@ 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tir:[8,41],entiti:12,entri:41,enumer:27,equival:[18,19],eras:8,erc:[3,4,8,15,16,24,27,32,33],erc_assertion_list:33,erc_desc:[24,27],erc_list:[8,12,16,24,33],error:[7,8,15,24,30,33],even:24,event:1,everi:24,everyon:9,exampl:[7,24,41],exc_class:15,exc_info:15,except:[7,15,16,24,41],exclude_binari:41,execut:[8,31],exist:[8,16,27],expand:[6,41],expand_bus:41,expand_grid:6,expand_indic:41,explicitli:16,express:[1,24,25,41],ext:41,extend:[4,7],extens:41,extern:8,extract:41,f:[8,24,41],f_or_fn:41,fail:33,fail_msg:33,failur:41,fals:[8,24,27,30,36,38,40,41],featur:41,feel:8,fetch:[7,16],field:[16,36],fieldnam:36,file:[1,8,15,16,24,25,29,30,31,32,36,38,40,41],file_:[8,30,36],file_or_filenam:41,filehandl:15,filenam:[30,36,38,40,41],fill:36,filter_list:41,find:[24,25,41],find_and_open_fil:41,find_num_copi:41,first:[21,30],fit:1,flag:[16,41],flat:[4,41],flatten:41,follow:[1,41],foot:24,footprint:[24,25],footprintcach:25,format:[16,24,25,30],found:[7,16,24,32,36],fp:[25,32],free:1,from:[1,6,7,8,15,16,20,21,24,25,27,28,30,31,32,36,38,40,41],from_dir:14,from_iadd:41,full:41,fullmatch:41,func:[15,27,33],func_str:27,furnish:1,g:[15,16,24,30,41],gen_netlist:[36,40],gen_netlist_comp:36,gen_netlist_net:36,gen_pcb:36,gen_pinbox:36,gen_schemat:36,gen_svg_comp:36,gen_xml:36,gen_xml_comp:36,gen_xml_net:36,gener:[8,15,16,24,27,36,38,40,41],generate_dot:8,generate_graph:8,generate_netlist:8,generate_netlist_compon:24,generate_netlist_net:16,generate_netlistsvg_skin:8,generate_pcb:8,generate_pinbox:24,generate_schemat:8,generate_svg:8,generate_svg_compon:24,generate_xml:8,generate_xml_compon:24,generate_xml_net:16,get:[7,8,16,20,24,27,31,32],get_backup_lib:32,get_default_tool:32,get_kicad_lib_tbl_dir:32,get_name_onli:[24,30,36,38,40],get_net:[7,8,16,27],get_part:30,get_part_by_nam:30,get_pin:[7,16,24,27],get_pin_info:27,get_query_backup_lib:32,get_script_nam:31,get_skidl_trac:31,get_trac:15,get_unique_nam:41,ghi:25,give:5,given:[7,8,15,16,24,25,27,30,32,41],global:32,gnd:[8,21,24],grant:1,graph:8,graphviz:8,greater:41,grid:6,grid_hgt:6,grid_wid:6,group:[4,7,12],h:10,ha:24,halign:36,handl:[5,7,8,12,16,20,21,24,27,30],handler:[15,34,36,38,40],have:[15,16,24,41],heap:41,herebi:1,hidden:36,hierarch:[4,8],hierarchi:8,hierarchical_nam:24,hold:[8,32,40],holder:1,houston:15,how:[2,15],hr:36,html:8,http:[8,31],i:[12,24,25,27,36,40],iadd_flag:41,id:24,ident:[24,31],identifi:[24,27],ignor:24,impli:1,implicit:[7,16],includ:[1,16,27],inclus:[16,24],index:[0,7,24,41],indic:[24,36,41],info:[8,15],inform:[15,16,24,31],init:8,initi:41,input:[2,27],insert:[7,41],instal:0,instanc:[7,16,24,27,33],instanti:[8,31],instantiate_packag:8,integ:[7,16,24,41],intenum:27,interconnect:[2,4],interest:15,interfac:[3,4,5,8,11,23,33],interpret:31,invalidate_footprint_cach:32,io45:41,io:[8,24,41],ipython:8,is_attach:[16,27],is_binary_fil:41,is_connect:[24,27],is_implicit:[7,16],is_iter:41,is_mov:[7,16,23,24,28],isn:41,issu:[15,30],ital:36,item:41,iter:[20,41],its:[16,24,41],itself:41,j:24,json:32,just:[7,16,21,24,27],k:[7,32],keep:41,kei:[12,24,27,30,41],kernighan:6,keyword:[7,15,16,24,25,27,30,41],kicad:[4,16,24,30,34],kind:1,kwarg:[8,12,15,23,24,25,33,40,41],label:[8,24],languag:4,layout:[2,4],learn:2,leav:24,led1:7,led:7,legal:41,len:[7,20],length:[36,41],less:16,let:2,lev:31,level:[8,31,41],liabil:1,liabl:1,lib:[3,4,24,25,32,40],lib_search_path:40,lib_search_paths_:[36,38,40],lib_sect:[30,36,38,40],libnam:30,librari:[8,24,25,27,30,32,36,38,40],licens:0,like:[7,8,16,21,23,24,27,41],limit:[1,41],lin:6,line:[7,19,31,41],linear:[24,41],link:27,list:[5,6,7,8,16,20,21,22,24,25,27,30,31,36,40,41],list_or_scalar:41,ll:16,lm358:24,lm358a:24,lm4808mp:24,load:[8,25,32,36,38,40],load_sch_lib:[36,38,40],local:8,lock_unit:36,log:[15,32],logger:[3,4],logo:24,longest:41,look:27,lookahead:25,lower:41,lr:8,lst:41,made:[8,16,41],main:19,maintain:24,major:15,make:[7,15,16,24,27,41],make_unit:24,manf_num:24,mani:[15,41],match:[24,25,30,41],match_pin_regex:24,match_regex:41,max_rcv:27,maximum:[16,41],mean:[12,16],meaning:31,meant:27,mechan:24,member:20,merchant:1,merg:[1,41],merge_dct:41,merge_dict:41,merge_nam:16,messag:15,method:24,min_rcv:27,mini_reset:8,minimum:41,mirror:36,miss:24,mistak:2,mit:1,mode:41,model:40,modifi:1,modul:[0,3,4,13,34,35,37,39],module_nam:25,more:[7,16,22,24,27,30,41],movabl:[7,16],move:24,msb:7,msg:15,mul_hgt:6,mul_wid:6,multi:[16,41],multipl:[5,7,16,24],must:[24,41],my_fil:41,n:[7,16,27,41],n_copi:16,name:[5,7,8,12,16,17,24,25,27,28,30,31,36,38,40,41],name_offset:36,name_s:36,ncnet:16,neato:8,necessari:8,need:[9,41],neg:[7,16,24,41],nest:[8,41],nested_list:41,net:[3,4,5,6,7,8,11,12,17,20,21,24,27,28,33,36,41],net_pin_part:40,net_shap:8,net_stub:[8,24,36],netclass:[3,4,16],netlist:[2,4,8,15,16,18,19,24,27,32,36,38],netlist_src:18,netlist_to_skidl:[3,4],netlist_to_skidl_main:[3,4],netlistsvg:8,netpinlist:[3,4],network:[3,4,16,20,24,27,28],new_pin_nam:24,new_pin_num:24,no_connect:16,no_fil:32,noconnect:27,noconnect_dr:16,node:[8,40],non:[7,8,16,24,41],none:[7,8,16,24,25,27,28,30,36,38,40,41],noninfring:1,norecurs:41,not_impl:40,note:[3,4,7,16,24,27,33],noth:[8,24,41],notic:1,ntwk:21,num:[27,36,41],num_copi:[7,16,24,27],num_siz:36,num_to_char:41,num_unit:36,number:[6,7,15,16,24,27,36,41],o:[12,24,25,27,36,40],obj:[10,21,41],object:[5,6,7,8,10,11,15,16,17,21,22,24,25,27,30,31,32,33,36,40,41],obtain:1,onc:16,one:[7,16,22,24,27,30,41],onesid:27,onli:[24,30,31,41],open:[27,41],opencol:27,openemit:27,oper:[7,12,15,16,20,24],optim:6,order:24,org:8,organ:24,orient:36,origin:[21,31],ortho:8,other:[1,5,16,22,24],other_pin:27,otherwis:[1,24,41],out:[1,27],output:[2,4,8,15,27,32],over:8,overview:0,overwrit:16,own:24,p:[7,27],p_copi:27,packag:[2,3,8,33],pad:25,page:0,pair:[7,16,24,27,30,41],parallel:21,param:40,paramet:[5,7,8,15,16,24,25,27,30,36,38,40,41],paren:41,parent:24,pars:[24,36,41],parse_lib_part:[36,38,40],parse_search_term:25,parse_sexp:41,part:[3,4,5,6,7,8,11,16,21,23,25,27,30,33,36,38,40,41],part_defn:24,part_nam:25,part_queri:[3,4],part_shap:8,particip:27,particular:[1,6,40],partnet:6,partunit:24,pass:[15,41],passiv:27,path:[25,32,40,41],pcb:[2,4,8,24,36],pcbnew:17,pckg_info:[3,4],perform:2,permiss:1,permit:1,person:1,phantompin:27,phase:15,phase_desc:15,phrase:25,physic:16,piec:24,pin:[3,4,5,7,8,11,16,20,21,24,25,33,36,41],pin_aliases_to_attribut:24,pin_id1:24,pin_id2:24,pin_id:24,pin_info:27,pin_net_bu:[16,27],pin_splitt:24,pin_typ:27,pinbox:24,pinless:27,pinlist:27,pinnamesearch:24,pinnumbersearch:24,pins_nets_bus:[7,16,27,41],pintyp:27,pip:2,place:16,plot:8,point:[6,8,10,24,36],point_count:36,pointer:41,pop:15,portion:1,posit:[6,7,36,41],possibl:41,power:27,power_symbol:36,prearrang:6,prefix:[24,41],prevent:32,previous:[15,41],print:25,problem:15,process:30,program:[2,18,19],properti:[7,10,16,20,24,27,33],protonet:[3,4],prototyp:28,provid:[1,4],pt:10,publish:1,pulldn:27,pullup:27,pullupdn:27,purpos:1,push:15,pushpul:27,put:41,pwrin:27,pwrout:27,py2ex:31,pyinstal:31,pyspic:[3,4,40],python:[2,4,31,41],quot:[25,41],r12:41,r1:21,r2:21,r3:21,r4:21,r5:21,r:24,radiu:36,rais:[7,15,16,24,41],raise_:15,randomli:6,rankdir:8,re:[15,24,41],read:[8,16,24,30,36,38,40],readthedoc:8,recip:31,reconfigur:29,record:8,recreat:[24,27],rectangl:8,recurs:41,ref:[8,24,27,36],ref_prefix:24,refer:[24,27,41],reflect:16,regardless:41,regex:[25,41],region:6,regular:[24,25,41],relat:4,remov:[5,8,15,16,24,41],remove_log_fil:15,removehandl:15,rename_pin:24,renumber_pin:24,replace_spec_chars_in_nam:16,report:[15,24],report_summari:15,repres:8,request:[7,16,24],res_copi:24,reset:[8,15,24,25,30,41],reset_get_unique_nam:41,resist:24,resistor:24,rest:[24,36,41],restrict:[1,24],result:[2,4],right:1,rmv:6,rmv_attr:41,rmv_buse:8,rmv_hierarchical_nam:8,rmv_iadd:41,rmv_net:8,rmv_packag:8,rmv_part:8,rmv_pin:24,rmv_quot:41,rmv_stuff:8,rotat:36,round:10,rout:36,routin:[23,31],row:6,rule:[2,4,11,27],run:[8,31,33],s:[7,15,16,24,27,41],same:[7,16,20,24,30,41],satisfi:24,save:[8,15],scalar:41,scan:36,schemat:[4,6,8,11,24,30,36,38],schlib:[3,4,24,25],script:[4,31],scriptinfo:[3,4],search:[0,24,25,30,32,40,41],search_footprint:25,search_footprints_it:25,search_part:25,search_parts_it:25,see:8,segment:16,select:[16,24,41],self:[32,36,38,40],sell:1,separ:8,sequenc:25,seri:21,serv:[2,12],set:[5,7,15,16,24,27,32,41],set_attr:41,set_backup_lib:32,set_default_tool:32,set_iadd:41,set_pin_alia:24,set_query_backup_lib:32,set_trace_depth:15,sever:[15,33],sexp:41,shall:1,shape:[8,36],shorter:24,should:24,show:[8,25],show_anon:8,show_footprint:25,show_nam:36,show_num:36,show_part:25,show_valu:8,silent:30,silkscreen:24,simul:[4,29],singl:[5,12,16,24,27,28,30,41],size:36,skidlbaseobj:[3,4,7,8,16,24,27,28],skidlbaseobject:[7,8,16,24,27,28,33],skidlcfg:32,skidllogfilehandl:15,skidllogg:15,skidlpart:24,skin:8,skip:41,slice:[24,41],slice_max:41,slice_min:41,smaller:24,so:[1,7,16,21,23,24,27],softwar:1,sole:27,some:8,someth:27,sourc:[0,2,5,6,7,8,10,11,12,14,15,16,17,18,19,20,21,22,23,24,25,27,28,30,31,32,33,36,38,40,41],special:20,specif:24,specifi:[15,16,22,24,30,41],spice:[4,29,34],spline:8,split:[8,24,27],split_nam:27,split_net:8,split_parts_ref:8,split_pin_nam:24,src:24,stabl:8,stack:8,standard:8,start:[7,8,24,41],start_angl:36,starti:36,startx:36,statement:8,stop:15,stop_file_output:15,stop_log_file_output:15,store:[6,16,22,24,25,27,30,32,41],stream:8,strength:[16,27],string:[5,7,8,15,16,22,24,25,27,30,36,40,41],structur:4,stub:36,stuff:[8,9],style:8,subcirc_func:23,subcircuit:[8,23,40],subckt:40,subclass:16,subdirectori:41,subject:1,sublicens:1,submodul:[3,34],subpackag:3,subrcurrent_levelin:41,subset:24,substanti:1,substitut:25,substr:27,subsystem:12,suffix:30,superclass:24,support:22,sure:24,svg:[8,24,36],swap:24,swap_pin:24,symbol:[8,36],symtx:[24,36],t:[8,16,24,30,41],tabl:[25,32],tag:[24,25],take:41,tee:21,templat:24,term:25,termin:[4,21],test_valid:16,text:[24,36,41],than:[16,30,41],thei:24,them:[7,15,16,24,27],thi:[1,2,4,7,8,12,15,16,24,27,29,30,32,33,34,36,41],thick:36,thorni:15,through:41,thu:25,tie:[24,27],time:[8,15],titl:40,to_dir:14,to_list:41,togeth:27,tool:[2,3,4,8,16,24,25,30,32],tool_vers:24,top:31,tort:1,total:15,trace:31,track:15,travers:16,trigger:41,triggerdict:41,tristat:27,tupl:[7,16,24,27,36,41],tutori:2,two:[7,21,24,27,41],txt:41,type:[27,41],u:24,unabl:40,unchang:41,unconnect:16,uniqu:[7,16,24,41],unit:[6,24,36],unknown:24,unpars:24,unspec:27,unspecifi:27,until:36,up:[8,41],updat:[6,7,16,27,41],upon:[24,28],us:[1,2,4,6,7,8,15,16,20,23,24,25,27,30,32,36,38,40,41],usabl:12,usag:0,use_backup_lib:30,user:22,usual:24,util:[3,4],v5:24,v6:24,v:32,val:32,valid:[16,24],valign:36,valu:[7,8,15,16,24,27,30,41],vandenbout:1,variabl:41,variou:[30,34],vcc:24,vector:27,vi:21,via:4,violat:[4,27],visibl:36,w:10,wa:[24,31,41],warn:[15,30],warranti:1,we:15,were:[15,30],what:[28,41],when:[7,8,16,24,27,31,41],where:[12,24,31,32],whether:[1,24],which:[7,16,20,21,24,27,28,30,36,41],whitespac:[25,41],whom:1,whose:[24,36,41],wide:8,width:[7,16,20,25,27],wire:[4,6,7],withcurrent_level:41,within:[6,25],without:[1,24],won:16,work:[4,8,12],would:[24,25],write:8,written:8,x1:36,x2:36,x:[6,10,36,41],xml:[8,16,24],xspice:[24,27,40],xspicemodel:40,y1:36,y2:36,y:[6,10,36],yield:41,you:[2,4,7,16,21,24,27],zero:[7,16,24,25,27,36]},titles:["SKiDL","License","SKiDL","skidl","skidl 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22,40],internal_bbox:31,internal_net:34,interpret:36,intersect:32,interv:30,io45:52,io:[7,23,51,52],ipython:7,is_attach:[16,26],is_binary_fil:52,is_connect:[23,26,51],is_implicit:[6,16],is_insid:32,is_mov:[6,16,22,23,27],isn:52,issu:[15,35],ital:46,item:52,iter:19,its:[16,23,31,32,34,52],itself:52,j:23,json:9,junction:34,just:[6,16,20,23,26,35],k:6,keep:52,kei:[9,12,23,26,35,51,52],keyword:[6,15,16,23,24,26,35,52],kicad:[4,7,16,23,31,35,41],kind:1,kwarg:[7,11,12,15,22,23,24,40,51,52],l:[32,46],label:[7,23,44,46],languag:4,larg:31,larger:23,layout:[2,4],learn:2,least:31,leav:23,led1:6,led:6,left:32,legal:52,len:[6,19],length:[46,52],less:16,let:2,lev:36,level:[7,31,36,52],liabil:1,liabl:1,lib:[3,4,23,24,39,45,51],lib_search_path:51,lib_search_paths_:[45,46,47,49,51],lib_sect:[35,45,49,51],libnam:35,librari:[7,23,24,26,35,39,45,46,47,49,51],licens:0,like:[6,7,16,20,22,23,26,31,51,52],limit:[1,52],line:[6,30,36,38,44,52],linear:[23,52],link:26,list:[5,6,7,16,19,20,21,23,24,26,30,31,33,34,35,36,45,46,47,51,52],list_or_scalar:52,ll:[16,32],lm358:23,lm358a:23,lm4808mp:23,load:[7,9,24,45,46,47,49,51],load_sch_lib:[45,46,47,49,51],local:7,lock_unit:46,log:[15,23,39],logger:[3,4],logo:23,longest:52,look:[34,51],lookahead:24,lower:[32,52],lr:[7,32],lst:52,made:[7,16,52],magnitud:32,main:38,maintain:23,major:15,make:[6,15,16,23,26,34,52],make_unit:23,manf_num:23,mani:[15,52],master:46,match:[23,24,35,52],match_pin_regex:23,match_regex:52,matrix:[23,30,31,32,44],max:32,max_rcv:26,maximum:[16,52],mean:[12,16,23],meaning:36,meant:51,measur:23,mechan:23,meet:34,member:19,merchant:1,merg:[1,9,52],merge_dct:[9,52],merge_dict:52,merge_nam:16,messag:[15,23],method:[23,46],min:32,min_rcv:26,mini_reset:7,minimum:52,mirror:[45,46,47],miss:23,mistak:2,mit:1,mixin:[33,34,44],mode:52,model:51,modifi:1,modul:[0,3,4,13,29,37,41,42,48,50],module_nam:24,month:44,more:[6,16,21,23,26,31,35,52],movabl:[6,16],move:23,msb:6,msg:15,multi:[16,52],multipl:[5,6,16,23],multipli:31,must:[23,52],my_fil:52,n:[6,16,26,52],n_copi:16,name:[5,6,7,11,12,16,17,23,24,26,27,35,36,40,44,45,46,47,49,51,52],name_offset:46,name_s:46,name_sz:31,namespac:[3,4],ncnet:16,neato:7,necessari:7,need:[8,52],neg:[6,16,23,52],nest:[7,52],nested_list:52,net:[3,4,5,6,7,10,11,12,17,19,20,23,26,27,30,31,34,40,44,45,46,47,52],net_pin_part:51,net_shap:7,net_stub:[7,23,45,46,47],netclass:[3,4,16],netinterv:30,netlist:[2,4,7,15,16,18,23,26,38,39,45,49],netlist_src:18,netlist_to_skidl:[3,4],netlist_to_skidl_main:[4,37],netlistsvg:7,netpinlist:[3,4],nettermin:31,network:[3,4,16,19,23,26,27],new_pin_nam:23,new_pin_num:23,no_connect:16,no_fil:39,no_keep_stub:33,noconnect:26,noconnect_dr:16,node:[7,31,33,34,44,51],non:[6,7,16,23,52],none:[6,7,16,23,24,26,27,30,31,33,34,35,44,45,46,47,49,51,52],noninfring:1,norecurs:52,norm:32,not_impl:51,note:[3,4,6,16,23,26,40],noth:[7,23,52],notic:1,ntwk:20,num:[23,46,51,52],num_copi:[6,16,23,26],num_siz:46,num_to_char:52,num_unit:46,number:[6,15,16,23,26,31,46,51,52],o:[12,23,24,51],obj:[20,32,52],object:[5,6,7,10,11,15,16,17,20,21,23,24,26,30,31,32,33,34,35,36,39,40,44,45,46,47,51,52],obtain:1,onc:16,one:[6,7,16,21,23,26,31,35,52],onesid:26,onli:[23,35,36,52],open:[26,52],opencol:26,openemit:26,oper:[6,12,15,16,19,23,32],option:[30,31,33,34,44],order:[23,31],ordered_pin:23,org:[7,23],organ:23,orient:46,origin:[20,32,36],ortho:7,other:[1,5,16,21,23,32],other_pin:26,other_stuff:34,otherwis:[1,23,31,52],out:[1,26,34],output:[2,4,7,15,26,39],over:7,overrid:23,overview:0,overwrit:16,own:23,p1:32,p2:32,p:[6,26],p_copi:26,packag:[2,3,7,40],pad:24,page:[0,31],pair:[6,16,23,26,35,52],parallel:20,param:51,paramet:[5,6,7,9,11,15,16,23,24,26,30,31,32,33,34,35,44,45,46,47,49,51,52],paren:52,parent:[23,31],pars:[23,35,45,46,47],parse_lib_part:[45,46,47,49,51],parse_search_term:24,part:[3,4,5,6,7,10,11,16,20,22,24,26,30,31,33,34,35,40,45,46,47,49,51,52],part_defn:23,part_nam:24,part_queri:[3,4],part_shap:7,partial_pars:[23,35,45,46,47,49,51],particip:26,particular:[1,23,51],partunit:23,pass:[15,52],passiv:26,path:[24,45,51,52],pcb:[2,4,7,23,45],pcb_file:45,pcbnew:17,pckg_info:[3,4],perform:2,permiss:1,permit:1,person:1,phantompin:26,phase:15,phase_desc:15,phrase:24,physic:16,piec:23,pin:[3,4,5,6,7,10,16,19,20,23,24,31,34,40,44,45,46,47,51,52],pin_id1:23,pin_id2:23,pin_id:23,pin_info:26,pin_label_to_eeschema:44,pin_map:[23,51],pin_net_bu:[16,26],pin_splitt:23,pin_typ:26,pinless:26,pinlist:51,pinnamesearch:23,pinnumbersearch:23,pins_nets_bus:[6,16,26,52],pintyp:26,pip:2,place:[4,16,29,30,31],placement:[30,31,33,34],placer:[31,33],plot:7,point:[7,23,30,32,33,34,46],point_count:46,pointer:52,pop:15,portion:1,posit:[6,52],possibl:52,power:26,power_symbol:46,prefix:[23,52],preprocess_parts_and_net:31,prettier:34,prevent:39,previou:7,previous:[15,52],print:24,problem:15,process:35,program:[2,18,38],properti:[6,16,19,23,26,32,40,51],protonet:[3,4],prototyp:27,provid:[1,4],pt:[30,32],publish:1,pulldn:26,pullup:26,pullupdn:26,purpos:[1,33,34],push:15,pushpul:26,put:52,pwrin:26,pwrout:26,py2ex:36,pygam:30,pyinstal:36,pyspic:[3,4,51],python:[2,4,36,52],quick:35,quot:[24,52],r12:52,r1:20,r2:20,r3:20,r4:20,r5:20,r:[23,32,46],radiu:[30,46],rais:[6,15,16,23,34,52],raise_:15,rankdir:7,re:[15,23,52],read:[7,16,23,35,45,49,51],readthedoc:7,real:30,recip:36,record:7,recreat:[23,26],rectangl:7,recurs:[9,52],redraw:30,ref:[7,23,26,46],ref_prefix:23,refer:[23,26,52],reflect:16,regardless:52,regex:[24,52],regular:[23,24,52],relat:4,releas:23,release_pin:23,remov:[5,7,15,16,23,34,52],remove_log_fil:15,remove_pow:33,removehandl:15,rename_pin:23,render:30,renumber_pin:23,replac:[23,51],report:[15,23],report_summari:15,repres:11,request:[6,16,23],res_copi:23,reset:[7,15,23,24,35,52],reset_get_unique_nam:52,resist:23,resistor:23,resiz:32,rest:[23,45,46,47,52],restor:31,restrict:[1,23],result:[2,4],rev_major:44,rev_minor:44,right:[1,32],rmv_attr:52,rmv_buse:7,rmv_hierarchical_nam:7,rmv_iadd:52,rmv_net:7,rmv_packag:7,rmv_part:7,rmv_pin:23,rmv_quot:52,rmv_routing_point:34,rmv_stuff:7,rot_cw_90:32,rotat:[32,45,46,47],round:32,rout:[4,29,30,31],router:[31,34],routin:[22,30,36],routing_bbox:34,routingfailur:34,rule:[2,4,10,26],run:[7,36,40],s:[6,15,16,23,46,51,52],same:[6,16,19,23,34,35,52],satisfi:23,save:[7,15],scalar:52,scale:44,scan:[45,46,47],schemat:[3,4,7,10,23,35,43,45,46,47,49],schematic_files_format:23,schlib:[3,4,23,24,45,46],scr:30,screen:30,script:[3,4,36],scriptinfo:[3,4],search:[0,23,24,31,35,39,51,52],search_footprint:24,search_footprints_it:24,search_part:24,search_parts_it:24,see:7,seen:31,seg:30,seg_thick:30,segment:[16,30,32,34],select:[16,23,52],self:[23,46,47,49,51],sell:1,separ:7,sequenc:[24,32,34],seri:20,serv:[2,12],set:[5,6,15,16,23,26,39,52],set_attr:52,set_backup_lib:39,set_default_tool:39,set_iadd:52,set_query_backup_lib:39,set_trace_depth:15,sever:[15,40],shall:1,shape:[7,46],sheet:[31,44],sheet_tx:44,shorter:23,should:23,show:[7,24],show_anon:7,show_capac:34,show_footprint:24,show_nam:46,show_num:46,show_part:24,show_valu:7,shown:31,silkscreen:23,similar:23,simpl:35,simul:4,singl:[5,12,16,23,26,27,52],situat:23,size:[31,32,46],skidlbaseobj:[3,4,6,7,16,23,26,27],skidlbaseobject:[6,7,16,23,26,27,40],skidlconfig:9,skidllogfilehandl:15,skidllogg:15,skidlpart:23,skin:7,skip:52,slack:31,slice:[23,52],slice_max:52,slice_min:52,small:31,smaller:23,snap:[32,33],so:[1,6,16,20,22,23,26,31],softwar:1,sole:26,some:[7,23],someth:51,sourc:[0,2,5,6,7,9,10,11,12,14,15,16,17,18,19,20,21,22,23,24,26,27,30,31,32,33,34,35,36,38,39,40,44,45,46,47,49,51,52],space:32,special:[9,19],specif:23,specifi:[15,16,21,23,35,52],spice:[4,23,41],spice_part:[23,51],spline:7,split:[7,23,26],split_nam:26,split_net:7,split_parts_ref:7,split_pin_nam:23,src:23,stabl:7,stack:7,standard:7,start:[6,7,23,30,52],start_angl:46,starti:46,startx:46,statement:11,step:34,stop:15,stop_file_output:15,stop_log_file_output:15,store:[9,16,21,23,24,26,35,52],str:[30,31,32,33,34,44,45,46],stream:7,strength:[16,26],string:[5,6,7,15,16,21,23,24,26,30,31,32,34,35,45,46,47,51,52],structur:[4,31],stub:[7,45,46,47],stuff:[7,8,31],style:7,subcirc_func:22,subcircuit:[7,11,22,51],subckt:51,subclass:16,subdirectori:52,subject:1,sublicens:1,submodul:[3,41],subpackag:3,subrcurrent_levelin:52,subset:23,substanti:1,substitut:24,substr:26,subsystem:12,suffix:35,sum:31,summari:15,superclass:23,support:[11,21],sure:23,surround:34,svg:[7,23,45,46,47],swap:23,swap_pin:23,switchbox:34,symbol:[7,33,34,45,46,47],symtx:[23,32,45,46,47],t:[7,16,23,34,35,52],tabl:[24,45],tag:[7,23,24],take:52,tee:20,templat:23,term:24,termin:[4,20,30,31,34,46],test_valid:16,text:[23,30,33,34,44,45,46,52],than:[16,35,52],thei:[23,31],them:[6,15,16,23,26],thi:[1,2,4,6,7,12,15,16,23,26,31,33,34,35,39,40,41,45,46,47,51,52],thick:[30,46],thorni:15,thorough:35,through:[9,34,52],thu:24,tie:[23,26],time:[7,15],titl:[31,44,51],to_dir:14,to_eeschema:[23,31,44],to_list:52,todai:44,togeth:26,tool:[2,3,4,7,16,23,24,31,33,34,35,39],tool_vers:23,top:36,top_nam:31,tort:1,total:[15,31],total_sheet_num:44,trace:36,track:[15,34],transform:[23,30,31,32],translat:[32,44],travers:16,tree:46,trigger:52,triggerdict:52,tristat:26,tupl:[6,16,23,26,30,46,52],tutori:2,two:[6,20,23,26,30,32,52],tx:[23,30,31,32,44],txt:[30,52],type:[23,26,30,31,32,33,34,44,45,46,51,52],u:[23,46],ul:32,unabl:51,unchang:52,unconnect:16,uniqu:[6,16,23,52],unit:[23,32,46],unknown:23,unpars:23,unspec:26,unspecifi:26,until:[45,46,47],up:[7,52],updat:[6,9,16,26,32,52],upon:[23,27,30],upper:32,ur:32,us:[1,2,4,6,7,11,15,16,19,22,23,24,26,30,31,33,35,39,43,44,45,46,47,49,51,52],usabl:12,usag:0,use_backup_lib:35,user:[21,30],usual:23,util:[3,4,46],v5:[23,41,42,44],v6:[23,41,42],v:32,v_track:34,val:39,valid:[16,23],valign:46,valu:[6,7,15,16,23,26,35,51,52],vandenbout:1,variabl:52,variou:[35,41],vcc:23,vector:[30,32,51],vertic:34,vi:20,via:4,violat:[4,26],visibl:46,w:32,wa:[23,36,46,52],wait:30,want:23,warn:[15,35],warranti:1,we:15,were:[15,35],what:[27,52],when:[6,7,16,23,26,34,36,43,51,52],where:[12,23,34,36,45],whether:[1,23],which:[6,16,19,20,23,26,27,30,33,35,45,46,47,52],whitespac:[24,52],whom:1,whose:[23,31,45,46,47,52],wide:7,width:[6,16,19,24,26,32],wiki:23,wikibook:23,window:30,wire:[4,6,34],wise:32,withcurrent_level:52,within:[24,31,34],without:[1,23],won:16,work:[4,12],would:[23,24],write:[7,44],written:[7,45,46],x1:46,x2:46,x:[30,32,34,46,52],xml:[7,16,23,45],xspice:[23,51],xspicemodel:51,xspicepinlist:51,y1:46,y2:46,y:[30,32,46],year:44,yield:52,you:[2,4,6,16,20,23,26],zero:[6,16,23,24,26,46]},titles:["SKiDL","License","SKiDL","skidl","skidl package","skidl.alias module","skidl.bus module","skidl.circuit module","skidl.common module","skidl.config module","skidl.erc module","skidl.group module","skidl.interface module","skidl.libs package","skidl.libs.convert_libs module","skidl.logger module","skidl.net module","skidl.netclass module","skidl.netlist_to_skidl module","skidl.netpinlist module","skidl.network module","skidl.note module","skidl.package module","skidl.part module","skidl.part_query module","skidl.pckg_info module","skidl.pin module","skidl.protonet module","skidl.pyspice module","skidl.schematics package","skidl.schematics.debug_draw module","skidl.schematics.gen_schematic module","skidl.schematics.geometry module","skidl.schematics.place module","skidl.schematics.route module","skidl.schlib module","skidl.scriptinfo module","skidl.scripts namespace","skidl.scripts.netlist_to_skidl_main module","skidl.skidl module","skidl.skidlbaseobj module","skidl.tools package","skidl.tools.kicad package","skidl.tools.kicad.constants module","skidl.tools.kicad.eeschema_v5 module","skidl.tools.kicad.kicad module","skidl.tools.kicad.v5 module","skidl.tools.kicad.v6 module","skidl.tools.skidl package","skidl.tools.skidl.skidl module","skidl.tools.spice package","skidl.tools.spice.spice module","skidl.utilities module"],titleterms:{alia:5,bu:6,circuit:7,common:8,config:9,constant:43,content:0,convert_lib:14,debug_draw:30,descript:2,eeschema_v5:44,erc:10,gen_schemat:31,geometri:32,group:11,indic:0,instal:2,interfac:12,kicad:[42,43,44,45,46,47],lib:[13,14],licens:1,logger:15,modul:[5,6,7,8,9,10,11,12,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,30,31,32,33,34,35,36,38,39,40,43,44,45,46,47,49,51,52],namespac:37,net:16,netclass:17,netlist_to_skidl:18,netlist_to_skidl_main:38,netpinlist:19,network:20,note:21,packag:[4,13,22,29,41,42,48,50],part:23,part_queri:24,pckg_info:25,pin:26,place:33,protonet:27,pyspic:28,rout:34,schemat:[29,30,31,32,33,34],schlib:35,script:[37,38],scriptinfo:36,skidl:[0,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52],skidlbaseobj:40,spice:[50,51],submodul:[4,13,29,37,42,48,50],subpackag:[4,41],tabl:0,tool:[41,42,43,44,45,46,47,48,49,50,51],usag:2,util:52,v5:46,v6:47}}) \ No newline at end of file diff --git a/docs/archives.html b/docs/archives.html index 271c97b7..0fb499b3 100644 --- a/docs/archives.html +++ b/docs/archives.html @@ -4,7 +4,7 @@ SKiDL — Archives - + @@ -14,15 +14,15 @@ --> - + href="/" /> +
        @@ -50,47 +50,47 @@

        Archives for SKiDL

        Fri 22 October 2021
        -
        New 1.1.0 Release
        +
        New 1.1.0 Release
        Sun 09 May 2021
        -
        1.0
        +
        1.0
        Fri 29 May 2020
        -
        Customized ERC!
        +
        Customized ERC!
        Wed 27 May 2020
        -
        Good Things Come In Packages!
        +
        Good Things Come In Packages!
        Wed 20 May 2020
        -
        New SKiDL Forum!
        +
        New SKiDL Forum!
        Sat 16 May 2020
        -
        Version 0.0.30 Released!
        +
        Version 0.0.30 Released!
        Thu 30 January 2020
        -
        xspice capability
        +
        xspice capability
        Tue 17 December 2019
        -
        Version 0.0.28 Released!
        +
        Version 0.0.28 Released!
        Mon 16 December 2019
        -
        Version 0.0.27 Released!
        +
        Version 0.0.27 Released!
        Mon 30 September 2019
        -
        The Worst Part of SKiDL
        +
        The Worst Part of SKiDL
        Wed 12 June 2019
        -
        SKiDL at KiCon 2019
        +
        SKiDL at KiCon 2019
        Mon 03 September 2018
        -
        Sweetening SKiDL
        +
        Sweetening SKiDL
        Sun 29 July 2018
        -
        Others Use It, Too!
        +
        Others Use It, Too!
        Tue 15 May 2018
        -
        Reusability Ain't What It Used To Be
        +
        Reusability Ain't What It Used To Be
        Wed 07 February 2018
        -
        Spice Simulation
        +
        Spice Simulation
        Sat 01 April 2017
        -
        An Arduino With SKiDL
        +
        An Arduino With SKiDL
        Thu 02 March 2017
        -
        Two Easy Pieces
        +
        Two Easy Pieces
        Fri 17 February 2017
        -
        Don't Replicate, Automate!
        +
        Don't Replicate, Automate!
        Fri 03 February 2017
        -
        A Taste of Hierarchy
        +
        A Taste of Hierarchy
        Wed 25 January 2017
        -
        Names, Not Numbers
        +
        Names, Not Numbers
        Thu 19 January 2017
        -
        Building a USB-to-JTAG Interface Using SKiDL
        +
        Building a USB-to-JTAG Interface Using SKiDL
        diff --git a/docs/author/dave-vandenbout.html b/docs/author/dave-vandenbout.html index c942e5dd..01132bad 100644 --- a/docs/author/dave-vandenbout.html +++ b/docs/author/dave-vandenbout.html @@ -4,7 +4,7 @@ SKiDL — Articles by Dave Vandenbout - + @@ -14,15 +14,15 @@ --> - + href="/" /> +
      @@ -45,13 +45,13 @@

      Posted by Dave Vandenbout

      - New 1.1.0 Release + New 1.1.0 Release

      It's been nearly half a year since the big 1.0 release. @@ -63,13 +63,13 @@

      - 1.0 + 1.0

      Nearly a year after 0.0.30, today marks the release of SKiDL version 1.0.0. @@ -82,13 +82,13 @@

      - Customized ERC! + Customized ERC!

      Everybody wants ERC. Everybody hates ERC.

      @@ -101,13 +101,13 @@

      - Good Things Come In Packages! + Good Things Come In Packages!

      Up to now, SKiDL supported hierarchy by applying the @subcircuit decorator to a Python function:

      @@ -123,13 +123,13 @@

      - New SKiDL Forum! + New SKiDL Forum!

      FYI: The forum has moved.

      @@ -142,13 +142,13 @@

      - Version 0.0.30 Released! + Version 0.0.30 Released!

      I'm releasing version 0.0.30 of SKiDL today! @@ -162,13 +162,13 @@

      - xspice capability + xspice capability

      Somebody asked about using XSPICE components in SPICE simulations with SKiDL. @@ -178,13 +178,13 @@

      - Version 0.0.28 Released! + Version 0.0.28 Released!

      Well, that didn't last long.

      @@ -198,13 +198,13 @@

      - Version 0.0.27 Released! + Version 0.0.27 Released!

      It's been almost eleven months since I released a new version of SKiDL @@ -217,13 +217,13 @@

      - The Worst Part of SKiDL + The Worst Part of SKiDL

      I created SKiDL to replace the manual tedium of drawing schematics with the @@ -236,7 +236,7 @@

      diff --git a/docs/author/dave-vandenbout2.html b/docs/author/dave-vandenbout2.html index ebe5277d..8e6ea097 100644 --- a/docs/author/dave-vandenbout2.html +++ b/docs/author/dave-vandenbout2.html @@ -4,7 +4,7 @@ SKiDL — Articles by Dave Vandenbout - + @@ -14,15 +14,15 @@ --> - + href="/" /> +
    @@ -45,13 +45,13 @@

    Posted by Dave Vandenbout

    - SKiDL at KiCon 2019 + SKiDL at KiCon 2019

    At the recent KiCon 2019, I gave a talk @@ -63,13 +63,13 @@

    - Sweetening SKiDL + Sweetening SKiDL

    I've added a bit of syntactic sugar to SKiDL over the past few months:

    @@ -85,13 +85,13 @@

    Series, Parallel, and Tee

    - Others Use It, Too! + Others Use It, Too!

    It helps when other people use SKiDL; then I can coast by just showing what they've done. @@ -105,13 +105,13 @@

    Blinkenface

    - Reusability Ain't What It Used To Be + Reusability Ain't What It Used To Be

    Sometimes you need a quick circuit that does one, specific thing. @@ -123,13 +123,13 @@

    Four LEDs

    - Spice Simulation + Spice Simulation

    I've added the capability to do SPICE simulations of circuits designed with SKiDL. @@ -139,13 +139,13 @@

    - An Arduino With SKiDL + An Arduino With SKiDL

    It's April 1st. It's also Arduino Day. Really. That's not a joke.

    @@ -158,13 +158,13 @@

    - Two Easy Pieces + Two Easy Pieces

    I really wanted to call this post Five Easy Pieces, but I'm not @@ -179,13 +179,13 @@

    LED Clock

    - Don't Replicate, Automate! + Don't Replicate, Automate!

    I used to work during summers for a bricklayer. @@ -197,13 +197,13 @@

    - A Taste of Hierarchy + A Taste of Hierarchy

    In my previous blog posts, the SKiDL circuit descriptions were flat. @@ -214,16 +214,16 @@

    - Names, Not Numbers + Names, Not Numbers

    -

    In my previous post, +

    In my previous post, I showed how to use SKiDL to describe the circuit for a simple USB-to-JTAG interface circuit. That circuit used a PIC32MX microcontroller in a 28-pin SSOP package:

    @@ -238,10 +238,10 @@

    diff --git a/docs/author/dave-vandenbout3.html b/docs/author/dave-vandenbout3.html index 0e90231a..680899a7 100644 --- a/docs/author/dave-vandenbout3.html +++ b/docs/author/dave-vandenbout3.html @@ -4,7 +4,7 @@ SKiDL — Articles by Dave Vandenbout - + @@ -14,15 +14,15 @@ --> - + href="/" /> +
    @@ -45,13 +45,13 @@

    Posted by Dave Vandenbout

    - Building a USB-to-JTAG Interface Using SKiDL + Building a USB-to-JTAG Interface Using SKiDL

    This post describes using SKiDL for a USB-to-JTAG interface @@ -67,7 +67,7 @@

    diff --git a/docs/authors.html b/docs/authors.html index 9fc8347b..233df34d 100644 --- a/docs/authors.html +++ b/docs/authors.html @@ -4,7 +4,7 @@ SKiDL - Authors - + @@ -14,15 +14,15 @@ --> - + href="/" /> +
    @@ -44,7 +44,7 @@

    Authors on SKiDL

    diff --git a/docs/building-a-usb-to-jtag-interface-using-skidl-2017-01-19.html b/docs/building-a-usb-to-jtag-interface-using-skidl-2017-01-19.html index c46b9c5a..3e13ecee 100644 --- a/docs/building-a-usb-to-jtag-interface-using-skidl-2017-01-19.html +++ b/docs/building-a-usb-to-jtag-interface-using-skidl-2017-01-19.html @@ -4,7 +4,7 @@ SKiDL — Building a USB-to-JTAG Interface Using SKiDL - + @@ -14,15 +14,15 @@ --> - + href="/" /> +
    @@ -45,13 +45,13 @@

    - Building a USB-to-JTAG Interface Using SKiDL + Building a USB-to-JTAG Interface Using SKiDL

    This post describes using SKiDL for a USB-to-JTAG interface diff --git a/docs/categories.html b/docs/categories.html index 09a7862b..80dcc568 100644 --- a/docs/categories.html +++ b/docs/categories.html @@ -4,7 +4,7 @@ SKiDL — Categories - + @@ -14,15 +14,15 @@ --> - + href="/" /> +

    @@ -46,7 +46,7 @@

    Categories on SKiDL

    diff --git a/docs/category/posts.html b/docs/category/posts.html index 503c5396..026696d2 100644 --- a/docs/category/posts.html +++ b/docs/category/posts.html @@ -4,7 +4,7 @@ SKiDL — Articles in Category posts - + @@ -14,15 +14,15 @@ --> - + href="/" /> +
    @@ -44,13 +44,13 @@

    - New 1.1.0 Release + New 1.1.0 Release

    It's been nearly half a year since the big 1.0 release. @@ -62,13 +62,13 @@

    - 1.0 + 1.0

    Nearly a year after 0.0.30, today marks the release of SKiDL version 1.0.0. @@ -81,13 +81,13 @@

    - Customized ERC! + Customized ERC!

    Everybody wants ERC. Everybody hates ERC.

    @@ -100,13 +100,13 @@

    - Good Things Come In Packages! + Good Things Come In Packages!

    Up to now, SKiDL supported hierarchy by applying the @subcircuit decorator to a Python function:

    @@ -122,13 +122,13 @@

    - New SKiDL Forum! + New SKiDL Forum!

    FYI: The forum has moved.

    @@ -141,13 +141,13 @@

    - Version 0.0.30 Released! + Version 0.0.30 Released!

    I'm releasing version 0.0.30 of SKiDL today! @@ -161,13 +161,13 @@

    - xspice capability + xspice capability

    Somebody asked about using XSPICE components in SPICE simulations with SKiDL. @@ -177,13 +177,13 @@

    - Version 0.0.28 Released! + Version 0.0.28 Released!

    Well, that didn't last long.

    @@ -197,13 +197,13 @@

    - Version 0.0.27 Released! + Version 0.0.27 Released!

    It's been almost eleven months since I released a new version of SKiDL @@ -216,13 +216,13 @@

    - The Worst Part of SKiDL + The Worst Part of SKiDL

    I created SKiDL to replace the manual tedium of drawing schematics with the @@ -235,7 +235,7 @@

    diff --git a/docs/category/posts2.html b/docs/category/posts2.html index 414a9a41..ac13c01a 100644 --- a/docs/category/posts2.html +++ b/docs/category/posts2.html @@ -4,7 +4,7 @@ SKiDL — Articles in Category posts - + @@ -14,15 +14,15 @@ --> - + href="/" /> +
    @@ -44,13 +44,13 @@

    - SKiDL at KiCon 2019 + SKiDL at KiCon 2019

    At the recent KiCon 2019, I gave a talk @@ -62,13 +62,13 @@

    - Sweetening SKiDL + Sweetening SKiDL

    I've added a bit of syntactic sugar to SKiDL over the past few months:

    @@ -84,13 +84,13 @@

    Series, Parallel, and Tee

    - Others Use It, Too! + Others Use It, Too!

    It helps when other people use SKiDL; then I can coast by just showing what they've done. @@ -104,13 +104,13 @@

    Blinkenface

    - Reusability Ain't What It Used To Be + Reusability Ain't What It Used To Be

    Sometimes you need a quick circuit that does one, specific thing. @@ -122,13 +122,13 @@

    Four LEDs

    - Spice Simulation + Spice Simulation

    I've added the capability to do SPICE simulations of circuits designed with SKiDL. @@ -138,13 +138,13 @@

    - An Arduino With SKiDL + An Arduino With SKiDL

    It's April 1st. It's also Arduino Day. Really. That's not a joke.

    @@ -157,13 +157,13 @@

    - Two Easy Pieces + Two Easy Pieces

    I really wanted to call this post Five Easy Pieces, but I'm not @@ -178,13 +178,13 @@

    LED Clock

    - Don't Replicate, Automate! + Don't Replicate, Automate!

    I used to work during summers for a bricklayer. @@ -196,13 +196,13 @@

    - A Taste of Hierarchy + A Taste of Hierarchy

    In my previous blog posts, the SKiDL circuit descriptions were flat. @@ -213,16 +213,16 @@

    - Names, Not Numbers + Names, Not Numbers

    -

    In my previous post, +

    In my previous post, I showed how to use SKiDL to describe the circuit for a simple USB-to-JTAG interface circuit. That circuit used a PIC32MX microcontroller in a 28-pin SSOP package:

    @@ -237,10 +237,10 @@

    diff --git a/docs/category/posts3.html b/docs/category/posts3.html index 6e37f472..8e33db8b 100644 --- a/docs/category/posts3.html +++ b/docs/category/posts3.html @@ -4,7 +4,7 @@ SKiDL — Articles in Category posts - + @@ -14,15 +14,15 @@ --> - + href="/" /> +
    @@ -44,13 +44,13 @@

    - Building a USB-to-JTAG Interface Using SKiDL + Building a USB-to-JTAG Interface Using SKiDL

    This post describes using SKiDL for a USB-to-JTAG interface @@ -66,7 +66,7 @@

    diff --git a/docs/customized-erc-2020-05-29.html b/docs/customized-erc-2020-05-29.html index 029d4b27..924b80f2 100644 --- a/docs/customized-erc-2020-05-29.html +++ b/docs/customized-erc-2020-05-29.html @@ -4,7 +4,7 @@ SKiDL — Customized ERC! - + @@ -14,15 +14,15 @@ --> - + href="/" /> +
    @@ -45,13 +45,13 @@

    - Customized ERC! + Customized ERC!

    Everybody wants ERC. Everybody hates ERC.

    @@ -136,7 +136,7 @@

    # Drop into the debugger so you can query the circuit # and then continue. - breakpoint() + breakpoint() return False # Return False to trigger the erc_assert(). @@ -156,14 +156,14 @@

    ERC()

    -
    IN2 fanout of 5 >= 5.
    -> <ipython-input-18-800a83e11624>(22)check_fanout()
    --> return False  # Return False to trigger the erc_assert().
    -(Pdb) c
    -ERC ERROR: check_fanout(net2, 5) FAILED in <ipython-input-18-800a83e11624>:30:<module>.
    +
    IN2 fanout of 5 >= 5.
    +> <ipython-input-18-800a83e11624>(22)check_fanout()
    +-> return False  # Return False to trigger the erc_assert().
    +(Pdb) c
    +ERC ERROR: check_fanout(net2, 5) FAILED in <ipython-input-18-800a83e11624>:30:<module>.
     
    -0 warnings found during ERC.
    -1 errors found during ERC.
    +0 warnings found during ERC.
    +1 errors found during ERC.
     

    You can detect if a subcircuit is being used correctly by embedding calls to diff --git a/docs/dont-replicate-automate-2017-02-17.html b/docs/dont-replicate-automate-2017-02-17.html index 8d100fff..e6b63f7a 100644 --- a/docs/dont-replicate-automate-2017-02-17.html +++ b/docs/dont-replicate-automate-2017-02-17.html @@ -4,7 +4,7 @@ SKiDL — Don't Replicate, Automate! - + @@ -14,15 +14,15 @@ --> - + href="/" /> +

    @@ -45,13 +45,13 @@

    - Don't Replicate, Automate! + Don't Replicate, Automate!

    I used to work during summers for a bricklayer. @@ -59,19 +59,19 @@

    Some people think bricklaying would be a great job, kind of like playing Tetris all day, except with real blocks. But here's what the real reality is:

    -
    Pick up brick, apply mortar, place, tap down, remove excess mortar.
    +
    Pick up brick, apply mortar, place, tap down, remove excess mortar.
     
    -Pick up brick, apply mortar, place, tap down, remove excess mortar.
    +Pick up brick, apply mortar, place, tap down, remove excess mortar.
     
    -Pick up brick, apply mortar, place, tap down, remove excess mortar.
    +Pick up brick, apply mortar, place, tap down, remove excess mortar.
     
    -Row after row.
    +Row after row.
     
    -Wall after wall.
    +Wall after wall.
     
    -Job after job.
    +Job after job.
     
    -Until you die. Of the heat.
    +Until you die. Of the heat.
     

    One day, I graduated and went to work as an electrical engineer. @@ -88,19 +88,19 @@

    relatively small chip with around a dozen ground pins:

    Schematic with bypass capacitors.

    And here's the design process:

    -
    Click on capacitor symbol. Drag & drop. Attach power. Attach ground.
    +
    Click on capacitor symbol. Drag & drop. Attach power. Attach ground.
     
    -Click on capacitor symbol. Drag & drop. Attach power. Attach ground.
    +Click on capacitor symbol. Drag & drop. Attach power. Attach ground.
     
    -Click on capacitor symbol. Drag & drop. Attach power. Attach ground.
    +Click on capacitor symbol. Drag & drop. Attach power. Attach ground.
     
    -Part after part.
    +Part after part.
     
    -Page after page.
    +Page after page.
     
    -Design after design.
    +Design after design.
     
    -Until you die. Of boredom.
    +Until you die. Of boredom.
     

    As I discovered with bricklaying, that's no way to live. diff --git a/docs/drafts/test-draft.html b/docs/drafts/test-draft.html index c6e8ad8e..941f8d18 100644 --- a/docs/drafts/test-draft.html +++ b/docs/drafts/test-draft.html @@ -4,7 +4,7 @@ SKiDL — Test Draft - + @@ -14,15 +14,15 @@ --> - + href="/" /> +

    @@ -45,19 +45,19 @@

    - Test Draft + Test Draft

    This draft is not listed on the index page.

    Tagged - , + ,

    diff --git a/docs/feeds/all.atom.xml b/docs/feeds/all.atom.xml index 2e64ec74..a01c4c24 100644 --- a/docs/feeds/all.atom.xml +++ b/docs/feeds/all.atom.xml @@ -124,7 +124,7 @@ to it in the assertion string:</p> <span class="c1"># Drop into the debugger so you can query the circuit</span> <span class="c1"># and then continue.</span> - <span class="n">breakpoint</span><span class="p">()</span> + <span class="nb">breakpoint</span><span class="p">()</span> <span class="k">return</span> <span class="kc">False</span> <span class="c1"># Return False to trigger the erc_assert().</span> @@ -144,14 +144,14 @@ to it in the assertion string:</p> <span class="n">ERC</span><span class="p">()</span> </code></pre></div> -<div class="highlight"><pre><span></span><code><span class="n">IN2</span> <span class="n">fanout</span> <span class="kr">of</span> <span class="mi">5</span> <span class="o">&gt;=</span> <span class="mf">5.</span> -<span class="o">&gt;</span> <span class="o">&lt;</span><span class="n">ipython</span><span class="o">-</span><span class="n">input</span><span class="o">-</span><span class="mi">18</span><span class="o">-</span><span class="mi">800</span><span class="n">a83e11624</span><span class="o">&gt;</span><span class="p">(</span><span class="mi">22</span><span class="p">)</span><span class="n">check_fanout</span><span class="p">()</span> -<span class="o">-&gt;</span> <span class="kr">return</span> <span class="kr">False</span> <span class="err">#</span> <span class="kr">Return</span> <span class="kr">False</span> <span class="n">to</span> <span class="n">trigger</span> <span class="n">the</span> <span class="n">erc_assert</span><span class="p">().</span> -<span class="p">(</span><span class="n">Pdb</span><span class="p">)</span> <span class="n">c</span> -<span class="n">ERC</span> <span class="nf">ERROR</span><span class="o">:</span> <span class="n">check_fanout</span><span class="p">(</span><span class="n">net2</span><span class="p">,</span> <span class="mi">5</span><span class="p">)</span> <span class="n">FAILED</span> <span class="kr">in</span> <span class="o">&lt;</span><span class="n">ipython</span><span class="o">-</span><span class="n">input</span><span class="o">-</span><span class="mi">18</span><span class="o">-</span><span class="mi">800</span><span class="n">a83e11624</span><span class="o">&gt;:</span><span class="mi">30</span><span class="o">:&lt;</span><span class="kr">module</span><span class="o">&gt;</span><span class="p">.</span> +<div class="highlight"><pre><span></span><code><span class="n">IN2</span><span class="w"> </span><span class="n">fanout</span><span class="w"> </span><span class="kr">of</span><span class="w"> </span><span class="mi">5</span><span class="w"> </span><span class="o">&gt;=</span><span class="w"> </span><span class="mf">5.</span><span class="w"></span> +<span class="o">&gt;</span><span class="w"> </span><span class="o">&lt;</span><span class="n">ipython</span><span class="o">-</span><span class="n">input</span><span class="o">-</span><span class="mi">18</span><span class="o">-</span><span class="mi">800</span><span class="n">a83e11624</span><span class="o">&gt;</span><span class="p">(</span><span class="mi">22</span><span class="p">)</span><span class="n">check_fanout</span><span class="p">()</span><span class="w"></span> +<span class="o">-&gt;</span><span class="w"> </span><span class="kr">return</span><span class="w"> </span><span class="kr">False</span><span class="w"> </span><span class="err">#</span><span class="w"> </span><span class="kr">Return</span><span class="w"> </span><span class="kr">False</span><span class="w"> </span><span class="n">to</span><span class="w"> </span><span class="n">trigger</span><span class="w"> </span><span class="n">the</span><span class="w"> </span><span class="n">erc_assert</span><span class="p">().</span><span class="w"></span> +<span class="p">(</span><span class="n">Pdb</span><span class="p">)</span><span class="w"> </span><span class="n">c</span><span class="w"></span> +<span class="n">ERC</span><span class="w"> </span><span class="nf">ERROR</span><span class="o">:</span><span class="w"> </span><span class="n">check_fanout</span><span class="p">(</span><span class="n">net2</span><span class="p">,</span><span class="w"> </span><span class="mi">5</span><span class="p">)</span><span class="w"> </span><span class="n">FAILED</span><span class="w"> </span><span class="kr">in</span><span class="w"> </span><span class="o">&lt;</span><span class="n">ipython</span><span class="o">-</span><span class="n">input</span><span class="o">-</span><span class="mi">18</span><span class="o">-</span><span class="mi">800</span><span class="n">a83e11624</span><span class="o">&gt;:</span><span class="mi">30</span><span class="o">:&lt;</span><span class="kr">module</span><span class="o">&gt;</span><span class="p">.</span><span class="w"></span> -<span class="mi">0</span> <span class="n">warnings</span> <span class="n">found</span> <span class="n">during</span> <span class="n">ERC</span><span class="p">.</span> -<span class="mi">1</span> <span class="n">errors</span> <span class="n">found</span> <span class="n">during</span> <span class="n">ERC</span><span class="p">.</span> +<span class="mi">0</span><span class="w"> </span><span class="n">warnings</span><span class="w"> </span><span class="n">found</span><span class="w"> </span><span class="n">during</span><span class="w"> </span><span class="n">ERC</span><span class="p">.</span><span class="w"></span> +<span class="mi">1</span><span class="w"> </span><span class="n">errors</span><span class="w"> </span><span class="n">found</span><span class="w"> </span><span class="n">during</span><span class="w"> </span><span class="n">ERC</span><span class="p">.</span><span class="w"></span> </code></pre></div> <p>You can detect if a subcircuit is being used correctly by embedding calls to @@ -1787,19 +1787,19 @@ I learned one thing there: air conditioning is pretty good stuff. (We should do <p>Some people think bricklaying would be a great job, kind of like playing Tetris all day, except with real blocks. But here's what the <em>real</em> reality is:</p> -<div class="highlight"><pre><span></span><code><span class="nv">Pick</span> <span class="nv">up</span> <span class="nv">brick</span>, <span class="nv">apply</span> <span class="nv">mortar</span>, <span class="nv">place</span>, <span class="nv">tap</span> <span class="nv">down</span>, <span class="nv">remove</span> <span class="nv">excess</span> <span class="nv">mortar</span>. +<div class="highlight"><pre><span></span><code><span class="nv">Pick</span><span class="w"> </span><span class="nv">up</span><span class="w"> </span><span class="nv">brick</span>,<span class="w"> </span><span class="nv">apply</span><span class="w"> </span><span class="nv">mortar</span>,<span class="w"> </span><span class="nv">place</span>,<span class="w"> </span><span class="nv">tap</span><span class="w"> </span><span class="nv">down</span>,<span class="w"> </span><span class="nv">remove</span><span class="w"> </span><span class="nv">excess</span><span class="w"> </span><span class="nv">mortar</span>.<span class="w"></span> -<span class="nv">Pick</span> <span class="nv">up</span> <span class="nv">brick</span>, <span class="nv">apply</span> <span class="nv">mortar</span>, <span class="nv">place</span>, <span class="nv">tap</span> <span class="nv">down</span>, <span class="nv">remove</span> <span class="nv">excess</span> <span class="nv">mortar</span>. +<span class="nv">Pick</span><span class="w"> </span><span class="nv">up</span><span class="w"> </span><span class="nv">brick</span>,<span class="w"> </span><span class="nv">apply</span><span class="w"> </span><span class="nv">mortar</span>,<span class="w"> </span><span class="nv">place</span>,<span class="w"> </span><span class="nv">tap</span><span class="w"> </span><span class="nv">down</span>,<span class="w"> </span><span class="nv">remove</span><span class="w"> </span><span class="nv">excess</span><span class="w"> </span><span class="nv">mortar</span>.<span class="w"></span> -<span class="nv">Pick</span> <span class="nv">up</span> <span class="nv">brick</span>, <span class="nv">apply</span> <span class="nv">mortar</span>, <span class="nv">place</span>, <span class="nv">tap</span> <span class="nv">down</span>, <span class="nv">remove</span> <span class="nv">excess</span> <span class="nv">mortar</span>. +<span class="nv">Pick</span><span class="w"> </span><span class="nv">up</span><span class="w"> </span><span class="nv">brick</span>,<span class="w"> </span><span class="nv">apply</span><span class="w"> </span><span class="nv">mortar</span>,<span class="w"> </span><span class="nv">place</span>,<span class="w"> </span><span class="nv">tap</span><span class="w"> </span><span class="nv">down</span>,<span class="w"> </span><span class="nv">remove</span><span class="w"> </span><span class="nv">excess</span><span class="w"> </span><span class="nv">mortar</span>.<span class="w"></span> -<span class="nv">Row</span> <span class="nv">after</span> <span class="nv">row</span>. +<span class="nv">Row</span><span class="w"> </span><span class="nv">after</span><span class="w"> </span><span class="nv">row</span>.<span class="w"></span> -<span class="nv">Wall</span> <span class="nv">after</span> <span class="nv">wall</span>. +<span class="nv">Wall</span><span class="w"> </span><span class="nv">after</span><span class="w"> </span><span class="nv">wall</span>.<span class="w"></span> -<span class="nv">Job</span> <span class="nv">after</span> <span class="nv">job</span>. +<span class="nv">Job</span><span class="w"> </span><span class="nv">after</span><span class="w"> </span><span class="nv">job</span>.<span class="w"></span> -<span class="k">Until</span> <span class="nv">you</span> <span class="nv">die</span>. <span class="nv">Of</span> <span class="nv">the</span> <span class="nv">heat</span>. +<span class="k">Until</span><span class="w"> </span><span class="nv">you</span><span class="w"> </span><span class="nv">die</span>.<span class="w"> </span><span class="nv">Of</span><span class="w"> </span><span class="nv">the</span><span class="w"> </span><span class="nv">heat</span>.<span class="w"></span> </code></pre></div> <p>One day, I graduated and went to work as an electrical engineer. @@ -1816,19 +1816,19 @@ Here's a section of a schematic showing just the bypass caps for a relatively small chip with around a dozen ground pins:</p> <p><img alt="Schematic with bypass capacitors." src="images/dont-replicate-automate/bypass-caps.png"></p> <p>And here's the design process:</p> -<div class="highlight"><pre><span></span><code><span class="nv">Click</span> <span class="nv">on</span> <span class="nv">capacitor</span> <span class="nv">symbol</span>. <span class="nv">Drag</span> <span class="o">&amp;</span> <span class="nv">drop</span>. <span class="nv">Attach</span> <span class="nv">power</span>. <span class="nv">Attach</span> <span class="nv">ground</span>. +<div class="highlight"><pre><span></span><code><span class="nv">Click</span><span class="w"> </span><span class="nv">on</span><span class="w"> </span><span class="nv">capacitor</span><span class="w"> </span><span class="nv">symbol</span>.<span class="w"> </span><span class="nv">Drag</span><span class="w"> </span><span class="o">&amp;</span><span class="w"> </span><span class="nv">drop</span>.<span class="w"> </span><span class="nv">Attach</span><span class="w"> </span><span class="nv">power</span>.<span class="w"> </span><span class="nv">Attach</span><span class="w"> </span><span class="nv">ground</span>.<span class="w"></span> -<span class="nv">Click</span> <span class="nv">on</span> <span class="nv">capacitor</span> <span class="nv">symbol</span>. <span class="nv">Drag</span> <span class="o">&amp;</span> <span class="nv">drop</span>. <span class="nv">Attach</span> <span class="nv">power</span>. <span class="nv">Attach</span> <span class="nv">ground</span>. +<span class="nv">Click</span><span class="w"> </span><span class="nv">on</span><span class="w"> </span><span class="nv">capacitor</span><span class="w"> </span><span class="nv">symbol</span>.<span class="w"> </span><span class="nv">Drag</span><span class="w"> </span><span class="o">&amp;</span><span class="w"> </span><span class="nv">drop</span>.<span class="w"> </span><span class="nv">Attach</span><span class="w"> </span><span class="nv">power</span>.<span class="w"> </span><span class="nv">Attach</span><span class="w"> </span><span class="nv">ground</span>.<span class="w"></span> -<span class="nv">Click</span> <span class="nv">on</span> <span class="nv">capacitor</span> <span class="nv">symbol</span>. <span class="nv">Drag</span> <span class="o">&amp;</span> <span class="nv">drop</span>. <span class="nv">Attach</span> <span class="nv">power</span>. <span class="nv">Attach</span> <span class="nv">ground</span>. +<span class="nv">Click</span><span class="w"> </span><span class="nv">on</span><span class="w"> </span><span class="nv">capacitor</span><span class="w"> </span><span class="nv">symbol</span>.<span class="w"> </span><span class="nv">Drag</span><span class="w"> </span><span class="o">&amp;</span><span class="w"> </span><span class="nv">drop</span>.<span class="w"> </span><span class="nv">Attach</span><span class="w"> </span><span class="nv">power</span>.<span class="w"> </span><span class="nv">Attach</span><span class="w"> </span><span class="nv">ground</span>.<span class="w"></span> -<span class="nv">Part</span> <span class="nv">after</span> <span class="nv">part</span>. +<span class="nv">Part</span><span class="w"> </span><span class="nv">after</span><span class="w"> </span><span class="nv">part</span>.<span class="w"></span> -<span class="nv">Page</span> <span class="nv">after</span> <span class="nv">page</span>. +<span class="nv">Page</span><span class="w"> </span><span class="nv">after</span><span class="w"> </span><span class="nv">page</span>.<span class="w"></span> -<span class="nv">Design</span> <span class="nv">after</span> <span class="nv">design</span>. +<span class="nv">Design</span><span class="w"> </span><span class="nv">after</span><span class="w"> </span><span class="nv">design</span>.<span class="w"></span> -<span class="k">Until</span> <span class="nv">you</span> <span class="nv">die</span>. <span class="nv">Of</span> <span class="nv">boredom</span>. +<span class="k">Until</span><span class="w"> </span><span class="nv">you</span><span class="w"> </span><span class="nv">die</span>.<span class="w"> </span><span class="nv">Of</span><span class="w"> </span><span class="nv">boredom</span>.<span class="w"></span> </code></pre></div> <p>As I discovered with bricklaying, that's no way to live. diff --git a/docs/feeds/posts.atom.xml b/docs/feeds/posts.atom.xml index 70877498..de1900a7 100644 --- a/docs/feeds/posts.atom.xml +++ b/docs/feeds/posts.atom.xml @@ -124,7 +124,7 @@ to it in the assertion string:</p> <span class="c1"># Drop into the debugger so you can query the circuit</span> <span class="c1"># and then continue.</span> - <span class="n">breakpoint</span><span class="p">()</span> + <span class="nb">breakpoint</span><span class="p">()</span> <span class="k">return</span> <span class="kc">False</span> <span class="c1"># Return False to trigger the erc_assert().</span> @@ -144,14 +144,14 @@ to it in the assertion string:</p> <span class="n">ERC</span><span class="p">()</span> </code></pre></div> -<div class="highlight"><pre><span></span><code><span class="n">IN2</span> <span class="n">fanout</span> <span class="kr">of</span> <span class="mi">5</span> <span class="o">&gt;=</span> <span class="mf">5.</span> -<span class="o">&gt;</span> <span class="o">&lt;</span><span class="n">ipython</span><span class="o">-</span><span class="n">input</span><span class="o">-</span><span class="mi">18</span><span class="o">-</span><span class="mi">800</span><span class="n">a83e11624</span><span class="o">&gt;</span><span class="p">(</span><span class="mi">22</span><span class="p">)</span><span class="n">check_fanout</span><span class="p">()</span> -<span class="o">-&gt;</span> <span class="kr">return</span> <span class="kr">False</span> <span class="err">#</span> <span class="kr">Return</span> <span class="kr">False</span> <span class="n">to</span> <span class="n">trigger</span> <span class="n">the</span> <span class="n">erc_assert</span><span class="p">().</span> -<span class="p">(</span><span class="n">Pdb</span><span class="p">)</span> <span class="n">c</span> -<span class="n">ERC</span> <span class="nf">ERROR</span><span class="o">:</span> <span class="n">check_fanout</span><span class="p">(</span><span class="n">net2</span><span class="p">,</span> <span class="mi">5</span><span class="p">)</span> <span class="n">FAILED</span> <span class="kr">in</span> <span class="o">&lt;</span><span class="n">ipython</span><span class="o">-</span><span class="n">input</span><span class="o">-</span><span class="mi">18</span><span class="o">-</span><span class="mi">800</span><span class="n">a83e11624</span><span class="o">&gt;:</span><span class="mi">30</span><span class="o">:&lt;</span><span class="kr">module</span><span class="o">&gt;</span><span class="p">.</span> +<div class="highlight"><pre><span></span><code><span class="n">IN2</span><span class="w"> </span><span class="n">fanout</span><span class="w"> </span><span class="kr">of</span><span class="w"> </span><span class="mi">5</span><span class="w"> </span><span class="o">&gt;=</span><span class="w"> </span><span class="mf">5.</span><span class="w"></span> +<span class="o">&gt;</span><span class="w"> </span><span class="o">&lt;</span><span class="n">ipython</span><span class="o">-</span><span class="n">input</span><span class="o">-</span><span class="mi">18</span><span class="o">-</span><span class="mi">800</span><span class="n">a83e11624</span><span class="o">&gt;</span><span class="p">(</span><span class="mi">22</span><span class="p">)</span><span class="n">check_fanout</span><span class="p">()</span><span class="w"></span> +<span class="o">-&gt;</span><span class="w"> </span><span class="kr">return</span><span class="w"> </span><span class="kr">False</span><span class="w"> </span><span class="err">#</span><span class="w"> </span><span class="kr">Return</span><span class="w"> </span><span class="kr">False</span><span class="w"> </span><span class="n">to</span><span class="w"> </span><span class="n">trigger</span><span class="w"> </span><span class="n">the</span><span class="w"> </span><span class="n">erc_assert</span><span class="p">().</span><span class="w"></span> +<span class="p">(</span><span class="n">Pdb</span><span class="p">)</span><span class="w"> </span><span class="n">c</span><span class="w"></span> +<span class="n">ERC</span><span class="w"> </span><span class="nf">ERROR</span><span class="o">:</span><span class="w"> </span><span class="n">check_fanout</span><span class="p">(</span><span class="n">net2</span><span class="p">,</span><span class="w"> </span><span class="mi">5</span><span class="p">)</span><span class="w"> </span><span class="n">FAILED</span><span class="w"> </span><span class="kr">in</span><span class="w"> </span><span class="o">&lt;</span><span class="n">ipython</span><span class="o">-</span><span class="n">input</span><span class="o">-</span><span class="mi">18</span><span class="o">-</span><span class="mi">800</span><span class="n">a83e11624</span><span class="o">&gt;:</span><span class="mi">30</span><span class="o">:&lt;</span><span class="kr">module</span><span class="o">&gt;</span><span class="p">.</span><span class="w"></span> -<span class="mi">0</span> <span class="n">warnings</span> <span class="n">found</span> <span class="n">during</span> <span class="n">ERC</span><span class="p">.</span> -<span class="mi">1</span> <span class="n">errors</span> <span class="n">found</span> <span class="n">during</span> <span class="n">ERC</span><span class="p">.</span> +<span class="mi">0</span><span class="w"> </span><span class="n">warnings</span><span class="w"> </span><span class="n">found</span><span class="w"> </span><span class="n">during</span><span class="w"> </span><span class="n">ERC</span><span class="p">.</span><span class="w"></span> +<span class="mi">1</span><span class="w"> </span><span class="n">errors</span><span class="w"> </span><span class="n">found</span><span class="w"> </span><span class="n">during</span><span class="w"> </span><span class="n">ERC</span><span class="p">.</span><span class="w"></span> </code></pre></div> <p>You can detect if a subcircuit is being used correctly by embedding calls to @@ -1787,19 +1787,19 @@ I learned one thing there: air conditioning is pretty good stuff. (We should do <p>Some people think bricklaying would be a great job, kind of like playing Tetris all day, except with real blocks. But here's what the <em>real</em> reality is:</p> -<div class="highlight"><pre><span></span><code><span class="nv">Pick</span> <span class="nv">up</span> <span class="nv">brick</span>, <span class="nv">apply</span> <span class="nv">mortar</span>, <span class="nv">place</span>, <span class="nv">tap</span> <span class="nv">down</span>, <span class="nv">remove</span> <span class="nv">excess</span> <span class="nv">mortar</span>. +<div class="highlight"><pre><span></span><code><span class="nv">Pick</span><span class="w"> </span><span class="nv">up</span><span class="w"> </span><span class="nv">brick</span>,<span class="w"> </span><span class="nv">apply</span><span class="w"> </span><span class="nv">mortar</span>,<span class="w"> </span><span class="nv">place</span>,<span class="w"> </span><span class="nv">tap</span><span class="w"> </span><span class="nv">down</span>,<span class="w"> </span><span class="nv">remove</span><span class="w"> </span><span class="nv">excess</span><span class="w"> </span><span class="nv">mortar</span>.<span class="w"></span> -<span class="nv">Pick</span> <span class="nv">up</span> <span class="nv">brick</span>, <span class="nv">apply</span> <span class="nv">mortar</span>, <span class="nv">place</span>, <span class="nv">tap</span> <span class="nv">down</span>, <span class="nv">remove</span> <span class="nv">excess</span> <span class="nv">mortar</span>. +<span class="nv">Pick</span><span class="w"> </span><span class="nv">up</span><span class="w"> </span><span class="nv">brick</span>,<span class="w"> </span><span class="nv">apply</span><span class="w"> </span><span class="nv">mortar</span>,<span class="w"> </span><span class="nv">place</span>,<span class="w"> </span><span class="nv">tap</span><span class="w"> </span><span class="nv">down</span>,<span class="w"> </span><span class="nv">remove</span><span class="w"> </span><span class="nv">excess</span><span class="w"> </span><span class="nv">mortar</span>.<span class="w"></span> -<span class="nv">Pick</span> <span class="nv">up</span> <span class="nv">brick</span>, <span class="nv">apply</span> <span class="nv">mortar</span>, <span class="nv">place</span>, <span class="nv">tap</span> <span class="nv">down</span>, <span class="nv">remove</span> <span class="nv">excess</span> <span class="nv">mortar</span>. +<span class="nv">Pick</span><span class="w"> </span><span class="nv">up</span><span class="w"> </span><span class="nv">brick</span>,<span class="w"> </span><span class="nv">apply</span><span class="w"> </span><span class="nv">mortar</span>,<span class="w"> </span><span class="nv">place</span>,<span class="w"> </span><span class="nv">tap</span><span class="w"> </span><span class="nv">down</span>,<span class="w"> </span><span class="nv">remove</span><span class="w"> </span><span class="nv">excess</span><span class="w"> </span><span class="nv">mortar</span>.<span class="w"></span> -<span class="nv">Row</span> <span class="nv">after</span> <span class="nv">row</span>. +<span class="nv">Row</span><span class="w"> </span><span class="nv">after</span><span class="w"> </span><span class="nv">row</span>.<span class="w"></span> -<span class="nv">Wall</span> <span class="nv">after</span> <span class="nv">wall</span>. +<span class="nv">Wall</span><span class="w"> </span><span class="nv">after</span><span class="w"> </span><span class="nv">wall</span>.<span class="w"></span> -<span class="nv">Job</span> <span class="nv">after</span> <span class="nv">job</span>. +<span class="nv">Job</span><span class="w"> </span><span class="nv">after</span><span class="w"> </span><span class="nv">job</span>.<span class="w"></span> -<span class="k">Until</span> <span class="nv">you</span> <span class="nv">die</span>. <span class="nv">Of</span> <span class="nv">the</span> <span class="nv">heat</span>. +<span class="k">Until</span><span class="w"> </span><span class="nv">you</span><span class="w"> </span><span class="nv">die</span>.<span class="w"> </span><span class="nv">Of</span><span class="w"> </span><span class="nv">the</span><span class="w"> </span><span class="nv">heat</span>.<span class="w"></span> </code></pre></div> <p>One day, I graduated and went to work as an electrical engineer. @@ -1816,19 +1816,19 @@ Here's a section of a schematic showing just the bypass caps for a relatively small chip with around a dozen ground pins:</p> <p><img alt="Schematic with bypass capacitors." src="images/dont-replicate-automate/bypass-caps.png"></p> <p>And here's the design process:</p> -<div class="highlight"><pre><span></span><code><span class="nv">Click</span> <span class="nv">on</span> <span class="nv">capacitor</span> <span class="nv">symbol</span>. <span class="nv">Drag</span> <span class="o">&amp;</span> <span class="nv">drop</span>. <span class="nv">Attach</span> <span class="nv">power</span>. <span class="nv">Attach</span> <span class="nv">ground</span>. +<div class="highlight"><pre><span></span><code><span class="nv">Click</span><span class="w"> </span><span class="nv">on</span><span class="w"> </span><span class="nv">capacitor</span><span class="w"> </span><span class="nv">symbol</span>.<span class="w"> </span><span class="nv">Drag</span><span class="w"> </span><span class="o">&amp;</span><span class="w"> </span><span class="nv">drop</span>.<span class="w"> </span><span class="nv">Attach</span><span class="w"> </span><span class="nv">power</span>.<span class="w"> </span><span class="nv">Attach</span><span class="w"> </span><span class="nv">ground</span>.<span class="w"></span> -<span class="nv">Click</span> <span class="nv">on</span> <span class="nv">capacitor</span> <span class="nv">symbol</span>. <span class="nv">Drag</span> <span class="o">&amp;</span> <span class="nv">drop</span>. <span class="nv">Attach</span> <span class="nv">power</span>. <span class="nv">Attach</span> <span class="nv">ground</span>. +<span class="nv">Click</span><span class="w"> </span><span class="nv">on</span><span class="w"> </span><span class="nv">capacitor</span><span class="w"> </span><span class="nv">symbol</span>.<span class="w"> </span><span class="nv">Drag</span><span class="w"> </span><span class="o">&amp;</span><span class="w"> </span><span class="nv">drop</span>.<span class="w"> </span><span class="nv">Attach</span><span class="w"> </span><span class="nv">power</span>.<span class="w"> </span><span class="nv">Attach</span><span class="w"> </span><span class="nv">ground</span>.<span class="w"></span> -<span class="nv">Click</span> <span class="nv">on</span> <span class="nv">capacitor</span> <span class="nv">symbol</span>. <span class="nv">Drag</span> <span class="o">&amp;</span> <span class="nv">drop</span>. <span class="nv">Attach</span> <span class="nv">power</span>. <span class="nv">Attach</span> <span class="nv">ground</span>. +<span class="nv">Click</span><span class="w"> </span><span class="nv">on</span><span class="w"> </span><span class="nv">capacitor</span><span class="w"> </span><span class="nv">symbol</span>.<span class="w"> </span><span class="nv">Drag</span><span class="w"> </span><span class="o">&amp;</span><span class="w"> </span><span class="nv">drop</span>.<span class="w"> </span><span class="nv">Attach</span><span class="w"> </span><span class="nv">power</span>.<span class="w"> </span><span class="nv">Attach</span><span class="w"> </span><span class="nv">ground</span>.<span class="w"></span> -<span class="nv">Part</span> <span class="nv">after</span> <span class="nv">part</span>. +<span class="nv">Part</span><span class="w"> </span><span class="nv">after</span><span class="w"> </span><span class="nv">part</span>.<span class="w"></span> -<span class="nv">Page</span> <span class="nv">after</span> <span class="nv">page</span>. +<span class="nv">Page</span><span class="w"> </span><span class="nv">after</span><span class="w"> </span><span class="nv">page</span>.<span class="w"></span> -<span class="nv">Design</span> <span class="nv">after</span> <span class="nv">design</span>. +<span class="nv">Design</span><span class="w"> </span><span class="nv">after</span><span class="w"> </span><span class="nv">design</span>.<span class="w"></span> -<span class="k">Until</span> <span class="nv">you</span> <span class="nv">die</span>. <span class="nv">Of</span> <span class="nv">boredom</span>. +<span class="k">Until</span><span class="w"> </span><span class="nv">you</span><span class="w"> </span><span class="nv">die</span>.<span class="w"> </span><span class="nv">Of</span><span class="w"> </span><span class="nv">boredom</span>.<span class="w"></span> </code></pre></div> <p>As I discovered with bricklaying, that's no way to live. diff --git a/docs/index.html b/docs/index.html index b14b3875..3cbc54cc 100644 --- a/docs/index.html +++ b/docs/index.html @@ -4,7 +4,7 @@ SKiDL — SKiDL - + @@ -14,15 +14,15 @@ --> - + href="/" /> +
    @@ -44,11 +44,11 @@

    -

    SKiDL

    +

    SKiDL

    TL;DR

    Never use a lousy schematic editor again! @@ -223,14 +223,14 @@

    Installation

    To give SKiDL some part libraries to work with, -you'll also need to install KiCad. +you'll also need to install KiCad. Then, you'll need to set an environment variable so SKiDL can find the libraries. For Windows, do this:

    set KICAD_SYMBOL_DIR=C:\Program Files\KiCad\share\kicad\kicad-symbols
     

    And for linux-type OSes, define the environment variable in your .bashrc like so:

    -
    export KICAD_SYMBOL_DIR="/usr/share/kicad/library"
    +
    export KICAD_SYMBOL_DIR="/usr/share/kicad/library"
     

    These paths are OS-dependent, so launch KiCAD and click Preferences->Configure Paths @@ -327,23 +327,23 @@

    Command-line Searching

    Once you have the part name and library, you can see the part's pin numbers, names and their functions using the show function:

    -
    >>> show('Amplifier_Audio', 'lm386')
    +
    >>> show('Amplifier_Audio', 'lm386')
     
    - LM386 (): Low Voltage Audio Power Amplifier, DIP-8/SOIC-8/SSOP-8
    -    Pin None/1/GAIN/INPUT
    -    Pin None/2/-/INPUT
    -    Pin None/3/+/INPUT
    -    Pin None/4/GND/POWER-IN
    -    Pin None/5/~/OUTPUT
    -    Pin None/6/V+/POWER-IN
    -    Pin None/7/BYPASS/INPUT
    -    Pin None/8/GAIN/INPUT
    + LM386 (): Low Voltage Audio Power Amplifier, DIP-8/SOIC-8/SSOP-8
    +    Pin None/1/GAIN/INPUT
    +    Pin None/2/-/INPUT
    +    Pin None/3/+/INPUT
    +    Pin None/4/GND/POWER-IN
    +    Pin None/5/~/OUTPUT
    +    Pin None/6/V+/POWER-IN
    +    Pin None/7/BYPASS/INPUT
    +    Pin None/8/GAIN/INPUT
     

    show looks for exact matches of the part name in a library, so the following command raises an error:

    -
    >>> show('Amplifier_Audio', 'lm38')
    -ERROR: Unable to find part lm38 in library linear.
    +
    >>> show('Amplifier_Audio', 'lm38')
    +ERROR: Unable to find part lm38 in library linear.
     

    In addition to searching for parts, you can also search for footprints using the @@ -492,8 +492,8 @@

    Checking for Errors

    as a Python script such as my_circuit.py and the ERC() function will dump its messages to my_circuit.erc.) The ERC messages are:

    -
    WARNING: Only one pin (PASSIVE pin 1/~ of R/R1) attached to net VIN.
    -WARNING: Only one pin (PASSIVE pin 1/~ of R/R2) attached to net GND.
    +
    WARNING: Only one pin (PASSIVE pin 1/~ of R/R1) attached to net VIN.
    +WARNING: Only one pin (PASSIVE pin 1/~ of R/R2) attached to net GND.
     

    These messages are generated because the VIN and GND nets each have only @@ -672,15 +672,15 @@

    Copying SKiDL Objects

    Instead of creating a SKiDL object from scratch, sometimes it's easier to just copy an existing object. Here are some examples of creating a resistor and then making some copies of it:

    -
    >>> r1 = Part('Device', 'R', value=500)    # Add a resistor to the circuit.
    ->>> r2 = r1.copy()                         # Make a single copy of the resistor.
    ->>> r2_lst = r1.copy(1)                    # Make a single copy, but return it in a list.
    ->>> r3 = r1.copy(value='1K')               # Make a single copy, but give it a different value.
    ->>> r4 = r1(value='1K')                    # You can also call the object directly to make copies.
    ->>> r5, r6, r7 = r1(3, value='1K')         # Make three copies of a 1-KOhm resistor.
    ->>> r8, r9, r10 = r1(value=[110,220,330])  # Make three copies, each with a different value.
    ->>> r11, r12 = 2 * r1                      # Make copies using the '*' operator.
    ->>> r13, r14 = 2 * r1(value='1K')          # This actually makes three 1-KOhm resistors!!!
    +
    >>> r1 = Part('Device', 'R', value=500)    # Add a resistor to the circuit.
    +>>> r2 = r1.copy()                         # Make a single copy of the resistor.
    +>>> r2_lst = r1.copy(1)                    # Make a single copy, but return it in a list.
    +>>> r3 = r1.copy(value='1K')               # Make a single copy, but give it a different value.
    +>>> r4 = r1(value='1K')                    # You can also call the object directly to make copies.
    +>>> r5, r6, r7 = r1(3, value='1K')         # Make three copies of a 1-KOhm resistor.
    +>>> r8, r9, r10 = r1(value=[110,220,330])  # Make three copies, each with a different value.
    +>>> r11, r12 = 2 * r1                      # Make copies using the '*' operator.
    +>>> r13, r14 = 2 * r1(value='1K')          # This actually makes three 1-KOhm resistors!!!
     

    The last example demonstrates an unexpected result when using the * operator:

    @@ -694,8 +694,8 @@

    Copying SKiDL Objects

    errors later when the ERC is run.

    In some cases it's clearer to create parts by copying a template part that doesn't actually get included in the netlist for the circuitry:

    -
    >>> rt = Part('Device', 'R', dest=TEMPLATE)  # Create a resistor just for copying. It's not added to the circuit.
    ->>> r1, r2, r3 = rt(3, value='1K')           # Make three 1-KOhm copies that become part of the actual circuitry.
    +
    >>> rt = Part('Device', 'R', dest=TEMPLATE)  # Create a resistor just for copying. It's not added to the circuit.
    +>>> r1, r2, r3 = rt(3, value='1K')           # Make three 1-KOhm copies that become part of the actual circuitry.
     

    Accessing Part Pins and Bus Lines

    @@ -800,13 +800,13 @@

    Accessing Part Pins

    2) match pin names using regular expressions.

    If a part has pin names where the subnames are separated by delimiters such as /, then the subnames for each pin can be assigned as aliases:

    -
    >>> pic10[3].name = 'GP1/AN1/ICSPCLK'  # Give pin 3 a long name.
    ->>> pic10[3].split_name('/')           # Split pin 3 name into aliases.
    ->>> pic10.split_pin_names('/')         # Split all pin names into aliases.
    ->>> pic10[3].aliases                   # Show aliases for pin 3.
    -{'AN1', 'GP1', 'ICSPCLK'}
    ->>> pic10['AN1'] += Net('analog1')     # Connect a net using the pin alias.
    ->>> pic10.AN1 += Net('analog2')        # Or access the alias thru an attribute.
    +
    >>> pic10[3].name = 'GP1/AN1/ICSPCLK'  # Give pin 3 a long name.
    +>>> pic10[3].split_name('/')           # Split pin 3 name into aliases.
    +>>> pic10.split_pin_names('/')         # Split all pin names into aliases.
    +>>> pic10[3].aliases                   # Show aliases for pin 3.
    +{'AN1', 'GP1', 'ICSPCLK'}
    +>>> pic10['AN1'] += Net('analog1')     # Connect a net using the pin alias.
    +>>> pic10.AN1 += Net('analog2')        # Or access the alias thru an attribute.
     

    You can also split the pin names when you create the part:

    @@ -816,9 +816,9 @@

    Accessing Part Pins

    The other way to access a pin with a long name is to use a regular expression. You'll have to enable regular expression matching for a particular part (it's off by default), and you'll have to use an odd-looking expression, but here's how it's done:

    -
    >>> pic10[3].name = 'GP1/AN1/ICSPCLK'
    ->>> pic10.match_pin_regex = True          # Enable regular expression matching.
    ->>> pic10['.*\/AN1\/.*] += Net('analog1)  # I told you the expression was strange!
    +
    >>> pic10[3].name = 'GP1/AN1/ICSPCLK'
    +>>> pic10.match_pin_regex = True          # Enable regular expression matching.
    +>>> pic10['.*\/AN1\/.*] += Net('analog1)  # I told you the expression was strange!
     

    Since you can access pins by number or by name using strings or regular expressions, it's worth @@ -861,42 +861,42 @@

    Accessing Part Pins

    Accessing Bus Lines

    Accessing the individual lines of a bus works similarly to accessing part pins:

    -
    >>> a = Net('NET_A')  # Create a named net.
    ->>> b = Bus('BUS_B', 4, a)  # Create a five-bit bus.
    ->>> b
    -BUS_B:
    -        BUS_B0:  # Note how the individual lines of the bus are named.
    -        BUS_B1:
    -        BUS_B2:
    -        BUS_B3:
    -        NET_A:   # The last net retains its original name.
    +
    >>> a = Net('NET_A')  # Create a named net.
    +>>> b = Bus('BUS_B', 4, a)  # Create a five-bit bus.
    +>>> b
    +BUS_B:
    +        BUS_B0:  # Note how the individual lines of the bus are named.
    +        BUS_B1:
    +        BUS_B2:
    +        BUS_B3:
    +        NET_A:   # The last net retains its original name.
     
    ->>> b[0]  # Get the first line of the bus.
    -BUS_B0:
    +>>> b[0]  # Get the first line of the bus.
    +BUS_B0:
     
    ->>> b[2,4]  # Get the second and fourth bus lines.
    -[BUS_B2: , NET_A: ]
    +>>> b[2,4]  # Get the second and fourth bus lines.
    +[BUS_B2: , NET_A: ]
     
    ->>> b[3:0]  # Get the first four bus lines in reverse order.
    -[BUS_B3: , BUS_B2: , BUS_B1: , BUS_B0: ]
    +>>> b[3:0]  # Get the first four bus lines in reverse order.
    +[BUS_B3: , BUS_B2: , BUS_B1: , BUS_B0: ]
     
    ->>> b[-1]  # Get the last bus line.
    -NET_A: 
    +>>> b[-1]  # Get the last bus line.
    +NET_A: 
     
    ->>> b['BUS_B.*']  # Get all the bus lines except the last one.
    -[BUS_B0: , BUS_B1: , BUS_B2: , BUS_B3: ]
    +>>> b['BUS_B.*']  # Get all the bus lines except the last one.
    +[BUS_B0: , BUS_B1: , BUS_B2: , BUS_B3: ]
     
    ->>> b['NET_A']  # Get the last bus line.
    -NET_A:
    +>>> b['NET_A']  # Get the last bus line.
    +NET_A:
     
    ->>> for line in b:  # Access lines in bus using bus as an iterator.
    -...:    print(line)
    -...:
    -BUS_B0:
    -BUS_B1:
    -BUS_B2:
    -BUS_B3:
    -NET_A:
    +>>> for line in b:  # Access lines in bus using bus as an iterator.
    +...:    print(line)
    +...:
    +BUS_B0:
    +BUS_B1:
    +BUS_B2:
    +BUS_B3:
    +NET_A:
     

    Making Connections

    @@ -940,30 +940,30 @@

    Making Connections

    same number of things to connect in each set, e.g. you can't connect three pins to four nets.

    As a first example, let's connect a net to a pin on a part:

    -
    >>> pic10 = Part('MCU_Microchip_PIC10', 'pic10f220-iot')  # Get a part.
    ->>> io = Net('IO_NET')  # Create a net.
    ->>> pic10.GP0] += io    # Connect the net to a part pin.
    ->>> io                  # Show the pins connected to the net.
    -IO_NET: Pin U5/1/GP0/BIDIRECTIONAL
    +
    >>> pic10 = Part('MCU_Microchip_PIC10', 'pic10f220-iot')  # Get a part.
    +>>> io = Net('IO_NET')  # Create a net.
    +>>> pic10.GP0] += io    # Connect the net to a part pin.
    +>>> io                  # Show the pins connected to the net.
    +IO_NET: Pin U5/1/GP0/BIDIRECTIONAL
     

    You can do the same operation in reverse by connecting the part pin to the net with the same result:

    -
    >>> pic10 = Part('MCU_Microchip_PIC10', 'pic10f220-iot')
    ->>> io = Net('IO_NET')
    ->>> io += pic10*GP0     # Connect a part pin to the net.
    ->>> io
    -IO_NET_1: Pin U6/1/GP0/BIDIRECTIONAL
    +
    >>> pic10 = Part('MCU_Microchip_PIC10', 'pic10f220-iot')
    +>>> io = Net('IO_NET')
    +>>> io += pic10*GP0     # Connect a part pin to the net.
    +>>> io
    +IO_NET_1: Pin U6/1/GP0/BIDIRECTIONAL
     

    You can also connect a pin directly to another pin. In this case, an implicit net will be created between the pins that you can access using the net attribute of either part pin:

    -
    >>> pic10.GP1 += pic10.GP2  # Connect two pins together.
    ->>> pic10.GP1.net           # Show the net connected to the pin.
    -N$1: Pin U6/3/GP1/BIDIRECTIONAL, Pin U6/4/GP2/BIDIRECTIONAL
    ->>> pic10.GP2.net           # Show the net connected to the other pin. Same thing!
    -N$1: Pin U6/3/GP1/BIDIRECTIONAL, Pin U6/4/GP2/BIDIRECTIONAL
    +
    >>> pic10.GP1 += pic10.GP2  # Connect two pins together.
    +>>> pic10.GP1.net           # Show the net connected to the pin.
    +N$1: Pin U6/3/GP1/BIDIRECTIONAL, Pin U6/4/GP2/BIDIRECTIONAL
    +>>> pic10.GP2.net           # Show the net connected to the other pin. Same thing!
    +N$1: Pin U6/3/GP1/BIDIRECTIONAL, Pin U6/4/GP2/BIDIRECTIONAL
     

    You can connect multiple pins, all at once:

    @@ -983,49 +983,49 @@

    Making Connections

    If you connect pins on separate nets together, then all the pins are merged onto the same net:

    -
    >>> pic10 = Part('MCU_Microchip_PIC10', 'pic10f220-iot') 
    ->>> pic10[1] += pic10[2]  # Put pins 1 & 2 on one net.
    ->>> pic10[3] += pic10[4]  # Put pins 3 & 4 on another net.
    ->>> pic10[1] += pic10[4]  # Connect two pins from different nets.
    ->>> pic10[3].net          # Now all the pins are on the same net!
    -N$9: Pin U9/1/GP0/BIDIRECTIONAL, Pin U9/2/VSS/POWER-IN, Pin U9/3/GP1/BIDIRECTIONAL, Pin U9/4/GP2/BIDIRECTIONAL
    +
    >>> pic10 = Part('MCU_Microchip_PIC10', 'pic10f220-iot') 
    +>>> pic10[1] += pic10[2]  # Put pins 1 & 2 on one net.
    +>>> pic10[3] += pic10[4]  # Put pins 3 & 4 on another net.
    +>>> pic10[1] += pic10[4]  # Connect two pins from different nets.
    +>>> pic10[3].net          # Now all the pins are on the same net!
    +N$9: Pin U9/1/GP0/BIDIRECTIONAL, Pin U9/2/VSS/POWER-IN, Pin U9/3/GP1/BIDIRECTIONAL, Pin U9/4/GP2/BIDIRECTIONAL
     

    Here's an example of connecting a three-bit bus to three pins on a part:

    -
    >>> pic10 = Part('MCU_Microchip_PIC10', 'pic10f220-iot') 
    ->>> b = Bus('GP', 3)                # Create a 3-bit bus.
    ->>> pic10['GP2 GP1 GP0'] += b[2:0]  # Connect bus to part pins, one-to-one.
    ->>> b
    -GP:
    -        GP0: Pin U10/1/GP0/BIDIRECTIONAL
    -        GP1: Pin U10/3/GP1/BIDIRECTIONAL
    -        GP2: Pin U10/4/GP2/BIDIRECTIONAL
    +
    >>> pic10 = Part('MCU_Microchip_PIC10', 'pic10f220-iot') 
    +>>> b = Bus('GP', 3)                # Create a 3-bit bus.
    +>>> pic10['GP2 GP1 GP0'] += b[2:0]  # Connect bus to part pins, one-to-one.
    +>>> b
    +GP:
    +        GP0: Pin U10/1/GP0/BIDIRECTIONAL
    +        GP1: Pin U10/3/GP1/BIDIRECTIONAL
    +        GP2: Pin U10/4/GP2/BIDIRECTIONAL
     

    But SKiDL will warn you if there aren't the same number of things to connect on each side:

    -
    >>> pic10[4,3,1] += b[1:0]  # Too few bus lines for the pins!
    -ERROR: Connection mismatch 3 != 2!
    ----------------------------------------------------------------------------
    -ValueError                                Traceback (most recent call last)
    -<ipython-input-83-48a1e46383fe> in <module>
    -----> 1 pic10[4,3,1] += b[1:0]
    -
    -/media/devb/Main/devbisme/KiCad/tools/skidl/skidl/netpinlist.py in __iadd__(self, *nets_pins_buses)
    -     60         if len(nets_pins) != len(self):
    -     61             if Net in [type(item) for item in self] or len(nets_pins) > 1:
    ----> 62                 log_and_raise(
    -     63                     logger,
    -     64                     ValueError,
    -
    -/media/devb/Main/devbisme/KiCad/tools/skidl/skidl/utilities.py in log_and_raise(logger_in, exc_class, message)
    -    785 def log_and_raise(logger_in, exc_class, message):
    -    786     logger_in.error(message)
    ---> 787     raise exc_class(message)
    -    788 
    -    789 
    -
    -ValueError: Connection mismatch 3 != 2!
    +
    >>> pic10[4,3,1] += b[1:0]  # Too few bus lines for the pins!
    +ERROR: Connection mismatch 3 != 2!
    +---------------------------------------------------------------------------
    +ValueError                                Traceback (most recent call last)
    +<ipython-input-83-48a1e46383fe> in <module>
    +----> 1 pic10[4,3,1] += b[1:0]
    +
    +/media/devb/Main/devbisme/KiCad/tools/skidl/skidl/netpinlist.py in __iadd__(self, *nets_pins_buses)
    +     60         if len(nets_pins) != len(self):
    +     61             if Net in [type(item) for item in self] or len(nets_pins) > 1:
    +---> 62                 log_and_raise(
    +     63                     logger,
    +     64                     ValueError,
    +
    +/media/devb/Main/devbisme/KiCad/tools/skidl/skidl/utilities.py in log_and_raise(logger_in, exc_class, message)
    +    785 def log_and_raise(logger_in, exc_class, message):
    +    786     logger_in.error(message)
    +--> 787     raise exc_class(message)
    +    788 
    +    789 
    +
    +ValueError: Connection mismatch 3 != 2!
     

    Making Serial, Parallel, and Tee Networks

    @@ -1115,23 +1115,23 @@

    Units Within Parts

    For example, a four-pin resistor network might contain two resistors: one attached between pins 1 and 4, and the other bewtween pins 2 and 3. Each resistor could be assigned to a unit as follows:

    -
    >>> rn = Part("Device", 'R_Pack02')
    ->>> rn.make_unit('A', 1, 4)  # Make a unit called 'A' for the first resistor.
    +
    >>> rn = Part("Device", 'R_Pack02')
    +>>> rn.make_unit('A', 1, 4)  # Make a unit called 'A' for the first resistor.
     
    - R_Pack02 (): 2 Resistor network, parallel topology, DIP package
    -    Pin RN1/4/R1.2/PASSIVE
    -    Pin RN1/1/R1.1/PASSIVE
    + R_Pack02 (): 2 Resistor network, parallel topology, DIP package
    +    Pin RN1/4/R1.2/PASSIVE
    +    Pin RN1/1/R1.1/PASSIVE
     
    ->>> rn.make_unit('B', 2, 3)  # Now make a unit called 'B' for the second resistor.
    +>>> rn.make_unit('B', 2, 3)  # Now make a unit called 'B' for the second resistor.
     
    - R_Pack02 (): 2 Resistor network, parallel topology, DIP package
    -    Pin RN1/2/R2.1/PASSIVE
    -    Pin RN1/3/R2.2/PASSIVE
    + R_Pack02 (): 2 Resistor network, parallel topology, DIP package
    +    Pin RN1/2/R2.1/PASSIVE
    +    Pin RN1/3/R2.2/PASSIVE
     

    Once the units are defined, you can use them just like any part:

    -
    >>> rn.unit['A'][1,4] += Net(), Net()  # Connect resistor A to two nets.
    ->>> rn.unit['B'][2,3] += rn.unit['A'][1,4]  # Connect resistor B in parallel with resistor A.
    +
    >>> rn.unit['A'][1,4] += Net(), Net()  # Connect resistor A to two nets.
    +>>> rn.unit['B'][2,3] += rn.unit['A'][1,4]  # Connect resistor B in parallel with resistor A.
     

    Now this isn't all that useful because you still have to remember which pins @@ -1146,8 +1146,8 @@

    Units Within Parts

    Now the same connections can be made using the pin aliases:

    -
    >>> rn.unit['A']['L,R'] += Net(), Net()  # Connect resistor A to two nets.
    ->>> rn.unit['B']['L,R'] += rn.unit['A']['L,R']  # Connect resistor B in parallel with resistor A.
    +
    >>> rn.unit['A']['L,R'] += Net(), Net()  # Connect resistor A to two nets.
    +>>> rn.unit['B']['L,R'] += rn.unit['A']['L,R']  # Connect resistor B in parallel with resistor A.
     

    In this case, if you wanted to swap the A and B resistors, you only need to change @@ -1155,8 +1155,8 @@

    Units Within Parts

    The pin aliases don't need to be altered.

    If you find the unit[...] notation cumbersome, units can also be accessed by using their names as attributes:

    -
    >>> rn.A['L,R'] += Net(), Net()  # Connect resistor A to two nets.
    ->>> rn.B['L,R'] += rn.A['L,R']   # Connect resistor B in parallel with resistor A.
    +
    >>> rn.A['L,R'] += Net(), Net()  # Connect resistor A to two nets.
    +>>> rn.B['L,R'] += rn.A['L,R']   # Connect resistor B in parallel with resistor A.
     

    Part Fields

    @@ -1613,13 +1613,13 @@

    Net and Pin Drive Levels

    using its drive attribute. As a simple example, consider connecting a net to the power supply input of a processor and then running the ERC:

    -
    >>> pic10 = Part('MCU_Microchip_PIC10', 'pic10f220-iot') 
    ->>> a = Net()
    ->>> pic10['VDD'] += a
    ->>> ERC()
    -...
    -ERC WARNING: Insufficient drive current on net N$1 for pin POWER-IN pin 5/VDD of PIC10F220-IOT/U1
    -...
    +
    >>> pic10 = Part('MCU_Microchip_PIC10', 'pic10f220-iot') 
    +>>> a = Net()
    +>>> pic10['VDD'] += a
    +>>> ERC()
    +...
    +ERC WARNING: Insufficient drive current on net N$1 for pin POWER-IN pin 5/VDD of PIC10F220-IOT/U1
    +...
     

    To fix this issue, change the drive attribute of the net:

    @@ -1641,16 +1641,16 @@

    Net and Pin Drive Levels

    You can also set the drive attribute of part pins to override their default drive level. This can be useful when you are using an output pin of a part to power another part.

    -
    >>> pic10_a = Part('MCU_Microchip_PIC10', 'pic10f220-iot')
    ->>> pic10_b = Part('MCU_Microchip_PIC10', 'pic10f220-iot')
    ->>> pic10_b['VDD'] += pic10_a[1]  # Power pic10_b from output pin of pic10_a.
    ->>> ERC()
    -ERC WARNING: Insufficient drive current on net N$1 for pin POWER-IN pin 5/VDD of PIC10F220-IOT/U2
    -... (additional unconnected pin warnings) ...
    +
    >>> pic10_a = Part('MCU_Microchip_PIC10', 'pic10f220-iot')
    +>>> pic10_b = Part('MCU_Microchip_PIC10', 'pic10f220-iot')
    +>>> pic10_b['VDD'] += pic10_a[1]  # Power pic10_b from output pin of pic10_a.
    +>>> ERC()
    +ERC WARNING: Insufficient drive current on net N$1 for pin POWER-IN pin 5/VDD of PIC10F220-IOT/U2
    +... (additional unconnected pin warnings) ...
     
    ->>> pic10_a[1].drive = POWER  # Change drive level of pic10_a output pin.
    ->>> ERC()
    -... (Insufficient drive warning is gone.) ...
    +>>> pic10_a[1].drive = POWER  # Change drive level of pic10_a output pin.
    +>>> ERC()
    +... (Insufficient drive warning is gone.) ...
     

    Pin, Net, Bus Equivalencies

    @@ -1674,30 +1674,30 @@

    Pin, Net, Bus Equivalencies

    Indexing: Normally, indices can only be used with a Bus object to select one or more bus lines. But Pin and Net objects can also be indexed as long as the index evaluates to zero:

    -
    >>> a = Net('A')
    ->>> c = Pin()
    ->>> a[0] += c[0]
    -WARNING: Attaching non-part Pin  to a Net A.
    ->>> a[0] += c[1]
    -ERROR: Can't use a non-zero index for a pin.
    -Traceback (most recent call last):
    -  File "<stdin>", line 1, in <module>
    -  File "C:\devbisme\KiCad\tools\skidl\skidl\Pin.py", line 251, in __getitem__
    -    raise Exception
    -Exception
    +
    >>> a = Net('A')
    +>>> c = Pin()
    +>>> a[0] += c[0]
    +WARNING: Attaching non-part Pin  to a Net A.
    +>>> a[0] += c[1]
    +ERROR: Can't use a non-zero index for a pin.
    +Traceback (most recent call last):
    +  File "<stdin>", line 1, in <module>
    +  File "C:\devbisme\KiCad\tools\skidl\skidl\Pin.py", line 251, in __getitem__
    +    raise Exception
    +Exception
     

    Iterators: In addition to supporting indexing, Pin, Net and Bus objects can be used as iterators.

    -
    >>> bus = Bus('bus', 4)
    ->>> for line in bus:
    -    ...:     print(line)
    -    ...:
    -bus0:
    -bus1:
    -bus2:
    -bus3:
    +
    >>> bus = Bus('bus', 4)
    +>>> for line in bus:
    +    ...:     print(line)
    +    ...:
    +bus0:
    +bus1:
    +bus2:
    +bus3:
     

    Width: diff --git a/docs/index2.html b/docs/index2.html index 5a9cc3a7..931d4459 100644 --- a/docs/index2.html +++ b/docs/index2.html @@ -4,7 +4,7 @@ SKiDL - + @@ -14,15 +14,15 @@ --> - + href="/" /> +

    @@ -44,13 +44,13 @@

    - SKiDL at KiCon 2019 + SKiDL at KiCon 2019

    At the recent KiCon 2019, I gave a talk @@ -62,13 +62,13 @@

    - Sweetening SKiDL + Sweetening SKiDL

    I've added a bit of syntactic sugar to SKiDL over the past few months:

    @@ -84,13 +84,13 @@

    Series, Parallel, and Tee

    - Others Use It, Too! + Others Use It, Too!

    It helps when other people use SKiDL; then I can coast by just showing what they've done. @@ -104,13 +104,13 @@

    Blinkenface

    - Reusability Ain't What It Used To Be + Reusability Ain't What It Used To Be

    Sometimes you need a quick circuit that does one, specific thing. @@ -122,13 +122,13 @@

    Four LEDs

    - Spice Simulation + Spice Simulation

    I've added the capability to do SPICE simulations of circuits designed with SKiDL. @@ -138,13 +138,13 @@

    - An Arduino With SKiDL + An Arduino With SKiDL

    It's April 1st. It's also Arduino Day. Really. That's not a joke.

    @@ -157,13 +157,13 @@

    - Two Easy Pieces + Two Easy Pieces

    I really wanted to call this post Five Easy Pieces, but I'm not @@ -178,13 +178,13 @@

    LED Clock

    - Don't Replicate, Automate! + Don't Replicate, Automate!

    I used to work during summers for a bricklayer. @@ -196,13 +196,13 @@

    - A Taste of Hierarchy + A Taste of Hierarchy

    In my previous blog posts, the SKiDL circuit descriptions were flat. @@ -213,16 +213,16 @@

    - Names, Not Numbers + Names, Not Numbers

    -

    In my previous post, +

    In my previous post, I showed how to use SKiDL to describe the circuit for a simple USB-to-JTAG interface circuit. That circuit used a PIC32MX microcontroller in a 28-pin SSOP package:

    @@ -237,10 +237,10 @@

    diff --git a/docs/index3.html b/docs/index3.html index 3909e00e..aacf26b6 100644 --- a/docs/index3.html +++ b/docs/index3.html @@ -4,7 +4,7 @@ SKiDL - + @@ -14,15 +14,15 @@ --> - + href="/" /> +
    @@ -44,13 +44,13 @@

    - Building a USB-to-JTAG Interface Using SKiDL + Building a USB-to-JTAG Interface Using SKiDL

    This post describes using SKiDL for a USB-to-JTAG interface @@ -66,7 +66,7 @@

    diff --git a/docs/names-not-numbers-2017-01-25.html b/docs/names-not-numbers-2017-01-25.html index 04365432..6ad2083c 100644 --- a/docs/names-not-numbers-2017-01-25.html +++ b/docs/names-not-numbers-2017-01-25.html @@ -4,7 +4,7 @@ SKiDL — Names, Not Numbers - + @@ -14,15 +14,15 @@ --> - + href="/" /> +
    @@ -45,16 +45,16 @@

    - Names, Not Numbers + Names, Not Numbers

    -

    In my previous post, +

    In my previous post, I showed how to use SKiDL to describe the circuit for a simple USB-to-JTAG interface circuit. That circuit used a PIC32MX microcontroller in a 28-pin SSOP package:

    diff --git a/docs/one-dot-oh-2021-05-09.html b/docs/one-dot-oh-2021-05-09.html index 28802407..6eed247c 100644 --- a/docs/one-dot-oh-2021-05-09.html +++ b/docs/one-dot-oh-2021-05-09.html @@ -4,7 +4,7 @@ SKiDL — 1.0 - + @@ -14,15 +14,15 @@ --> - + href="/" /> +
    @@ -45,13 +45,13 @@

    - 1.0 + 1.0

    Nearly a year after 0.0.30, today marks the release of SKiDL version 1.0.0. diff --git a/docs/one-dot-one-2021-10-22.html b/docs/one-dot-one-2021-10-22.html index 6bea927c..5fb39a6b 100644 --- a/docs/one-dot-one-2021-10-22.html +++ b/docs/one-dot-one-2021-10-22.html @@ -4,7 +4,7 @@ SKiDL — New 1.1.0 Release - + @@ -14,15 +14,15 @@ --> - + href="/" /> +

    @@ -45,13 +45,13 @@

    - New 1.1.0 Release + New 1.1.0 Release

    It's been nearly half a year since the big 1.0 release. diff --git a/docs/others-use-it-too-2018-07-29.html b/docs/others-use-it-too-2018-07-29.html index 9f8826fc..cd26a0ec 100644 --- a/docs/others-use-it-too-2018-07-29.html +++ b/docs/others-use-it-too-2018-07-29.html @@ -4,7 +4,7 @@ SKiDL — Others Use It, Too! - + @@ -14,15 +14,15 @@ --> - + href="/" /> +

    @@ -45,13 +45,13 @@

    - Others Use It, Too! + Others Use It, Too!

    It helps when other people use SKiDL; then I can coast by just showing what they've done. diff --git a/docs/package-decorator-2020-05-27.html b/docs/package-decorator-2020-05-27.html index d1997d45..d9bedee0 100644 --- a/docs/package-decorator-2020-05-27.html +++ b/docs/package-decorator-2020-05-27.html @@ -4,7 +4,7 @@ SKiDL — Good Things Come In Packages! - + @@ -14,15 +14,15 @@ --> - + href="/" /> +

    @@ -45,13 +45,13 @@

    - Good Things Come In Packages! + Good Things Come In Packages!

    Up to now, SKiDL supported hierarchy by applying the @subcircuit decorator to a Python function:

    diff --git a/docs/pages/about-skidl.html b/docs/pages/about-skidl.html index 905d2c86..2ad8062d 100644 --- a/docs/pages/about-skidl.html +++ b/docs/pages/about-skidl.html @@ -4,7 +4,7 @@ SKiDL — About SKiDL - + @@ -14,15 +14,15 @@ --> - + href="/" /> +
    @@ -44,11 +44,11 @@

    -

    About SKiDL

    +

    About SKiDL

    Thanks for showing interest in SKiDL, a small package that let's you design electronic circuits using Python.

    diff --git a/docs/pages/page-not-found.html b/docs/pages/page-not-found.html index 5e6a61f5..9abb8be2 100644 --- a/docs/pages/page-not-found.html +++ b/docs/pages/page-not-found.html @@ -4,7 +4,7 @@ SKiDL — Page Not Found - + @@ -14,15 +14,15 @@ --> - + href="/" /> +
    @@ -44,11 +44,11 @@

    -

    Page Not Found

    +

    Page Not Found

    404 - Page Not Found!

    diff --git a/docs/reuse-leds-2018-05-15.html b/docs/reuse-leds-2018-05-15.html index b344852e..bfb4101a 100644 --- a/docs/reuse-leds-2018-05-15.html +++ b/docs/reuse-leds-2018-05-15.html @@ -4,7 +4,7 @@ SKiDL — Reusability Ain't What It Used To Be - + @@ -14,15 +14,15 @@ --> - + href="/" /> +
    @@ -45,13 +45,13 @@

    - Reusability Ain't What It Used To Be + Reusability Ain't What It Used To Be

    Sometimes you need a quick circuit that does one, specific thing. diff --git a/docs/skidl-forum-2020-05-20.html b/docs/skidl-forum-2020-05-20.html index c1966f92..59e2d7fe 100644 --- a/docs/skidl-forum-2020-05-20.html +++ b/docs/skidl-forum-2020-05-20.html @@ -4,7 +4,7 @@ SKiDL — New SKiDL Forum! - + @@ -14,15 +14,15 @@ --> - + href="/" /> +

    @@ -45,13 +45,13 @@

    - New SKiDL Forum! + New SKiDL Forum!

    FYI: The forum has moved.

    diff --git a/docs/skidl-kicon-2019-2019-06-12.html b/docs/skidl-kicon-2019-2019-06-12.html index b43cdc79..7fe8602b 100644 --- a/docs/skidl-kicon-2019-2019-06-12.html +++ b/docs/skidl-kicon-2019-2019-06-12.html @@ -4,7 +4,7 @@ SKiDL — SKiDL at KiCon 2019 - + @@ -14,15 +14,15 @@ --> - + href="/" /> +
    @@ -45,13 +45,13 @@

    - SKiDL at KiCon 2019 + SKiDL at KiCon 2019

    At the recent KiCon 2019, I gave a talk diff --git a/docs/spice-simulation-2018-02-07.html b/docs/spice-simulation-2018-02-07.html index c26ad857..ec6fb634 100644 --- a/docs/spice-simulation-2018-02-07.html +++ b/docs/spice-simulation-2018-02-07.html @@ -4,7 +4,7 @@ SKiDL — Spice Simulation - + @@ -14,15 +14,15 @@ --> - + href="/" /> +

    @@ -45,13 +45,13 @@

    - Spice Simulation + Spice Simulation

    I've added the capability to do SPICE simulations of circuits designed with SKiDL. diff --git a/docs/sweetening-skidl-2018-09-03.html b/docs/sweetening-skidl-2018-09-03.html index 9113f8a1..8ab09102 100644 --- a/docs/sweetening-skidl-2018-09-03.html +++ b/docs/sweetening-skidl-2018-09-03.html @@ -4,7 +4,7 @@ SKiDL — Sweetening SKiDL - + @@ -14,15 +14,15 @@ --> - + href="/" /> +

    @@ -45,13 +45,13 @@

    - Sweetening SKiDL + Sweetening SKiDL

    I've added a bit of syntactic sugar to SKiDL over the past few months:

    diff --git a/docs/tags.html b/docs/tags.html index d980839d..7b713c11 100644 --- a/docs/tags.html +++ b/docs/tags.html @@ -4,7 +4,7 @@ SKiDL — Tags - + @@ -14,15 +14,15 @@ --> - + href="/" /> +
    diff --git a/docs/two-easy-pieces-2017-03-02.html b/docs/two-easy-pieces-2017-03-02.html index c31ef294..9e605790 100644 --- a/docs/two-easy-pieces-2017-03-02.html +++ b/docs/two-easy-pieces-2017-03-02.html @@ -4,7 +4,7 @@ SKiDL — Two Easy Pieces - + @@ -14,15 +14,15 @@ --> - + href="/" /> +
    @@ -45,13 +45,13 @@

    - Two Easy Pieces + Two Easy Pieces

    I really wanted to call this post Five Easy Pieces, but I'm not diff --git a/docs/worst-part-of-skidl-2019-09-30.html b/docs/worst-part-of-skidl-2019-09-30.html index b8fb8911..64737e59 100644 --- a/docs/worst-part-of-skidl-2019-09-30.html +++ b/docs/worst-part-of-skidl-2019-09-30.html @@ -4,7 +4,7 @@ SKiDL — The Worst Part of SKiDL - + @@ -14,15 +14,15 @@ --> - + href="/" /> +

    @@ -45,13 +45,13 @@

    - The Worst Part of SKiDL + The Worst Part of SKiDL

    I created SKiDL to replace the manual tedium of drawing schematics with the diff --git a/docs/xspice-capability-2020-01-30.html b/docs/xspice-capability-2020-01-30.html index e33505b6..a34027ca 100644 --- a/docs/xspice-capability-2020-01-30.html +++ b/docs/xspice-capability-2020-01-30.html @@ -4,7 +4,7 @@ SKiDL — xspice capability - + @@ -14,15 +14,15 @@ --> - + href="/" /> +

    @@ -45,13 +45,13 @@

    - xspice capability + xspice capability

    Somebody asked about using XSPICE components in SPICE simulations with SKiDL. diff --git a/docsrc/sphinx/conf.py b/docsrc/sphinx/conf.py index a34b43c5..534a2225 100644 --- a/docsrc/sphinx/conf.py +++ b/docsrc/sphinx/conf.py @@ -20,9 +20,9 @@ # documentation root, use os.path.abspath to make it absolute, like shown here. # Get the root directory of the entire project. -project_root = os.path.join(os.getcwd(), '../..') -skidl_root = os.path.join(project_root, 'skidl') -docs_root = os.path.join(project_root, 'docs') +project_root = os.path.join(os.getcwd(), "../..") +skidl_root = os.path.join(project_root, "src/skidl") +docs_root = os.path.join(project_root, "docs") # Insert the project root dir as the first element in the PYTHONPATH. # This lets us ensure that the source package is imported, and that its diff --git a/docsrc/sphinx/rst_output/skidl.arrange.rst b/docsrc/sphinx/rst_output/skidl.arrange.rst deleted file mode 100644 index 972b2c2d..00000000 --- a/docsrc/sphinx/rst_output/skidl.arrange.rst +++ /dev/null @@ -1,7 +0,0 @@ -skidl.arrange module -==================== - -.. automodule:: skidl.arrange - :members: - :undoc-members: - :show-inheritance: diff --git a/docsrc/sphinx/rst_output/skidl.coord.rst b/docsrc/sphinx/rst_output/skidl.coord.rst deleted file mode 100644 index 12f6fcdf..00000000 --- a/docsrc/sphinx/rst_output/skidl.coord.rst +++ /dev/null @@ -1,7 +0,0 @@ -skidl.coord module -================== - -.. automodule:: skidl.coord - :members: - :undoc-members: - :show-inheritance: diff --git a/docsrc/sphinx/rst_output/skidl.netlist_to_skidl_main.rst b/docsrc/sphinx/rst_output/skidl.netlist_to_skidl_main.rst deleted file mode 100644 index 5cac4baa..00000000 --- a/docsrc/sphinx/rst_output/skidl.netlist_to_skidl_main.rst +++ /dev/null @@ -1,7 +0,0 @@ -skidl.netlist\_to\_skidl\_main module -===================================== - -.. automodule:: skidl.netlist_to_skidl_main - :members: - :undoc-members: - :show-inheritance: diff --git a/docsrc/sphinx/rst_output/skidl.rst b/docsrc/sphinx/rst_output/skidl.rst index 419e7172..58a2e97c 100644 --- a/docsrc/sphinx/rst_output/skidl.rst +++ b/docsrc/sphinx/rst_output/skidl.rst @@ -13,6 +13,8 @@ Subpackages :maxdepth: 4 skidl.libs + skidl.schematics + skidl.scripts skidl.tools Submodules @@ -22,18 +24,17 @@ Submodules :maxdepth: 4 skidl.alias - skidl.arrange skidl.bus skidl.circuit skidl.common - skidl.coord + skidl.config skidl.erc + skidl.group skidl.interface skidl.logger skidl.net skidl.netclass skidl.netlist_to_skidl - skidl.netlist_to_skidl_main skidl.netpinlist skidl.network skidl.note diff --git a/docsrc/sphinx/rst_output/skidl.tools.kicad.rst b/docsrc/sphinx/rst_output/skidl.tools.kicad.rst index b92aae9d..5a61e5ac 100644 --- a/docsrc/sphinx/rst_output/skidl.tools.kicad.rst +++ b/docsrc/sphinx/rst_output/skidl.tools.kicad.rst @@ -12,4 +12,8 @@ Submodules .. toctree:: :maxdepth: 4 + skidl.tools.kicad.constants + skidl.tools.kicad.eeschema_v5 skidl.tools.kicad.kicad + skidl.tools.kicad.v5 + skidl.tools.kicad.v6 diff --git a/setup.py b/setup.py index add6aaea..b80e4d21 100644 --- a/setup.py +++ b/setup.py @@ -10,7 +10,7 @@ __email__ = "devb@xess.com" if "sdist" in sys.argv[1:]: - with open("skidl/pckg_info.py", "w") as f: + with open("src/skidl/pckg_info.py", "w") as f: for name in ["__version__", "__author__", "__email__"]: f.write('{} = "{}"\n'.format(name, locals()[name])) @@ -55,11 +55,14 @@ "Tracker": "https://github.com/devbisme/skidl/issues", }, # packages=['skidl',], - packages=setuptools.find_packages(), + # packages=setuptools.find_packages(), + packages=setuptools.find_packages(where="src"), entry_points={ - "console_scripts": ["netlist_to_skidl = skidl.scripts.netlist_to_skidl_main:main"] + "console_scripts": [ + "netlist_to_skidl = skidl.scripts.netlist_to_skidl_main:main" + ] }, - package_dir={"skidl": "skidl"}, + package_dir={"": "src"}, include_package_data=False, scripts=[], install_requires=requirements, diff --git a/skidl/__init__.py b/src/skidl/__init__.py similarity index 100% rename from skidl/__init__.py rename to src/skidl/__init__.py diff --git a/skidl/alias.py b/src/skidl/alias.py similarity index 100% rename from skidl/alias.py rename to src/skidl/alias.py diff --git a/skidl/bus.py b/src/skidl/bus.py similarity index 100% rename from skidl/bus.py rename to src/skidl/bus.py diff --git a/skidl/circuit.py b/src/skidl/circuit.py similarity index 100% rename from skidl/circuit.py rename to src/skidl/circuit.py diff --git a/skidl/common.py b/src/skidl/common.py similarity index 100% rename from skidl/common.py rename to src/skidl/common.py diff --git a/skidl/config.py b/src/skidl/config.py similarity index 100% rename from skidl/config.py rename to src/skidl/config.py diff --git a/skidl/erc.py b/src/skidl/erc.py similarity index 100% rename from skidl/erc.py rename to src/skidl/erc.py diff --git a/skidl/group.py b/src/skidl/group.py similarity index 100% rename from skidl/group.py rename to src/skidl/group.py diff --git a/skidl/interface.py b/src/skidl/interface.py similarity index 100% rename from skidl/interface.py rename to src/skidl/interface.py diff --git a/skidl/libs/74xgxx_sklib.py b/src/skidl/libs/74xgxx_sklib.py similarity index 100% rename from skidl/libs/74xgxx_sklib.py rename to src/skidl/libs/74xgxx_sklib.py diff --git a/skidl/libs/74xx_sklib.py b/src/skidl/libs/74xx_sklib.py similarity index 100% rename from skidl/libs/74xx_sklib.py rename to src/skidl/libs/74xx_sklib.py diff --git a/skidl/libs/Altera_sklib.py b/src/skidl/libs/Altera_sklib.py similarity index 100% rename from skidl/libs/Altera_sklib.py rename to src/skidl/libs/Altera_sklib.py diff --git a/skidl/libs/ESD_Protection_sklib.py b/src/skidl/libs/ESD_Protection_sklib.py similarity index 100% rename from skidl/libs/ESD_Protection_sklib.py rename to src/skidl/libs/ESD_Protection_sklib.py diff --git a/skidl/libs/LEM_sklib.py b/src/skidl/libs/LEM_sklib.py similarity index 100% rename from skidl/libs/LEM_sklib.py rename to src/skidl/libs/LEM_sklib.py diff --git a/skidl/libs/Lattice_sklib.py b/src/skidl/libs/Lattice_sklib.py similarity index 100% rename from skidl/libs/Lattice_sklib.py rename to src/skidl/libs/Lattice_sklib.py diff --git a/skidl/libs/NXP_sklib.py b/src/skidl/libs/NXP_sklib.py similarity index 100% rename from skidl/libs/NXP_sklib.py rename to src/skidl/libs/NXP_sklib.py diff --git a/skidl/libs/Oscillators_sklib.py b/src/skidl/libs/Oscillators_sklib.py similarity index 100% rename from skidl/libs/Oscillators_sklib.py rename to src/skidl/libs/Oscillators_sklib.py diff --git a/skidl/libs/Power_Management_sklib.py b/src/skidl/libs/Power_Management_sklib.py similarity index 100% rename from skidl/libs/Power_Management_sklib.py rename to src/skidl/libs/Power_Management_sklib.py diff --git a/skidl/libs/RFSolutions_sklib.py b/src/skidl/libs/RFSolutions_sklib.py similarity index 100% rename from skidl/libs/RFSolutions_sklib.py rename to src/skidl/libs/RFSolutions_sklib.py diff --git a/skidl/libs/Worldsemi_sklib.py b/src/skidl/libs/Worldsemi_sklib.py similarity index 100% rename from skidl/libs/Worldsemi_sklib.py rename to src/skidl/libs/Worldsemi_sklib.py diff --git a/skidl/libs/Xicor_sklib.py b/src/skidl/libs/Xicor_sklib.py similarity index 100% rename from skidl/libs/Xicor_sklib.py rename to src/skidl/libs/Xicor_sklib.py diff --git a/skidl/libs/Zilog_sklib.py b/src/skidl/libs/Zilog_sklib.py similarity index 100% rename from skidl/libs/Zilog_sklib.py rename to src/skidl/libs/Zilog_sklib.py diff --git a/skidl/libs/__init__.py b/src/skidl/libs/__init__.py similarity index 100% rename from skidl/libs/__init__.py rename to src/skidl/libs/__init__.py diff --git a/skidl/libs/ac-dc_sklib.py b/src/skidl/libs/ac-dc_sklib.py similarity index 100% rename from skidl/libs/ac-dc_sklib.py rename to src/skidl/libs/ac-dc_sklib.py diff --git a/skidl/libs/actel_sklib.py b/src/skidl/libs/actel_sklib.py similarity index 100% rename from skidl/libs/actel_sklib.py rename to src/skidl/libs/actel_sklib.py diff --git a/skidl/libs/adc-dac_sklib.py b/src/skidl/libs/adc-dac_sklib.py similarity index 100% rename from skidl/libs/adc-dac_sklib.py rename to src/skidl/libs/adc-dac_sklib.py diff --git a/skidl/libs/allegro_sklib.py b/src/skidl/libs/allegro_sklib.py similarity index 100% rename from skidl/libs/allegro_sklib.py rename to src/skidl/libs/allegro_sklib.py diff --git a/skidl/libs/analog_devices_sklib.py b/src/skidl/libs/analog_devices_sklib.py similarity index 100% rename from skidl/libs/analog_devices_sklib.py rename to src/skidl/libs/analog_devices_sklib.py diff --git a/skidl/libs/analog_switches_sklib.py b/src/skidl/libs/analog_switches_sklib.py similarity index 100% rename from skidl/libs/analog_switches_sklib.py rename to src/skidl/libs/analog_switches_sklib.py diff --git a/skidl/libs/atmel_sklib.py b/src/skidl/libs/atmel_sklib.py similarity index 100% rename from skidl/libs/atmel_sklib.py rename to src/skidl/libs/atmel_sklib.py diff --git a/skidl/libs/audio_sklib.py b/src/skidl/libs/audio_sklib.py similarity index 100% rename from skidl/libs/audio_sklib.py rename to src/skidl/libs/audio_sklib.py diff --git a/skidl/libs/battery_management_sklib.py b/src/skidl/libs/battery_management_sklib.py similarity index 100% rename from skidl/libs/battery_management_sklib.py rename to src/skidl/libs/battery_management_sklib.py diff --git a/skidl/libs/bbd_sklib.py b/src/skidl/libs/bbd_sklib.py similarity index 100% rename from skidl/libs/bbd_sklib.py rename to src/skidl/libs/bbd_sklib.py diff --git a/skidl/libs/bosch_sklib.py b/src/skidl/libs/bosch_sklib.py similarity index 100% rename from skidl/libs/bosch_sklib.py rename to src/skidl/libs/bosch_sklib.py diff --git a/skidl/libs/brooktre_sklib.py b/src/skidl/libs/brooktre_sklib.py similarity index 100% rename from skidl/libs/brooktre_sklib.py rename to src/skidl/libs/brooktre_sklib.py diff --git a/skidl/libs/cmos4000_sklib.py b/src/skidl/libs/cmos4000_sklib.py similarity index 100% rename from skidl/libs/cmos4000_sklib.py rename to src/skidl/libs/cmos4000_sklib.py diff --git a/skidl/libs/cmos_ieee_sklib.py b/src/skidl/libs/cmos_ieee_sklib.py similarity index 100% rename from skidl/libs/cmos_ieee_sklib.py rename to src/skidl/libs/cmos_ieee_sklib.py diff --git a/skidl/libs/conn_sklib.py b/src/skidl/libs/conn_sklib.py similarity index 100% rename from skidl/libs/conn_sklib.py rename to src/skidl/libs/conn_sklib.py diff --git a/skidl/libs/contrib_sklib.py b/src/skidl/libs/contrib_sklib.py similarity index 100% rename from skidl/libs/contrib_sklib.py rename to src/skidl/libs/contrib_sklib.py diff --git a/skidl/libs/convert_libs.py b/src/skidl/libs/convert_libs.py similarity index 100% rename from skidl/libs/convert_libs.py rename to src/skidl/libs/convert_libs.py diff --git a/skidl/libs/cypress_sklib.py b/src/skidl/libs/cypress_sklib.py similarity index 100% rename from skidl/libs/cypress_sklib.py rename to src/skidl/libs/cypress_sklib.py diff --git a/skidl/libs/dc-dc_sklib.py b/src/skidl/libs/dc-dc_sklib.py similarity index 100% rename from skidl/libs/dc-dc_sklib.py rename to src/skidl/libs/dc-dc_sklib.py diff --git a/skidl/libs/device_sklib.py b/src/skidl/libs/device_sklib.py similarity index 100% rename from skidl/libs/device_sklib.py rename to src/skidl/libs/device_sklib.py diff --git a/skidl/libs/digital-audio_sklib.py b/src/skidl/libs/digital-audio_sklib.py similarity index 100% rename from skidl/libs/digital-audio_sklib.py rename to src/skidl/libs/digital-audio_sklib.py diff --git a/skidl/libs/diode_sklib.py b/src/skidl/libs/diode_sklib.py similarity index 100% rename from skidl/libs/diode_sklib.py rename to src/skidl/libs/diode_sklib.py diff --git a/skidl/libs/display_sklib.py b/src/skidl/libs/display_sklib.py similarity index 100% rename from skidl/libs/display_sklib.py rename to src/skidl/libs/display_sklib.py diff --git a/skidl/libs/dsp_sklib.py b/src/skidl/libs/dsp_sklib.py similarity index 100% rename from skidl/libs/dsp_sklib.py rename to src/skidl/libs/dsp_sklib.py diff --git a/skidl/libs/elec-unifil_sklib.py b/src/skidl/libs/elec-unifil_sklib.py similarity index 100% rename from skidl/libs/elec-unifil_sklib.py rename to src/skidl/libs/elec-unifil_sklib.py diff --git a/skidl/libs/ftdi_sklib.py b/src/skidl/libs/ftdi_sklib.py similarity index 100% rename from skidl/libs/ftdi_sklib.py rename to src/skidl/libs/ftdi_sklib.py diff --git a/skidl/libs/gennum_sklib.py b/src/skidl/libs/gennum_sklib.py similarity index 100% rename from skidl/libs/gennum_sklib.py rename to src/skidl/libs/gennum_sklib.py diff --git a/skidl/libs/graphic_sklib.py b/src/skidl/libs/graphic_sklib.py similarity index 100% rename from skidl/libs/graphic_sklib.py rename to src/skidl/libs/graphic_sklib.py diff --git a/skidl/libs/hc11_sklib.py b/src/skidl/libs/hc11_sklib.py similarity index 100% rename from skidl/libs/hc11_sklib.py rename to src/skidl/libs/hc11_sklib.py diff --git a/skidl/libs/intel_sklib.py b/src/skidl/libs/intel_sklib.py similarity index 100% rename from skidl/libs/intel_sklib.py rename to src/skidl/libs/intel_sklib.py diff --git a/skidl/libs/interface_sklib.py b/src/skidl/libs/interface_sklib.py similarity index 100% rename from skidl/libs/interface_sklib.py rename to src/skidl/libs/interface_sklib.py diff --git a/skidl/libs/intersil_sklib.py b/src/skidl/libs/intersil_sklib.py similarity index 100% rename from skidl/libs/intersil_sklib.py rename to src/skidl/libs/intersil_sklib.py diff --git a/skidl/libs/ir_sklib.py b/src/skidl/libs/ir_sklib.py similarity index 100% rename from skidl/libs/ir_sklib.py rename to src/skidl/libs/ir_sklib.py diff --git a/skidl/libs/leds_sklib.py b/src/skidl/libs/leds_sklib.py similarity index 100% rename from skidl/libs/leds_sklib.py rename to src/skidl/libs/leds_sklib.py diff --git a/skidl/libs/linear_sklib.py b/src/skidl/libs/linear_sklib.py similarity index 100% rename from skidl/libs/linear_sklib.py rename to src/skidl/libs/linear_sklib.py diff --git a/skidl/libs/logo_sklib.py b/src/skidl/libs/logo_sklib.py similarity index 100% rename from skidl/libs/logo_sklib.py rename to src/skidl/libs/logo_sklib.py diff --git a/skidl/libs/maxim_sklib.py b/src/skidl/libs/maxim_sklib.py similarity index 100% rename from skidl/libs/maxim_sklib.py rename to src/skidl/libs/maxim_sklib.py diff --git a/skidl/libs/mechanical_sklib.py b/src/skidl/libs/mechanical_sklib.py similarity index 100% rename from skidl/libs/mechanical_sklib.py rename to src/skidl/libs/mechanical_sklib.py diff --git a/skidl/libs/memory_sklib.py b/src/skidl/libs/memory_sklib.py similarity index 100% rename from skidl/libs/memory_sklib.py rename to src/skidl/libs/memory_sklib.py diff --git a/skidl/libs/microchip_dspic33dsc_sklib.py b/src/skidl/libs/microchip_dspic33dsc_sklib.py similarity index 100% rename from skidl/libs/microchip_dspic33dsc_sklib.py rename to src/skidl/libs/microchip_dspic33dsc_sklib.py diff --git a/skidl/libs/microchip_pic10mcu_sklib.py b/src/skidl/libs/microchip_pic10mcu_sklib.py similarity index 100% rename from skidl/libs/microchip_pic10mcu_sklib.py rename to src/skidl/libs/microchip_pic10mcu_sklib.py diff --git a/skidl/libs/microchip_pic12mcu_sklib.py b/src/skidl/libs/microchip_pic12mcu_sklib.py similarity index 100% rename from skidl/libs/microchip_pic12mcu_sklib.py rename to src/skidl/libs/microchip_pic12mcu_sklib.py diff --git a/skidl/libs/microchip_pic16mcu_sklib.py b/src/skidl/libs/microchip_pic16mcu_sklib.py similarity index 100% rename from skidl/libs/microchip_pic16mcu_sklib.py rename to src/skidl/libs/microchip_pic16mcu_sklib.py diff --git a/skidl/libs/microchip_pic18mcu_sklib.py b/src/skidl/libs/microchip_pic18mcu_sklib.py similarity index 100% rename from skidl/libs/microchip_pic18mcu_sklib.py rename to src/skidl/libs/microchip_pic18mcu_sklib.py diff --git a/skidl/libs/microchip_pic24mcu_sklib.py b/src/skidl/libs/microchip_pic24mcu_sklib.py similarity index 100% rename from skidl/libs/microchip_pic24mcu_sklib.py rename to src/skidl/libs/microchip_pic24mcu_sklib.py diff --git a/skidl/libs/microchip_pic32mcu_sklib.py b/src/skidl/libs/microchip_pic32mcu_sklib.py similarity index 100% rename from skidl/libs/microchip_pic32mcu_sklib.py rename to src/skidl/libs/microchip_pic32mcu_sklib.py diff --git a/skidl/libs/microchip_sklib.py b/src/skidl/libs/microchip_sklib.py similarity index 100% rename from skidl/libs/microchip_sklib.py rename to src/skidl/libs/microchip_sklib.py diff --git a/skidl/libs/microcontrollers_sklib.py b/src/skidl/libs/microcontrollers_sklib.py similarity index 100% rename from skidl/libs/microcontrollers_sklib.py rename to src/skidl/libs/microcontrollers_sklib.py diff --git a/skidl/libs/modules_sklib.py b/src/skidl/libs/modules_sklib.py similarity index 100% rename from skidl/libs/modules_sklib.py rename to src/skidl/libs/modules_sklib.py diff --git a/skidl/libs/motor_drivers_sklib.py b/src/skidl/libs/motor_drivers_sklib.py similarity index 100% rename from skidl/libs/motor_drivers_sklib.py rename to src/skidl/libs/motor_drivers_sklib.py diff --git a/skidl/libs/motorola_sklib.py b/src/skidl/libs/motorola_sklib.py similarity index 100% rename from skidl/libs/motorola_sklib.py rename to src/skidl/libs/motorola_sklib.py diff --git a/skidl/libs/motors_sklib.py b/src/skidl/libs/motors_sklib.py similarity index 100% rename from skidl/libs/motors_sklib.py rename to src/skidl/libs/motors_sklib.py diff --git a/skidl/libs/msp430_sklib.py b/src/skidl/libs/msp430_sklib.py similarity index 100% rename from skidl/libs/msp430_sklib.py rename to src/skidl/libs/msp430_sklib.py diff --git a/skidl/libs/nordicsemi_sklib.py b/src/skidl/libs/nordicsemi_sklib.py similarity index 100% rename from skidl/libs/nordicsemi_sklib.py rename to src/skidl/libs/nordicsemi_sklib.py diff --git a/skidl/libs/nxp_armmcu_sklib.py b/src/skidl/libs/nxp_armmcu_sklib.py similarity index 100% rename from skidl/libs/nxp_armmcu_sklib.py rename to src/skidl/libs/nxp_armmcu_sklib.py diff --git a/skidl/libs/onsemi_sklib.py b/src/skidl/libs/onsemi_sklib.py similarity index 100% rename from skidl/libs/onsemi_sklib.py rename to src/skidl/libs/onsemi_sklib.py diff --git a/skidl/libs/opto_sklib.py b/src/skidl/libs/opto_sklib.py similarity index 100% rename from skidl/libs/opto_sklib.py rename to src/skidl/libs/opto_sklib.py diff --git a/skidl/libs/philips_sklib.py b/src/skidl/libs/philips_sklib.py similarity index 100% rename from skidl/libs/philips_sklib.py rename to src/skidl/libs/philips_sklib.py diff --git a/skidl/libs/power_sklib.py b/src/skidl/libs/power_sklib.py similarity index 100% rename from skidl/libs/power_sklib.py rename to src/skidl/libs/power_sklib.py diff --git a/skidl/libs/powerint_sklib.py b/src/skidl/libs/powerint_sklib.py similarity index 100% rename from skidl/libs/powerint_sklib.py rename to src/skidl/libs/powerint_sklib.py diff --git a/skidl/libs/pspice_sklib.py b/src/skidl/libs/pspice_sklib.py similarity index 100% rename from skidl/libs/pspice_sklib.py rename to src/skidl/libs/pspice_sklib.py diff --git a/skidl/libs/pyspice_sklib.py b/src/skidl/libs/pyspice_sklib.py similarity index 100% rename from skidl/libs/pyspice_sklib.py rename to src/skidl/libs/pyspice_sklib.py diff --git a/skidl/libs/references_sklib.py b/src/skidl/libs/references_sklib.py similarity index 100% rename from skidl/libs/references_sklib.py rename to src/skidl/libs/references_sklib.py diff --git a/skidl/libs/regul_sklib.py b/src/skidl/libs/regul_sklib.py similarity index 100% rename from skidl/libs/regul_sklib.py rename to src/skidl/libs/regul_sklib.py diff --git a/skidl/libs/relays_sklib.py b/src/skidl/libs/relays_sklib.py similarity index 100% rename from skidl/libs/relays_sklib.py rename to src/skidl/libs/relays_sklib.py diff --git a/skidl/libs/rfcom_sklib.py b/src/skidl/libs/rfcom_sklib.py similarity index 100% rename from skidl/libs/rfcom_sklib.py rename to src/skidl/libs/rfcom_sklib.py diff --git a/skidl/libs/sensors_sklib.py b/src/skidl/libs/sensors_sklib.py similarity index 100% rename from skidl/libs/sensors_sklib.py rename to src/skidl/libs/sensors_sklib.py diff --git a/skidl/libs/silabs_sklib.py b/src/skidl/libs/silabs_sklib.py similarity index 100% rename from skidl/libs/silabs_sklib.py rename to src/skidl/libs/silabs_sklib.py diff --git a/skidl/libs/siliconi_sklib.py b/src/skidl/libs/siliconi_sklib.py similarity index 100% rename from skidl/libs/siliconi_sklib.py rename to src/skidl/libs/siliconi_sklib.py diff --git a/skidl/libs/skidl_lib_sklib.py b/src/skidl/libs/skidl_lib_sklib.py similarity index 100% rename from skidl/libs/skidl_lib_sklib.py rename to src/skidl/libs/skidl_lib_sklib.py diff --git a/skidl/libs/stm32_sklib.py b/src/skidl/libs/stm32_sklib.py similarity index 100% rename from skidl/libs/stm32_sklib.py rename to src/skidl/libs/stm32_sklib.py diff --git a/skidl/libs/stm8_sklib.py b/src/skidl/libs/stm8_sklib.py similarity index 100% rename from skidl/libs/stm8_sklib.py rename to src/skidl/libs/stm8_sklib.py diff --git a/skidl/libs/supertex_sklib.py b/src/skidl/libs/supertex_sklib.py similarity index 100% rename from skidl/libs/supertex_sklib.py rename to src/skidl/libs/supertex_sklib.py diff --git a/skidl/libs/switches_sklib.py b/src/skidl/libs/switches_sklib.py similarity index 100% rename from skidl/libs/switches_sklib.py rename to src/skidl/libs/switches_sklib.py diff --git a/skidl/libs/texas_sklib.py b/src/skidl/libs/texas_sklib.py similarity index 100% rename from skidl/libs/texas_sklib.py rename to src/skidl/libs/texas_sklib.py diff --git a/skidl/libs/transf_sklib.py b/src/skidl/libs/transf_sklib.py similarity index 100% rename from skidl/libs/transf_sklib.py rename to src/skidl/libs/transf_sklib.py diff --git a/skidl/libs/transistors_sklib.py b/src/skidl/libs/transistors_sklib.py similarity index 100% rename from skidl/libs/transistors_sklib.py rename to src/skidl/libs/transistors_sklib.py diff --git a/skidl/libs/triac_thyristor_sklib.py b/src/skidl/libs/triac_thyristor_sklib.py similarity index 100% rename from skidl/libs/triac_thyristor_sklib.py rename to src/skidl/libs/triac_thyristor_sklib.py diff --git a/skidl/libs/ttl_ieee_sklib.py b/src/skidl/libs/ttl_ieee_sklib.py similarity index 100% rename from skidl/libs/ttl_ieee_sklib.py rename to src/skidl/libs/ttl_ieee_sklib.py diff --git a/skidl/libs/valves_sklib.py b/src/skidl/libs/valves_sklib.py similarity index 100% rename from skidl/libs/valves_sklib.py rename to src/skidl/libs/valves_sklib.py diff --git a/skidl/libs/video_sklib.py b/src/skidl/libs/video_sklib.py similarity index 100% rename from skidl/libs/video_sklib.py rename to src/skidl/libs/video_sklib.py diff --git a/skidl/libs/wiznet_sklib.py b/src/skidl/libs/wiznet_sklib.py similarity index 100% rename from skidl/libs/wiznet_sklib.py rename to src/skidl/libs/wiznet_sklib.py diff --git a/skidl/libs/xilinx_sklib.py b/src/skidl/libs/xilinx_sklib.py similarity index 100% rename from skidl/libs/xilinx_sklib.py rename to src/skidl/libs/xilinx_sklib.py diff --git a/skidl/libs/zetex_sklib.py b/src/skidl/libs/zetex_sklib.py similarity index 100% rename from skidl/libs/zetex_sklib.py rename to src/skidl/libs/zetex_sklib.py diff --git a/skidl/logger.py b/src/skidl/logger.py similarity index 100% rename from skidl/logger.py rename to src/skidl/logger.py diff --git a/skidl/net.py b/src/skidl/net.py similarity index 100% rename from skidl/net.py rename to src/skidl/net.py diff --git a/skidl/netclass.py b/src/skidl/netclass.py similarity index 100% rename from skidl/netclass.py rename to src/skidl/netclass.py diff --git a/skidl/netlist_to_skidl.py b/src/skidl/netlist_to_skidl.py similarity index 100% rename from skidl/netlist_to_skidl.py rename to src/skidl/netlist_to_skidl.py diff --git a/skidl/netpinlist.py b/src/skidl/netpinlist.py similarity index 100% rename from skidl/netpinlist.py rename to src/skidl/netpinlist.py diff --git a/skidl/network.py b/src/skidl/network.py similarity index 100% rename from skidl/network.py rename to src/skidl/network.py diff --git a/skidl/note.py b/src/skidl/note.py similarity index 100% rename from skidl/note.py rename to src/skidl/note.py diff --git a/skidl/package.py b/src/skidl/package.py similarity index 100% rename from skidl/package.py rename to src/skidl/package.py diff --git a/skidl/part.py b/src/skidl/part.py similarity index 100% rename from skidl/part.py rename to src/skidl/part.py diff --git a/skidl/part_query.py b/src/skidl/part_query.py similarity index 100% rename from skidl/part_query.py rename to src/skidl/part_query.py diff --git a/skidl/pckg_info.py b/src/skidl/pckg_info.py similarity index 100% rename from skidl/pckg_info.py rename to src/skidl/pckg_info.py diff --git a/skidl/pin.py b/src/skidl/pin.py similarity index 100% rename from skidl/pin.py rename to src/skidl/pin.py diff --git a/skidl/protonet.py b/src/skidl/protonet.py similarity index 100% rename from skidl/protonet.py rename to src/skidl/protonet.py diff --git a/skidl/pyspice.py b/src/skidl/pyspice.py similarity index 100% rename from skidl/pyspice.py rename to src/skidl/pyspice.py diff --git a/skidl/schematics/__init__.py b/src/skidl/schematics/__init__.py similarity index 100% rename from skidl/schematics/__init__.py rename to src/skidl/schematics/__init__.py diff --git a/skidl/schematics/debug_draw.py b/src/skidl/schematics/debug_draw.py similarity index 100% rename from skidl/schematics/debug_draw.py rename to src/skidl/schematics/debug_draw.py diff --git a/skidl/schematics/gen_schematic.py b/src/skidl/schematics/gen_schematic.py similarity index 99% rename from skidl/schematics/gen_schematic.py rename to src/skidl/schematics/gen_schematic.py index 69ff13a4..f9a3210a 100644 --- a/skidl/schematics/gen_schematic.py +++ b/src/skidl/schematics/gen_schematic.py @@ -125,6 +125,7 @@ def calc_part_bbox(part): # Find part/unit bounding boxes excluding any net labels on pins. # TODO: part.lbl_bbox could be substituted for part.bbox. + # TODO: Part bbox should be expanded to account for reference and value labels. bare_bboxes = calc_symbol_bbox(part)[1:] for part_unit, bare_bbox in zip(units(part), bare_bboxes): diff --git a/skidl/schematics/geometry.py b/src/skidl/schematics/geometry.py similarity index 100% rename from skidl/schematics/geometry.py rename to src/skidl/schematics/geometry.py diff --git a/skidl/schematics/place.py b/src/skidl/schematics/place.py similarity index 100% rename from skidl/schematics/place.py rename to src/skidl/schematics/place.py diff --git a/skidl/schematics/route.py b/src/skidl/schematics/route.py similarity index 100% rename from skidl/schematics/route.py rename to src/skidl/schematics/route.py diff --git a/skidl/schlib.py b/src/skidl/schlib.py similarity index 100% rename from skidl/schlib.py rename to src/skidl/schlib.py diff --git a/skidl/scriptinfo.py b/src/skidl/scriptinfo.py similarity index 100% rename from skidl/scriptinfo.py rename to src/skidl/scriptinfo.py diff --git a/skidl/scripts/netlist_to_skidl_main.py b/src/skidl/scripts/netlist_to_skidl_main.py similarity index 100% rename from skidl/scripts/netlist_to_skidl_main.py rename to src/skidl/scripts/netlist_to_skidl_main.py diff --git a/skidl/skidl.py b/src/skidl/skidl.py similarity index 100% rename from skidl/skidl.py rename to src/skidl/skidl.py diff --git a/skidl/skidlbaseobj.py b/src/skidl/skidlbaseobj.py similarity index 100% rename from skidl/skidlbaseobj.py rename to src/skidl/skidlbaseobj.py diff --git a/skidl/tools/__init__.py b/src/skidl/tools/__init__.py similarity index 100% rename from skidl/tools/__init__.py rename to src/skidl/tools/__init__.py diff --git a/skidl/tools/kicad/__init__.py b/src/skidl/tools/kicad/__init__.py similarity index 100% rename from skidl/tools/kicad/__init__.py rename to src/skidl/tools/kicad/__init__.py diff --git a/skidl/tools/kicad/constants.py b/src/skidl/tools/kicad/constants.py similarity index 100% rename from skidl/tools/kicad/constants.py rename to src/skidl/tools/kicad/constants.py diff --git a/skidl/tools/kicad/eeschema_v5.py b/src/skidl/tools/kicad/eeschema_v5.py similarity index 100% rename from skidl/tools/kicad/eeschema_v5.py rename to src/skidl/tools/kicad/eeschema_v5.py diff --git a/skidl/tools/kicad/kicad.py b/src/skidl/tools/kicad/kicad.py similarity index 100% rename from skidl/tools/kicad/kicad.py rename to src/skidl/tools/kicad/kicad.py diff --git a/skidl/tools/kicad/v5.py b/src/skidl/tools/kicad/v5.py similarity index 100% rename from skidl/tools/kicad/v5.py rename to src/skidl/tools/kicad/v5.py diff --git a/skidl/tools/kicad/v6.py b/src/skidl/tools/kicad/v6.py similarity index 100% rename from skidl/tools/kicad/v6.py rename to src/skidl/tools/kicad/v6.py diff --git a/skidl/tools/skidl/__init__.py b/src/skidl/tools/skidl/__init__.py similarity index 100% rename from skidl/tools/skidl/__init__.py rename to src/skidl/tools/skidl/__init__.py diff --git a/skidl/tools/skidl/skidl.py b/src/skidl/tools/skidl/skidl.py similarity index 100% rename from skidl/tools/skidl/skidl.py rename to src/skidl/tools/skidl/skidl.py diff --git a/skidl/tools/spice/__init__.py b/src/skidl/tools/spice/__init__.py similarity index 100% rename from skidl/tools/spice/__init__.py rename to src/skidl/tools/spice/__init__.py diff --git a/skidl/tools/spice/spice.py b/src/skidl/tools/spice/spice.py similarity index 100% rename from skidl/tools/spice/spice.py rename to src/skidl/tools/spice/spice.py diff --git a/skidl/utilities.py b/src/skidl/utilities.py similarity index 100% rename from skidl/utilities.py rename to src/skidl/utilities.py diff --git a/examples/.gitignore b/tests/examples/.gitignore similarity index 100% rename from examples/.gitignore rename to tests/examples/.gitignore diff --git a/examples/bricolage/Bricolage.ipynb b/tests/examples/bricolage/Bricolage.ipynb similarity index 100% rename from examples/bricolage/Bricolage.ipynb rename to tests/examples/bricolage/Bricolage.ipynb diff --git a/examples/bricolage/briccolage_galg.py b/tests/examples/bricolage/briccolage_galg.py similarity index 100% rename from examples/bricolage/briccolage_galg.py rename to tests/examples/bricolage/briccolage_galg.py diff --git a/examples/example_empty_footprint_handler.py b/tests/examples/example_empty_footprint_handler.py similarity index 100% rename from examples/example_empty_footprint_handler.py rename to tests/examples/example_empty_footprint_handler.py diff --git a/examples/kicad_v6/test1.py b/tests/examples/kicad_v6/test1.py similarity index 100% rename from examples/kicad_v6/test1.py rename to tests/examples/kicad_v6/test1.py diff --git a/examples/schematic_draw/StickIt-VGA.py b/tests/examples/schematic_draw/StickIt-VGA.py similarity index 100% rename from examples/schematic_draw/StickIt-VGA.py rename to tests/examples/schematic_draw/StickIt-VGA.py diff --git a/examples/schematic_draw/analog_lib.py b/tests/examples/schematic_draw/analog_lib.py similarity index 100% rename from examples/schematic_draw/analog_lib.py rename to tests/examples/schematic_draw/analog_lib.py diff --git a/examples/schematic_draw/and_gate.py b/tests/examples/schematic_draw/and_gate.py similarity index 100% rename from examples/schematic_draw/and_gate.py rename to tests/examples/schematic_draw/and_gate.py diff --git a/examples/schematic_draw/charlieplexing.py b/tests/examples/schematic_draw/charlieplexing.py similarity index 100% rename from examples/schematic_draw/charlieplexing.py rename to tests/examples/schematic_draw/charlieplexing.py diff --git a/examples/schematic_draw/pmos_test.py b/tests/examples/schematic_draw/pmos_test.py similarity index 100% rename from examples/schematic_draw/pmos_test.py rename to tests/examples/schematic_draw/pmos_test.py diff --git a/examples/schematic_draw/spice_draw.py b/tests/examples/schematic_draw/spice_draw.py similarity index 100% rename from examples/schematic_draw/spice_draw.py rename to tests/examples/schematic_draw/spice_draw.py diff --git a/examples/schematic_draw/test1.py b/tests/examples/schematic_draw/test1.py similarity index 100% rename from examples/schematic_draw/test1.py rename to tests/examples/schematic_draw/test1.py diff --git a/examples/schematic_draw/test2.py b/tests/examples/schematic_draw/test2.py similarity index 100% rename from examples/schematic_draw/test2.py rename to tests/examples/schematic_draw/test2.py diff --git a/examples/schematic_draw/test3.py b/tests/examples/schematic_draw/test3.py similarity index 100% rename from examples/schematic_draw/test3.py rename to tests/examples/schematic_draw/test3.py diff --git a/examples/schematic_draw/test4.py b/tests/examples/schematic_draw/test4.py similarity index 100% rename from examples/schematic_draw/test4.py rename to tests/examples/schematic_draw/test4.py diff --git a/examples/schematic_draw/test5.py b/tests/examples/schematic_draw/test5.py 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to tests/examples/skidl_spice_test/pckg_test.py diff --git a/examples/skidl_spice_test/print_trace.py b/tests/examples/skidl_spice_test/print_trace.py similarity index 100% rename from examples/skidl_spice_test/print_trace.py rename to tests/examples/skidl_spice_test/print_trace.py diff --git a/examples/skidl_spice_test/skidl_2_pyspice_check.ipynb b/tests/examples/skidl_spice_test/skidl_2_pyspice_check.ipynb similarity index 100% rename from examples/skidl_spice_test/skidl_2_pyspice_check.ipynb rename to tests/examples/skidl_spice_test/skidl_2_pyspice_check.ipynb diff --git a/examples/skidl_spice_test/spice_deck.txt b/tests/examples/skidl_spice_test/spice_deck.txt similarity index 100% rename from examples/skidl_spice_test/spice_deck.txt rename to tests/examples/skidl_spice_test/spice_deck.txt diff --git a/examples/skidl_spice_test/test_res_cap.py b/tests/examples/skidl_spice_test/test_res_cap.py similarity index 100% rename from examples/skidl_spice_test/test_res_cap.py rename to tests/examples/skidl_spice_test/test_res_cap.py diff --git a/examples/skidl_spice_test/tlc555_test.py b/tests/examples/skidl_spice_test/tlc555_test.py similarity index 100% rename from examples/skidl_spice_test/tlc555_test.py rename to tests/examples/skidl_spice_test/tlc555_test.py diff --git a/examples/skidl_spice_test/xspice_test.py b/tests/examples/skidl_spice_test/xspice_test.py similarity index 100% rename from examples/skidl_spice_test/xspice_test.py rename to tests/examples/skidl_spice_test/xspice_test.py diff --git a/examples/skywater/custom.css b/tests/examples/skywater/custom.css similarity index 100% rename from examples/skywater/custom.css rename to tests/examples/skywater/custom.css diff --git a/examples/skywater/skywater.ipynb b/tests/examples/skywater/skywater.ipynb similarity index 100% rename from examples/skywater/skywater.ipynb rename to tests/examples/skywater/skywater.ipynb diff --git a/examples/spice-sim-intro/SpiceLib/2N2222A.lib b/tests/examples/spice-sim-intro/SpiceLib/2N2222A.lib similarity index 100% rename from examples/spice-sim-intro/SpiceLib/2N2222A.lib rename to tests/examples/spice-sim-intro/SpiceLib/2N2222A.lib diff --git a/examples/spice-sim-intro/SpiceLib/2N2901a.lib b/tests/examples/spice-sim-intro/SpiceLib/2N2901a.lib similarity index 100% rename from examples/spice-sim-intro/SpiceLib/2N2901a.lib rename to tests/examples/spice-sim-intro/SpiceLib/2N2901a.lib diff --git a/examples/spice-sim-intro/SpiceLib/NCP1117.lib b/tests/examples/spice-sim-intro/SpiceLib/NCP1117.lib similarity index 100% rename from examples/spice-sim-intro/SpiceLib/NCP1117.lib rename to tests/examples/spice-sim-intro/SpiceLib/NCP1117.lib diff --git a/examples/spice-sim-intro/SpiceLib/NCP1117.slb b/tests/examples/spice-sim-intro/SpiceLib/NCP1117.slb similarity index 100% rename from examples/spice-sim-intro/SpiceLib/NCP1117.slb rename to tests/examples/spice-sim-intro/SpiceLib/NCP1117.slb diff --git a/examples/spice-sim-intro/custom.css b/tests/examples/spice-sim-intro/custom.css similarity index 100% rename from examples/spice-sim-intro/custom.css rename to tests/examples/spice-sim-intro/custom.css diff --git a/examples/spice-sim-intro/dataflow.png b/tests/examples/spice-sim-intro/dataflow.png similarity index 100% rename from examples/spice-sim-intro/dataflow.png rename to tests/examples/spice-sim-intro/dataflow.png diff --git a/examples/spice-sim-intro/dataflow.svg b/tests/examples/spice-sim-intro/dataflow.svg similarity index 100% rename from examples/spice-sim-intro/dataflow.svg rename to tests/examples/spice-sim-intro/dataflow.svg diff --git a/examples/spice-sim-intro/notes.txt b/tests/examples/spice-sim-intro/notes.txt similarity index 100% rename from examples/spice-sim-intro/notes.txt rename to tests/examples/spice-sim-intro/notes.txt diff --git a/examples/spice-sim-intro/spice-sim-intro.ipynb b/tests/examples/spice-sim-intro/spice-sim-intro.ipynb similarity index 100% rename from examples/spice-sim-intro/spice-sim-intro.ipynb rename to tests/examples/spice-sim-intro/spice-sim-intro.ipynb diff --git a/examples/spice-sim-intro/spinit b/tests/examples/spice-sim-intro/spinit similarity index 100% rename from examples/spice-sim-intro/spinit rename to tests/examples/spice-sim-intro/spinit diff --git a/examples/spice_tests/model_test.py b/tests/examples/spice_tests/model_test.py similarity index 100% rename from examples/spice_tests/model_test.py rename to tests/examples/spice_tests/model_test.py diff --git a/examples/spice_tests/pckg_test.py b/tests/examples/spice_tests/pckg_test.py similarity index 100% rename from examples/spice_tests/pckg_test.py rename to tests/examples/spice_tests/pckg_test.py diff --git a/examples/spice_tests/skywater.py b/tests/examples/spice_tests/skywater.py similarity index 100% rename from examples/spice_tests/skywater.py rename to tests/examples/spice_tests/skywater.py diff --git a/examples/spice_tests/test_spice_subckt.py b/tests/examples/spice_tests/test_spice_subckt.py similarity index 100% rename from examples/spice_tests/test_spice_subckt.py rename to tests/examples/spice_tests/test_spice_subckt.py diff --git a/examples/stm32_usb_buck/CubeMx/CubeMx.ioc b/tests/examples/stm32_usb_buck/CubeMx/CubeMx.ioc similarity index 100% rename from examples/stm32_usb_buck/CubeMx/CubeMx.ioc rename to tests/examples/stm32_usb_buck/CubeMx/CubeMx.ioc diff --git a/examples/stm32_usb_buck/README.md b/tests/examples/stm32_usb_buck/README.md similarity index 100% rename from examples/stm32_usb_buck/README.md rename to tests/examples/stm32_usb_buck/README.md diff --git a/examples/stm32_usb_buck/connection_circuits.py b/tests/examples/stm32_usb_buck/connection_circuits.py similarity index 100% rename from examples/stm32_usb_buck/connection_circuits.py rename to tests/examples/stm32_usb_buck/connection_circuits.py diff --git a/examples/stm32_usb_buck/elkjs/elkjs.txt b/tests/examples/stm32_usb_buck/elkjs/elkjs.txt similarity index 100% rename from examples/stm32_usb_buck/elkjs/elkjs.txt rename to tests/examples/stm32_usb_buck/elkjs/elkjs.txt diff --git a/examples/stm32_usb_buck/main.py b/tests/examples/stm32_usb_buck/main.py similarity index 100% rename from examples/stm32_usb_buck/main.py rename to tests/examples/stm32_usb_buck/main.py diff --git a/examples/stm32_usb_buck/power_circuits.py b/tests/examples/stm32_usb_buck/power_circuits.py similarity index 100% rename from examples/stm32_usb_buck/power_circuits.py rename to tests/examples/stm32_usb_buck/power_circuits.py diff --git a/examples/stm32_usb_buck/power_nets.py b/tests/examples/stm32_usb_buck/power_nets.py similarity index 100% rename from examples/stm32_usb_buck/power_nets.py rename to tests/examples/stm32_usb_buck/power_nets.py diff --git a/examples/stm32_usb_buck/stm32/stm32.kicad_pcb b/tests/examples/stm32_usb_buck/stm32/stm32.kicad_pcb similarity index 100% rename from examples/stm32_usb_buck/stm32/stm32.kicad_pcb rename to tests/examples/stm32_usb_buck/stm32/stm32.kicad_pcb diff --git a/examples/stm32_usb_buck/stm32/stm32.kicad_pcb-bak b/tests/examples/stm32_usb_buck/stm32/stm32.kicad_pcb-bak similarity index 100% rename from examples/stm32_usb_buck/stm32/stm32.kicad_pcb-bak rename to tests/examples/stm32_usb_buck/stm32/stm32.kicad_pcb-bak diff --git a/examples/stm32_usb_buck/stm32/stm32.pro b/tests/examples/stm32_usb_buck/stm32/stm32.pro similarity index 100% rename from examples/stm32_usb_buck/stm32/stm32.pro rename to tests/examples/stm32_usb_buck/stm32/stm32.pro diff --git a/examples/stm32_usb_buck/stm32_circuit.py b/tests/examples/stm32_usb_buck/stm32_circuit.py similarity index 100% rename from examples/stm32_usb_buck/stm32_circuit.py rename to tests/examples/stm32_usb_buck/stm32_circuit.py diff --git a/examples/stm32_usb_buck/utility_circuits.py b/tests/examples/stm32_usb_buck/utility_circuits.py similarity index 100% rename from examples/stm32_usb_buck/utility_circuits.py rename to tests/examples/stm32_usb_buck/utility_circuits.py diff --git a/tox.ini b/tox.ini index 4dae4672..fdee5ddc 100644 --- a/tox.ini +++ b/tox.ini @@ -115,6 +115,9 @@ deps = ; -r {toxinidir}/docs/requirements.txt # ^ requirements.txt shared with Read The Docs # This causes doctests to fail. Don't know why. +allowlist_externals = + make + sphinx-build commands = docs: make -C {env:DOCSRC}/pelicansite {env:BUILD} docs: make -C {env:DOCSRC}/sphinx html