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Tom Chungsmb49
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drm/amd/display: Change some variable name of psr
BugLink: https://bugs.launchpad.net/bugs/2101042 commit b8d9d5fef4915a383b4ce4d0f418352aa4701a87 upstream. Panel Replay feature may also use the same variable with PSR. Change the variable name and make it not specify for PSR. Reviewed-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit c7fafb7a46b38a11a19342d153f505749bf56f3e) Cc: stable@vger.kernel.org # 6.11+ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Manuel Diewald <manuel.diewald@canonical.com> Signed-off-by: Stefan Bader <stefan.bader@canonical.com>
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-14
lines changed

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-14
lines changed

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

Lines changed: 11 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -6345,7 +6345,7 @@ create_stream_for_sink(struct drm_connector *connector,
63456345
if (stream->out_transfer_func->tf == TRANSFER_FUNCTION_GAMMA22)
63466346
tf = TRANSFER_FUNC_GAMMA_22;
63476347
mod_build_vsc_infopacket(stream, &stream->vsc_infopacket, stream->output_color_space, tf);
6348-
aconnector->psr_skip_count = AMDGPU_DM_PSR_ENTRY_DELAY;
6348+
aconnector->sr_skip_count = AMDGPU_DM_PSR_ENTRY_DELAY;
63496349

63506350
}
63516351
finish:
@@ -8509,7 +8509,7 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
85098509
* during the PSR-SU was disabled.
85108510
*/
85118511
if (acrtc_state->stream->link->psr_settings.psr_version >= DC_PSR_VERSION_SU_1 &&
8512-
acrtc_attach->dm_irq_params.allow_psr_entry &&
8512+
acrtc_attach->dm_irq_params.allow_sr_entry &&
85138513
#ifdef CONFIG_DRM_AMD_SECURE_DISPLAY
85148514
!amdgpu_dm_crc_window_is_activated(acrtc_state->base.crtc) &&
85158515
#endif
@@ -8731,27 +8731,27 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
87318731
!acrtc_state->stream->link->psr_settings.psr_feature_enabled)
87328732
amdgpu_dm_link_setup_psr(acrtc_state->stream);
87338733

8734-
/* Decrement skip count when PSR is enabled and we're doing fast updates. */
8734+
/* Decrement skip count when SR is enabled and we're doing fast updates. */
87358735
if (acrtc_state->update_type == UPDATE_TYPE_FAST &&
87368736
acrtc_state->stream->link->psr_settings.psr_feature_enabled) {
87378737
struct amdgpu_dm_connector *aconn =
87388738
(struct amdgpu_dm_connector *)acrtc_state->stream->dm_stream_context;
87398739

8740-
if (aconn->psr_skip_count > 0)
8741-
aconn->psr_skip_count--;
8740+
if (aconn->sr_skip_count > 0)
8741+
aconn->sr_skip_count--;
87428742

8743-
/* Allow PSR when skip count is 0. */
8744-
acrtc_attach->dm_irq_params.allow_psr_entry = !aconn->psr_skip_count;
8743+
/* Allow SR when skip count is 0. */
8744+
acrtc_attach->dm_irq_params.allow_sr_entry = !aconn->sr_skip_count;
87458745

87468746
/*
8747-
* If sink supports PSR SU, there is no need to rely on
8748-
* a vblank event disable request to enable PSR. PSR SU
8747+
* If sink supports PSR SU/Panel Replay, there is no need to rely on
8748+
* a vblank event disable request to enable PSR/RP. PSR SU/RP
87498749
* can be enabled immediately once OS demonstrates an
87508750
* adequate number of fast atomic commits to notify KMD
87518751
* of update events. See `vblank_control_worker()`.
87528752
*/
87538753
if (acrtc_state->stream->link->psr_settings.psr_version >= DC_PSR_VERSION_SU_1 &&
8754-
acrtc_attach->dm_irq_params.allow_psr_entry &&
8754+
acrtc_attach->dm_irq_params.allow_sr_entry &&
87558755
#ifdef CONFIG_DRM_AMD_SECURE_DISPLAY
87568756
!amdgpu_dm_crc_window_is_activated(acrtc_state->base.crtc) &&
87578757
#endif
@@ -8761,7 +8761,7 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
87618761
500000000)
87628762
amdgpu_dm_psr_enable(acrtc_state->stream);
87638763
} else {
8764-
acrtc_attach->dm_irq_params.allow_psr_entry = false;
8764+
acrtc_attach->dm_irq_params.allow_sr_entry = false;
87658765
}
87668766

87678767
mutex_unlock(&dm->dc_lock);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -692,7 +692,7 @@ struct amdgpu_dm_connector {
692692
/* Cached display modes */
693693
struct drm_display_mode freesync_vid_base;
694694

695-
int psr_skip_count;
695+
int sr_skip_count;
696696

697697
/* Record progress status of mst*/
698698
uint8_t mst_status;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -133,7 +133,7 @@ static void amdgpu_dm_crtc_vblank_control_worker(struct work_struct *work)
133133
#ifdef CONFIG_DRM_AMD_SECURE_DISPLAY
134134
!amdgpu_dm_crc_window_is_activated(&vblank_work->acrtc->base) &&
135135
#endif
136-
vblank_work->acrtc->dm_irq_params.allow_psr_entry) {
136+
vblank_work->acrtc->dm_irq_params.allow_sr_entry) {
137137
amdgpu_dm_psr_enable(vblank_work->stream);
138138
}
139139
}

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq_params.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -33,7 +33,7 @@ struct dm_irq_params {
3333
struct mod_vrr_params vrr_params;
3434
struct dc_stream_state *stream;
3535
int active_planes;
36-
bool allow_psr_entry;
36+
bool allow_sr_entry;
3737
struct mod_freesync_config freesync_config;
3838

3939
#ifdef CONFIG_DEBUG_FS

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