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maorgottliebSaeed Mahameed
maorgottlieb
authored and
Saeed Mahameed
committed
net/mlx5: Introduce port selection namespace
Add new port selection flow steering namespace. Flow steering rules in this namespaceare are used to determine the physical port for egress packets. Signed-off-by: Maor Gottlieb <maorg@nvidia.com> Reviewed-by: Mark Bloch <mbloch@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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8 files changed

+78
-4
lines changed

8 files changed

+78
-4
lines changed

‎drivers/net/ethernet/mellanox/mlx5/core/fs_cmd.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -969,6 +969,7 @@ const struct mlx5_flow_cmds *mlx5_fs_cmd_get_default(enum fs_flow_table_type typ
969969
case FS_FT_NIC_TX:
970970
case FS_FT_RDMA_RX:
971971
case FS_FT_RDMA_TX:
972+
case FS_FT_PORT_SEL:
972973
return mlx5_fs_cmd_get_fw_cmds();
973974
default:
974975
return mlx5_fs_cmd_get_stub_cmds();

‎drivers/net/ethernet/mellanox/mlx5/core/fs_core.c

Lines changed: 26 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2191,6 +2191,10 @@ struct mlx5_flow_namespace *mlx5_get_flow_namespace(struct mlx5_core_dev *dev,
21912191
if (steering->fdb_root_ns)
21922192
return &steering->fdb_root_ns->ns;
21932193
return NULL;
2194+
case MLX5_FLOW_NAMESPACE_PORT_SEL:
2195+
if (steering->port_sel_root_ns)
2196+
return &steering->port_sel_root_ns->ns;
2197+
return NULL;
21942198
case MLX5_FLOW_NAMESPACE_SNIFFER_RX:
21952199
if (steering->sniffer_rx_root_ns)
21962200
return &steering->sniffer_rx_root_ns->ns;
@@ -2596,6 +2600,7 @@ void mlx5_cleanup_fs(struct mlx5_core_dev *dev)
25962600
steering->fdb_root_ns = NULL;
25972601
kfree(steering->fdb_sub_ns);
25982602
steering->fdb_sub_ns = NULL;
2603+
cleanup_root_ns(steering->port_sel_root_ns);
25992604
cleanup_root_ns(steering->sniffer_rx_root_ns);
26002605
cleanup_root_ns(steering->sniffer_tx_root_ns);
26012606
cleanup_root_ns(steering->rdma_rx_root_ns);
@@ -2634,6 +2639,21 @@ static int init_sniffer_rx_root_ns(struct mlx5_flow_steering *steering)
26342639
return PTR_ERR_OR_ZERO(prio);
26352640
}
26362641

2642+
#define PORT_SEL_NUM_LEVELS 3
2643+
static int init_port_sel_root_ns(struct mlx5_flow_steering *steering)
2644+
{
2645+
struct fs_prio *prio;
2646+
2647+
steering->port_sel_root_ns = create_root_ns(steering, FS_FT_PORT_SEL);
2648+
if (!steering->port_sel_root_ns)
2649+
return -ENOMEM;
2650+
2651+
/* Create single prio */
2652+
prio = fs_create_prio(&steering->port_sel_root_ns->ns, 0,
2653+
PORT_SEL_NUM_LEVELS);
2654+
return PTR_ERR_OR_ZERO(prio);
2655+
}
2656+
26372657
static int init_rdma_rx_root_ns(struct mlx5_flow_steering *steering)
26382658
{
26392659
int err;
@@ -3020,6 +3040,12 @@ int mlx5_init_fs(struct mlx5_core_dev *dev)
30203040
goto err;
30213041
}
30223042

3043+
if (MLX5_CAP_FLOWTABLE_PORT_SELECTION(dev, ft_support)) {
3044+
err = init_port_sel_root_ns(steering);
3045+
if (err)
3046+
goto err;
3047+
}
3048+
30233049
if (MLX5_CAP_FLOWTABLE_RDMA_RX(dev, ft_support) &&
30243050
MLX5_CAP_FLOWTABLE_RDMA_RX(dev, table_miss_action_domain)) {
30253051
err = init_rdma_rx_root_ns(steering);

‎drivers/net/ethernet/mellanox/mlx5/core/fs_core.h

Lines changed: 5 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -97,7 +97,8 @@ enum fs_flow_table_type {
9797
FS_FT_SNIFFER_TX = 0X6,
9898
FS_FT_RDMA_RX = 0X7,
9999
FS_FT_RDMA_TX = 0X8,
100-
FS_FT_MAX_TYPE = FS_FT_RDMA_TX,
100+
FS_FT_PORT_SEL = 0X9,
101+
FS_FT_MAX_TYPE = FS_FT_PORT_SEL,
101102
};
102103

103104
enum fs_flow_table_op_mod {
@@ -129,6 +130,7 @@ struct mlx5_flow_steering {
129130
struct mlx5_flow_root_namespace *rdma_rx_root_ns;
130131
struct mlx5_flow_root_namespace *rdma_tx_root_ns;
131132
struct mlx5_flow_root_namespace *egress_root_ns;
133+
struct mlx5_flow_root_namespace *port_sel_root_ns;
132134
int esw_egress_acl_vports;
133135
int esw_ingress_acl_vports;
134136
};
@@ -341,7 +343,8 @@ struct mlx5_flow_root_namespace *find_root(struct fs_node *node);
341343
(type == FS_FT_SNIFFER_TX) ? MLX5_CAP_FLOWTABLE_SNIFFER_TX(mdev, cap) : \
342344
(type == FS_FT_RDMA_RX) ? MLX5_CAP_FLOWTABLE_RDMA_RX(mdev, cap) : \
343345
(type == FS_FT_RDMA_TX) ? MLX5_CAP_FLOWTABLE_RDMA_TX(mdev, cap) : \
344-
(BUILD_BUG_ON_ZERO(FS_FT_RDMA_TX != FS_FT_MAX_TYPE))\
346+
(type == FS_FT_PORT_SEL) ? MLX5_CAP_FLOWTABLE_PORT_SELECTION(mdev, cap) : \
347+
(BUILD_BUG_ON_ZERO(FS_FT_PORT_SEL != FS_FT_MAX_TYPE))\
345348
)
346349

347350
#endif

‎drivers/net/ethernet/mellanox/mlx5/core/fw.c

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -149,6 +149,12 @@ int mlx5_query_hca_caps(struct mlx5_core_dev *dev)
149149
if (err)
150150
return err;
151151

152+
if (MLX5_CAP_GEN(dev, port_selection_cap)) {
153+
err = mlx5_core_get_caps(dev, MLX5_CAP_PORT_SELECTION);
154+
if (err)
155+
return err;
156+
}
157+
152158
if (MLX5_CAP_GEN(dev, hca_cap_2)) {
153159
err = mlx5_core_get_caps(dev, MLX5_CAP_GENERAL_2);
154160
if (err)

‎drivers/net/ethernet/mellanox/mlx5/core/main.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1416,6 +1416,7 @@ static const int types[] = {
14161416
MLX5_CAP_TLS,
14171417
MLX5_CAP_VDPA_EMULATION,
14181418
MLX5_CAP_IPSEC,
1419+
MLX5_CAP_PORT_SELECTION,
14191420
};
14201421

14211422
static void mlx5_hca_caps_free(struct mlx5_core_dev *dev)

‎include/linux/mlx5/device.h

Lines changed: 15 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1185,6 +1185,7 @@ enum mlx5_cap_type {
11851185
MLX5_CAP_DEV_EVENT = 0x14,
11861186
MLX5_CAP_IPSEC,
11871187
MLX5_CAP_GENERAL_2 = 0x20,
1188+
MLX5_CAP_PORT_SELECTION = 0x25,
11881189
/* NUM OF CAP Types */
11891190
MLX5_CAP_NUM
11901191
};
@@ -1342,6 +1343,20 @@ enum mlx5_qcam_feature_groups {
13421343
MLX5_GET(e_switch_cap, \
13431344
mdev->caps.hca[MLX5_CAP_ESWITCH]->max, cap)
13441345

1346+
#define MLX5_CAP_PORT_SELECTION(mdev, cap) \
1347+
MLX5_GET(port_selection_cap, \
1348+
mdev->caps.hca[MLX5_CAP_PORT_SELECTION]->cur, cap)
1349+
1350+
#define MLX5_CAP_PORT_SELECTION_MAX(mdev, cap) \
1351+
MLX5_GET(port_selection_cap, \
1352+
mdev->caps.hca[MLX5_CAP_PORT_SELECTION]->max, cap)
1353+
1354+
#define MLX5_CAP_FLOWTABLE_PORT_SELECTION(mdev, cap) \
1355+
MLX5_CAP_PORT_SELECTION(mdev, flow_table_properties_port_selection.cap)
1356+
1357+
#define MLX5_CAP_FLOWTABLE_PORT_SELECTION_MAX(mdev, cap) \
1358+
MLX5_CAP_PORT_SELECTION_MAX(mdev, flow_table_properties_port_selection.cap)
1359+
13451360
#define MLX5_CAP_ODP(mdev, cap)\
13461361
MLX5_GET(odp_cap, mdev->caps.hca[MLX5_CAP_ODP]->cur, cap)
13471362

‎include/linux/mlx5/fs.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -83,6 +83,7 @@ enum mlx5_flow_namespace_type {
8383
MLX5_FLOW_NAMESPACE_RDMA_RX,
8484
MLX5_FLOW_NAMESPACE_RDMA_RX_KERNEL,
8585
MLX5_FLOW_NAMESPACE_RDMA_TX,
86+
MLX5_FLOW_NAMESPACE_PORT_SEL,
8687
};
8788

8889
enum {

‎include/linux/mlx5/mlx5_ifc.h

Lines changed: 23 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -767,6 +767,18 @@ struct mlx5_ifc_flow_table_nic_cap_bits {
767767
u8 reserved_at_20c0[0x5f40];
768768
};
769769

770+
struct mlx5_ifc_port_selection_cap_bits {
771+
u8 reserved_at_0[0x10];
772+
u8 port_select_flow_table[0x1];
773+
u8 reserved_at_11[0xf];
774+
775+
u8 reserved_at_20[0x1e0];
776+
777+
struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_port_selection;
778+
779+
u8 reserved_at_400[0x7c00];
780+
};
781+
770782
enum {
771783
MLX5_FDB_TO_VPORT_REG_C_0 = 0x01,
772784
MLX5_FDB_TO_VPORT_REG_C_1 = 0x02,
@@ -1515,7 +1527,8 @@ struct mlx5_ifc_cmd_hca_cap_bits {
15151527
u8 uar_4k[0x1];
15161528
u8 reserved_at_241[0x9];
15171529
u8 uar_sz[0x6];
1518-
u8 reserved_at_248[0x2];
1530+
u8 port_selection_cap[0x1];
1531+
u8 reserved_at_248[0x1];
15191532
u8 umem_uid_0[0x1];
15201533
u8 reserved_at_250[0x5];
15211534
u8 log_pg_sz[0x8];
@@ -3164,6 +3177,7 @@ union mlx5_ifc_hca_cap_union_bits {
31643177
struct mlx5_ifc_flow_table_nic_cap_bits flow_table_nic_cap;
31653178
struct mlx5_ifc_flow_table_eswitch_cap_bits flow_table_eswitch_cap;
31663179
struct mlx5_ifc_e_switch_cap_bits e_switch_cap;
3180+
struct mlx5_ifc_port_selection_cap_bits port_selection_cap;
31673181
struct mlx5_ifc_vector_calc_cap_bits vector_calc_cap;
31683182
struct mlx5_ifc_qos_cap_bits qos_cap;
31693183
struct mlx5_ifc_debug_cap_bits debug_cap;
@@ -10434,9 +10448,16 @@ struct mlx5_ifc_dcbx_param_bits {
1043410448
u8 reserved_at_a0[0x160];
1043510449
};
1043610450

10451+
enum {
10452+
MLX5_LAG_PORT_SELECT_MODE_QUEUE_AFFINITY = 0,
10453+
MLX5_LAG_PORT_SELECT_MODE_PORT_SELECT_FT,
10454+
};
10455+
1043710456
struct mlx5_ifc_lagc_bits {
1043810457
u8 fdb_selection_mode[0x1];
10439-
u8 reserved_at_1[0x1c];
10458+
u8 reserved_at_1[0x14];
10459+
u8 port_select_mode[0x3];
10460+
u8 reserved_at_18[0x5];
1044010461
u8 lag_state[0x3];
1044110462

1044210463
u8 reserved_at_20[0x14];

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