@@ -541,6 +541,8 @@ struct nqe_cn {
541
541
#define NQ_CN_TYPE_SFT 0
542
542
#define NQ_CN_TYPE_CQ_NOTIFICATION 0x30UL
543
543
#define NQ_CN_TYPE_LAST NQ_CN_TYPE_CQ_NOTIFICATION
544
+ #define NQ_CN_TOGGLE_MASK 0xc0UL
545
+ #define NQ_CN_TOGGLE_SFT 6
544
546
__le16 reserved16 ;
545
547
__le32 cq_handle_low ;
546
548
__le32 v ;
@@ -561,6 +563,10 @@ struct nqe_cn {
561
563
#define BNXT_SET_NQ_HDL (cpr ) \
562
564
(((cpr)->cp_ring_type << BNXT_NQ_HDL_TYPE_SHIFT) | (cpr)->cp_idx)
563
565
566
+ #define NQE_CN_TYPE (type ) ((type) & NQ_CN_TYPE_MASK)
567
+ #define NQE_CN_TOGGLE (type ) (((type) & NQ_CN_TOGGLE_MASK) >> \
568
+ NQ_CN_TOGGLE_SFT)
569
+
564
570
#define DB_IDX_MASK 0xffffff
565
571
#define DB_IDX_VALID (0x1 << 26)
566
572
#define DB_IRQ_DIS (0x1 << 27)
@@ -576,9 +582,14 @@ struct nqe_cn {
576
582
577
583
/* 64-bit doorbell */
578
584
#define DBR_INDEX_MASK 0x0000000000ffffffULL
585
+ #define DBR_EPOCH_MASK 0x01000000UL
586
+ #define DBR_EPOCH_SFT 24
587
+ #define DBR_TOGGLE_MASK 0x06000000UL
588
+ #define DBR_TOGGLE_SFT 25
579
589
#define DBR_XID_MASK 0x000fffff00000000ULL
580
590
#define DBR_XID_SFT 32
581
591
#define DBR_PATH_L2 (0x1ULL << 56)
592
+ #define DBR_VALID (0x1ULL << 58)
582
593
#define DBR_TYPE_SQ (0x0ULL << 60)
583
594
#define DBR_TYPE_RQ (0x1ULL << 60)
584
595
#define DBR_TYPE_SRQ (0x2ULL << 60)
@@ -591,6 +602,7 @@ struct nqe_cn {
591
602
#define DBR_TYPE_CQ_CUTOFF_ACK (0x9ULL << 60)
592
603
#define DBR_TYPE_NQ (0xaULL << 60)
593
604
#define DBR_TYPE_NQ_ARM (0xbULL << 60)
605
+ #define DBR_TYPE_NQ_MASK (0xeULL << 60)
594
606
#define DBR_TYPE_NULL (0xfULL << 60)
595
607
596
608
#define DB_PF_OFFSET_P5 0x10000
@@ -819,9 +831,17 @@ struct bnxt_db_info {
819
831
u32 db_key32 ;
820
832
};
821
833
u32 db_ring_mask ;
834
+ u32 db_epoch_mask ;
835
+ u8 db_epoch_shift ;
822
836
};
823
837
824
- #define DB_RING_IDX (db , idx ) ((idx) & (db)->db_ring_mask)
838
+ #define DB_EPOCH (db , idx ) (((idx) & (db)->db_epoch_mask) << \
839
+ ((db)->db_epoch_shift))
840
+
841
+ #define DB_TOGGLE (tgl ) ((tgl) << DBR_TOGGLE_SFT)
842
+
843
+ #define DB_RING_IDX (db , idx ) (((idx) & (db)->db_ring_mask) | \
844
+ DB_EPOCH(db, idx))
825
845
826
846
struct bnxt_tx_ring_info {
827
847
struct bnxt_napi * bnapi ;
@@ -1803,14 +1823,14 @@ struct bnxt {
1803
1823
#define CHIP_NUM_57504 0x1751
1804
1824
#define CHIP_NUM_57502 0x1752
1805
1825
1826
+ #define CHIP_NUM_57608 0x1760
1827
+
1806
1828
#define CHIP_NUM_58802 0xd802
1807
1829
#define CHIP_NUM_58804 0xd804
1808
1830
#define CHIP_NUM_58808 0xd808
1809
1831
1810
1832
u8 chip_rev ;
1811
1833
1812
- #define CHIP_NUM_58818 0xd818
1813
-
1814
1834
#define BNXT_CHIP_NUM_5730X (chip_num ) \
1815
1835
((chip_num) >= CHIP_NUM_57301 && \
1816
1836
(chip_num) <= CHIP_NUM_57304)
@@ -1888,7 +1908,7 @@ struct bnxt {
1888
1908
BNXT_FLAG_ROCEV2_CAP)
1889
1909
#define BNXT_FLAG_NO_AGG_RINGS 0x20000
1890
1910
#define BNXT_FLAG_RX_PAGE_MODE 0x40000
1891
- #define BNXT_FLAG_CHIP_SR2 0x80000
1911
+ #define BNXT_FLAG_CHIP_P7 0x80000
1892
1912
#define BNXT_FLAG_MULTI_HOST 0x100000
1893
1913
#define BNXT_FLAG_DSN_VALID 0x200000
1894
1914
#define BNXT_FLAG_DOUBLE_DB 0x400000
@@ -1918,8 +1938,8 @@ struct bnxt {
1918
1938
(bp)->max_tpa_v2) && !is_kdump_kernel())
1919
1939
#define BNXT_RX_JUMBO_MODE (bp ) ((bp)->flags & BNXT_FLAG_JUMBO)
1920
1940
1921
- #define BNXT_CHIP_SR2 (bp ) \
1922
- ((bp)->chip_num == CHIP_NUM_58818 )
1941
+ #define BNXT_CHIP_P7 (bp ) \
1942
+ ((bp)->chip_num == CHIP_NUM_57608 )
1923
1943
1924
1944
#define BNXT_CHIP_P5 (bp ) \
1925
1945
((bp)->chip_num == CHIP_NUM_57508 || \
@@ -1928,7 +1948,7 @@ struct bnxt {
1928
1948
1929
1949
/* Chip class phase 5 */
1930
1950
#define BNXT_CHIP_P5_PLUS (bp ) \
1931
- (BNXT_CHIP_P5(bp) || BNXT_CHIP_SR2 (bp))
1951
+ (BNXT_CHIP_P5(bp) || BNXT_CHIP_P7 (bp))
1932
1952
1933
1953
/* Chip class phase 4.x */
1934
1954
#define BNXT_CHIP_P4 (bp ) \
@@ -2272,15 +2292,15 @@ struct bnxt {
2272
2292
#define BNXT_NUM_TX_RING_STATS 8
2273
2293
#define BNXT_NUM_TPA_RING_STATS 4
2274
2294
#define BNXT_NUM_TPA_RING_STATS_P5 5
2275
- #define BNXT_NUM_TPA_RING_STATS_P5_SR2 6
2295
+ #define BNXT_NUM_TPA_RING_STATS_P7 6
2276
2296
2277
2297
#define BNXT_RING_STATS_SIZE_P5 \
2278
2298
((BNXT_NUM_RX_RING_STATS + BNXT_NUM_TX_RING_STATS + \
2279
2299
BNXT_NUM_TPA_RING_STATS_P5) * 8)
2280
2300
2281
- #define BNXT_RING_STATS_SIZE_P5_SR2 \
2301
+ #define BNXT_RING_STATS_SIZE_P7 \
2282
2302
((BNXT_NUM_RX_RING_STATS + BNXT_NUM_TX_RING_STATS + \
2283
- BNXT_NUM_TPA_RING_STATS_P5_SR2 ) * 8)
2303
+ BNXT_NUM_TPA_RING_STATS_P7 ) * 8)
2284
2304
2285
2305
#define BNXT_GET_RING_STATS64 (sw , counter ) \
2286
2306
(*((sw) + offsetof(struct ctx_hw_stats, counter) / 8))
0 commit comments