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npigginmpe
npiggin
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powerpc/64s/exception: move SET_SCRATCH0 into EXCEPTION_PROLOG_0
No generated code change. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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‎arch/powerpc/kernel/exceptions-64s.S‎

Lines changed: 1 addition & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -128,6 +128,7 @@ BEGIN_FTR_SECTION_NESTED(943) \
128128
END_FTR_SECTION_NESTED(ftr,ftr,943)
129129

130130
.macro EXCEPTION_PROLOG_0 area
131+
SET_SCRATCH0(r13) /* save r13 */
131132
GET_PACA(r13)
132133
std r9,\area\()+EX_R9(r13) /* save r9 */
133134
OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR)
@@ -547,7 +548,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
547548

548549
#define __EXC_REAL(name, start, size, area) \
549550
EXC_REAL_BEGIN(name, start, size); \
550-
SET_SCRATCH0(r13); /* save r13 */ \
551551
EXCEPTION_PROLOG_0 area ; \
552552
EXCEPTION_PROLOG_1 EXC_STD, area, 1, start, 0, 0, 0 ; \
553553
EXCEPTION_PROLOG_2_REAL name##_common, EXC_STD, 1 ; \
@@ -558,7 +558,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
558558

559559
#define __EXC_VIRT(name, start, size, realvec, area) \
560560
EXC_VIRT_BEGIN(name, start, size); \
561-
SET_SCRATCH0(r13); /* save r13 */ \
562561
EXCEPTION_PROLOG_0 area ; \
563562
EXCEPTION_PROLOG_1 EXC_STD, area, 0, realvec, 0, 0, 0; \
564563
EXCEPTION_PROLOG_2_VIRT name##_common, EXC_STD ; \
@@ -569,39 +568,34 @@ END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
569568

570569
#define EXC_REAL_MASKABLE(name, start, size, bitmask) \
571570
EXC_REAL_BEGIN(name, start, size); \
572-
SET_SCRATCH0(r13); /* save r13 */ \
573571
EXCEPTION_PROLOG_0 PACA_EXGEN ; \
574572
EXCEPTION_PROLOG_1 EXC_STD, PACA_EXGEN, 1, start, 0, 0, bitmask ; \
575573
EXCEPTION_PROLOG_2_REAL name##_common, EXC_STD, 1 ; \
576574
EXC_REAL_END(name, start, size)
577575

578576
#define EXC_VIRT_MASKABLE(name, start, size, realvec, bitmask) \
579577
EXC_VIRT_BEGIN(name, start, size); \
580-
SET_SCRATCH0(r13); /* save r13 */ \
581578
EXCEPTION_PROLOG_0 PACA_EXGEN ; \
582579
EXCEPTION_PROLOG_1 EXC_STD, PACA_EXGEN, 0, realvec, 0, 0, bitmask ; \
583580
EXCEPTION_PROLOG_2_VIRT name##_common, EXC_STD ; \
584581
EXC_VIRT_END(name, start, size)
585582

586583
#define EXC_REAL_HV(name, start, size) \
587584
EXC_REAL_BEGIN(name, start, size); \
588-
SET_SCRATCH0(r13); /* save r13 */ \
589585
EXCEPTION_PROLOG_0 PACA_EXGEN; \
590586
EXCEPTION_PROLOG_1 EXC_HV, PACA_EXGEN, 1, start, 0, 0, 0 ; \
591587
EXCEPTION_PROLOG_2_REAL name##_common, EXC_HV, 1 ; \
592588
EXC_REAL_END(name, start, size)
593589

594590
#define EXC_VIRT_HV(name, start, size, realvec) \
595591
EXC_VIRT_BEGIN(name, start, size); \
596-
SET_SCRATCH0(r13); /* save r13 */ \
597592
EXCEPTION_PROLOG_0 PACA_EXGEN; \
598593
EXCEPTION_PROLOG_1 EXC_HV, PACA_EXGEN, 1, realvec, 0, 0, 0 ; \
599594
EXCEPTION_PROLOG_2_VIRT name##_common, EXC_HV ; \
600595
EXC_VIRT_END(name, start, size)
601596

602597
#define __EXC_REAL_OOL(name, start, size) \
603598
EXC_REAL_BEGIN(name, start, size); \
604-
SET_SCRATCH0(r13); \
605599
EXCEPTION_PROLOG_0 PACA_EXGEN ; \
606600
b tramp_real_##name ; \
607601
EXC_REAL_END(name, start, size)
@@ -629,7 +623,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
629623

630624
#define __EXC_REAL_OOL_HV_DIRECT(name, start, size, handler) \
631625
EXC_REAL_BEGIN(name, start, size); \
632-
SET_SCRATCH0(r13); \
633626
EXCEPTION_PROLOG_0 PACA_EXGEN ; \
634627
b handler; \
635628
EXC_REAL_END(name, start, size)
@@ -660,7 +653,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
660653

661654
#define __EXC_VIRT_OOL(name, start, size) \
662655
EXC_VIRT_BEGIN(name, start, size); \
663-
SET_SCRATCH0(r13); \
664656
EXCEPTION_PROLOG_0 PACA_EXGEN ; \
665657
b tramp_virt_##name; \
666658
EXC_VIRT_END(name, start, size)
@@ -837,7 +829,6 @@ EXC_VIRT_NONE(0x4000, 0x100)
837829

838830

839831
EXC_REAL_BEGIN(system_reset, 0x100, 0x100)
840-
SET_SCRATCH0(r13)
841832
EXCEPTION_PROLOG_0 PACA_EXNMI
842833

843834
/* This is EXCEPTION_PROLOG_1 with the idle feature section added */
@@ -955,7 +946,6 @@ EXC_COMMON_BEGIN(system_reset_common)
955946
* Vectors for the FWNMI option. Share common code.
956947
*/
957948
TRAMP_REAL_BEGIN(system_reset_fwnmi)
958-
SET_SCRATCH0(r13) /* save r13 */
959949
/* See comment at system_reset exception, don't turn on RI */
960950
EXCEPTION_PROLOG_0 PACA_EXNMI
961951
EXCEPTION_PROLOG_1 EXC_STD, PACA_EXNMI, 0, 0x100, 0, 0, 0
@@ -969,7 +959,6 @@ EXC_REAL_BEGIN(machine_check, 0x200, 0x100)
969959
* some code path might still want to branch into the original
970960
* vector
971961
*/
972-
SET_SCRATCH0(r13) /* save r13 */
973962
EXCEPTION_PROLOG_0 PACA_EXMC
974963
BEGIN_FTR_SECTION
975964
b machine_check_common_early
@@ -1058,7 +1047,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
10581047
TRAMP_REAL_BEGIN(machine_check_pSeries)
10591048
.globl machine_check_fwnmi
10601049
machine_check_fwnmi:
1061-
SET_SCRATCH0(r13) /* save r13 */
10621050
EXCEPTION_PROLOG_0 PACA_EXMC
10631051
BEGIN_FTR_SECTION
10641052
b machine_check_common_early
@@ -1246,7 +1234,6 @@ ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
12461234
9:
12471235
/* Deliver the machine check to host kernel in V mode. */
12481236
MACHINE_CHECK_HANDLER_WINDUP
1249-
SET_SCRATCH0(r13) /* save r13 */
12501237
EXCEPTION_PROLOG_0 PACA_EXMC
12511238
b machine_check_pSeries_0
12521239

@@ -1271,7 +1258,6 @@ EXC_COMMON_BEGIN(mce_return)
12711258
b .
12721259

12731260
EXC_REAL_BEGIN(data_access, 0x300, 0x80)
1274-
SET_SCRATCH0(r13) /* save r13 */
12751261
EXCEPTION_PROLOG_0 PACA_EXGEN
12761262
b tramp_real_data_access
12771263
EXC_REAL_END(data_access, 0x300, 0x80)
@@ -1281,7 +1267,6 @@ TRAMP_REAL_BEGIN(tramp_real_data_access)
12811267
EXCEPTION_PROLOG_2_REAL data_access_common, EXC_STD, 1
12821268

12831269
EXC_VIRT_BEGIN(data_access, 0x4300, 0x80)
1284-
SET_SCRATCH0(r13) /* save r13 */
12851270
EXCEPTION_PROLOG_0 PACA_EXGEN
12861271
EXCEPTION_PROLOG_1 EXC_STD, PACA_EXGEN, 0, 0x300, 1, 1, 0
12871272
EXCEPTION_PROLOG_2_VIRT data_access_common, EXC_STD
@@ -1312,7 +1297,6 @@ ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_TYPE_RADIX)
13121297

13131298

13141299
EXC_REAL_BEGIN(data_access_slb, 0x380, 0x80)
1315-
SET_SCRATCH0(r13) /* save r13 */
13161300
EXCEPTION_PROLOG_0 PACA_EXSLB
13171301
b tramp_real_data_access_slb
13181302
EXC_REAL_END(data_access_slb, 0x380, 0x80)
@@ -1322,7 +1306,6 @@ TRAMP_REAL_BEGIN(tramp_real_data_access_slb)
13221306
EXCEPTION_PROLOG_2_REAL data_access_slb_common, EXC_STD, 1
13231307

13241308
EXC_VIRT_BEGIN(data_access_slb, 0x4380, 0x80)
1325-
SET_SCRATCH0(r13) /* save r13 */
13261309
EXCEPTION_PROLOG_0 PACA_EXSLB
13271310
EXCEPTION_PROLOG_1 EXC_STD, PACA_EXSLB, 0, 0x380, 1, 0, 0
13281311
EXCEPTION_PROLOG_2_VIRT data_access_slb_common, EXC_STD
@@ -1406,7 +1389,6 @@ ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_TYPE_RADIX)
14061389

14071390

14081391
EXC_REAL_BEGIN(hardware_interrupt, 0x500, 0x100)
1409-
SET_SCRATCH0(r13) /* save r13 */
14101392
EXCEPTION_PROLOG_0 PACA_EXGEN
14111393
BEGIN_FTR_SECTION
14121394
EXCEPTION_PROLOG_1 EXC_HV, PACA_EXGEN, 1, 0x500, 0, 0, IRQS_DISABLED
@@ -1418,7 +1400,6 @@ ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
14181400
EXC_REAL_END(hardware_interrupt, 0x500, 0x100)
14191401

14201402
EXC_VIRT_BEGIN(hardware_interrupt, 0x4500, 0x100)
1421-
SET_SCRATCH0(r13) /* save r13 */
14221403
EXCEPTION_PROLOG_0 PACA_EXGEN
14231404
BEGIN_FTR_SECTION
14241405
EXCEPTION_PROLOG_1 EXC_HV, PACA_EXGEN, 1, 0x500, 0, 0, IRQS_DISABLED
@@ -1435,14 +1416,12 @@ EXC_COMMON_ASYNC(hardware_interrupt_common, 0x500, do_IRQ)
14351416

14361417

14371418
EXC_REAL_BEGIN(alignment, 0x600, 0x100)
1438-
SET_SCRATCH0(r13) /* save r13 */
14391419
EXCEPTION_PROLOG_0 PACA_EXGEN
14401420
EXCEPTION_PROLOG_1 EXC_STD, PACA_EXGEN, 1, 0x600, 1, 1, 0
14411421
EXCEPTION_PROLOG_2_REAL alignment_common, EXC_STD, 1
14421422
EXC_REAL_END(alignment, 0x600, 0x100)
14431423

14441424
EXC_VIRT_BEGIN(alignment, 0x4600, 0x100)
1445-
SET_SCRATCH0(r13) /* save r13 */
14461425
EXCEPTION_PROLOG_0 PACA_EXGEN
14471426
EXCEPTION_PROLOG_1 EXC_STD, PACA_EXGEN, 0, 0x600, 1, 1, 0
14481427
EXCEPTION_PROLOG_2_VIRT alignment_common, EXC_STD
@@ -1766,7 +1745,6 @@ TRAMP_REAL_BEGIN(hmi_exception_early)
17661745
* firmware.
17671746
*/
17681747
EXCEPTION_RESTORE_REGS EXC_HV
1769-
SET_SCRATCH0(r13)
17701748
EXCEPTION_PROLOG_0 PACA_EXGEN
17711749
b tramp_real_hmi_exception
17721750

@@ -1925,7 +1903,6 @@ EXC_REAL_NONE(0x1400, 0x100)
19251903
EXC_VIRT_NONE(0x5400, 0x100)
19261904

19271905
EXC_REAL_BEGIN(denorm_exception_hv, 0x1500, 0x100)
1928-
SET_SCRATCH0(r13)
19291906
EXCEPTION_PROLOG_0 PACA_EXGEN
19301907
EXCEPTION_PROLOG_1 EXC_HV, PACA_EXGEN, 0, 0x1500, 0, 0, 0
19311908

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