Skip to content

Commit 00d3be0

Browse files
committed
[Intel][ADL ... MTL] Code review of IMC decoders
1 parent 1614819 commit 00d3be0

File tree

2 files changed

+61
-64
lines changed

2 files changed

+61
-64
lines changed

x86_64/corefreqd.c

Lines changed: 60 additions & 62 deletions
Original file line numberDiff line numberDiff line change
@@ -5831,8 +5831,10 @@ void ADL_IMC(RO(SHM_STRUCT) *RO(Shm), RO(PROC) *RO(Proc))
58315831
break;
58325832
}
58335833
RO(Shm)->Uncore.MC[mc].Channel[0].DIMM[0].Banks = \
5834+
!RO(Proc)->Uncore.MC[mc].Channel[0].ADL.Sched.ReservedBits1 ? 16 : 8;
5835+
58345836
RO(Shm)->Uncore.MC[mc].Channel[1].DIMM[0].Banks = \
5835-
!RO(Proc)->Uncore.MC[mc].Channel[cha].ADL.Sched.ReservedBits1 ? 16 : 8;
5837+
!RO(Proc)->Uncore.MC[mc].Channel[1].ADL.Sched.ReservedBits1 ? 16 : 8;
58365838

58375839
RO(Shm)->Uncore.MC[mc].Channel[0].DIMM[0].Cols = \
58385840
RO(Shm)->Uncore.MC[mc].Channel[1].DIMM[0].Cols = 1 << 10;
@@ -6169,7 +6171,6 @@ void MTL_IMC(RO(SHM_STRUCT) *RO(Shm), RO(PROC) *RO(Proc))
61696171
TIMING(mc, cha).tREFI = \
61706172
RO(Proc)->Uncore.MC[mc].Channel[cha].MTL.Refresh.tREFI;
61716173

6172-
61736174
switch (RO(Shm)->Uncore.Unit.DDR_Ver) {
61746175
default:
61756176
case 4:
@@ -6260,13 +6261,6 @@ void MTL_IMC(RO(SHM_STRUCT) *RO(Shm), RO(PROC) *RO(Proc))
62606261
TIMING(mc, cha).tXS = \
62616262
RO(Proc)->Uncore.MC[mc].Channel[cha].MTL.SRExit.tXSR;
62626263

6263-
RO(Shm)->Uncore.MC[mc].Channel[cha].DIMM[0].Banks = \
6264-
RO(Shm)->Uncore.MC[mc].Channel[cha].DIMM[1].Banks = \
6265-
!RO(Proc)->Uncore.MC[mc].Channel[cha].MTL.Sched.ReservedBits1 ? 16 : 8;
6266-
6267-
RO(Shm)->Uncore.MC[mc].Channel[cha].DIMM[0].Cols = 1 << 10;
6268-
RO(Shm)->Uncore.MC[mc].Channel[cha].DIMM[1].Cols = 1 << 10;
6269-
62706264
TIMING(mc, cha).tCKE = \
62716265
RO(Proc)->Uncore.MC[mc].Channel[cha].MTL.PWDEN.tCKE;
62726266

@@ -6279,96 +6273,100 @@ void MTL_IMC(RO(SHM_STRUCT) *RO(Shm), RO(PROC) *RO(Proc))
62796273
TIMING(mc, cha).GEAR = \
62806274
RO(Proc)->Uncore.MC[mc].Channel[cha].MTL.Sched.GEAR ? 4 : 2;
62816275
}
6276+
switch (RO(Shm)->Uncore.Unit.DDR_Ver) {
6277+
case 1 ... 4:
62826278
RO(Shm)->Uncore.MC[mc].Channel[0].Timing.ECC = \
62836279
RO(Proc)->Uncore.MC[mc].MTL.MADC0.ECC;
62846280

6285-
RO(Shm)->Uncore.MC[mc].Channel[1].Timing.ECC = \
6286-
RO(Proc)->Uncore.MC[mc].MTL.MADC1.ECC;
6287-
6288-
switch (RO(Shm)->Uncore.Unit.DDR_Ver) {
6289-
case 1 ... 4:
6290-
RO(Shm)->Uncore.MC[mc].Channel[0].DIMM[
6281+
RO(Shm)->Uncore.MC[mc].Channel[
62916282
RO(Proc)->Uncore.MC[mc].MTL.MADC0.Dimm_L_Map
6292-
].Rows = DimmWidthToRows(RO(Proc)->Uncore.MC[mc].MTL.MADD0.DLW);
6283+
].DIMM[0].Rows = DimmWidthToRows(RO(Proc)->Uncore.MC[mc].MTL.MADD0.DLW);
62936284

6294-
RO(Shm)->Uncore.MC[mc].Channel[0].DIMM[
6285+
RO(Shm)->Uncore.MC[mc].Channel[
62956286
!RO(Proc)->Uncore.MC[mc].MTL.MADC0.Dimm_L_Map
6296-
].Rows = DimmWidthToRows(RO(Proc)->Uncore.MC[mc].MTL.MADD0.DSW);
6297-
6298-
RO(Shm)->Uncore.MC[mc].Channel[1].DIMM[
6299-
RO(Proc)->Uncore.MC[mc].MTL.MADC1.Dimm_L_Map
6300-
].Rows = DimmWidthToRows(RO(Proc)->Uncore.MC[mc].MTL.MADD1.DLW);
6287+
].DIMM[0].Rows = DimmWidthToRows(RO(Proc)->Uncore.MC[mc].MTL.MADD0.DSW);
63016288

6302-
RO(Shm)->Uncore.MC[mc].Channel[1].DIMM[
6303-
!RO(Proc)->Uncore.MC[mc].MTL.MADC1.Dimm_L_Map
6304-
].Rows = DimmWidthToRows(RO(Proc)->Uncore.MC[mc].MTL.MADD1.DSW);
6305-
6306-
RO(Shm)->Uncore.MC[mc].Channel[0].DIMM[
6289+
RO(Shm)->Uncore.MC[mc].Channel[
63076290
RO(Proc)->Uncore.MC[mc].MTL.MADC0.Dimm_L_Map
6308-
].Size = 512 * RO(Proc)->Uncore.MC[mc].MTL.MADD0.Dimm_L_Size;
6291+
].DIMM[0].Size = 512 * RO(Proc)->Uncore.MC[mc].MTL.MADD0.Dimm_L_Size;
63096292

6310-
RO(Shm)->Uncore.MC[mc].Channel[0].DIMM[
6293+
RO(Shm)->Uncore.MC[mc].Channel[
63116294
!RO(Proc)->Uncore.MC[mc].MTL.MADC0.Dimm_L_Map
6312-
].Size = 512 * RO(Proc)->Uncore.MC[mc].MTL.MADD0.Dimm_S_Size;
6295+
].DIMM[0].Size = 512 * RO(Proc)->Uncore.MC[mc].MTL.MADD0.Dimm_S_Size;
63136296

6314-
RO(Shm)->Uncore.MC[mc].Channel[1].DIMM[
6315-
RO(Proc)->Uncore.MC[mc].MTL.MADC1.Dimm_L_Map
6316-
].Size = 512 * RO(Proc)->Uncore.MC[mc].MTL.MADD1.Dimm_L_Size;
6297+
RO(Shm)->Uncore.MC[mc].Channel[
6298+
RO(Proc)->Uncore.MC[mc].MTL.MADC0.Dimm_L_Map
6299+
].DIMM[0].Ranks = 1 + RO(Proc)->Uncore.MC[mc].MTL.MADD0.DLNOR;
63176300

6318-
RO(Shm)->Uncore.MC[mc].Channel[1].DIMM[
6319-
!RO(Proc)->Uncore.MC[mc].MTL.MADC1.Dimm_L_Map
6320-
].Size = 512 * RO(Proc)->Uncore.MC[mc].MTL.MADD1.Dimm_S_Size;
6301+
RO(Shm)->Uncore.MC[mc].Channel[
6302+
!RO(Proc)->Uncore.MC[mc].MTL.MADC0.Dimm_L_Map
6303+
].DIMM[0].Ranks = 1 + RO(Proc)->Uncore.MC[mc].MTL.MADD0.DSNOR;
63216304
break;
63226305
case 5:
63236306
default:
6324-
RO(Shm)->Uncore.MC[mc].Channel[0].DIMM[
6307+
RO(Shm)->Uncore.MC[mc].Channel[0].Timing.ECC = \
6308+
RO(Proc)->Uncore.MC[mc].MTL.MADC0.ECC;
6309+
6310+
RO(Shm)->Uncore.MC[mc].Channel[1].Timing.ECC = \
6311+
RO(Proc)->Uncore.MC[mc].MTL.MADC1.ECC;
6312+
6313+
RO(Shm)->Uncore.MC[mc].Channel[
63256314
RO(Proc)->Uncore.MC[mc].MTL.MADC0.Dimm_L_Map
6326-
].Rows = 1 << 17;
6315+
].DIMM[0].Rows = 1 << 17;
63276316

6328-
RO(Shm)->Uncore.MC[mc].Channel[0].DIMM[
6317+
RO(Shm)->Uncore.MC[mc].Channel[
63296318
!RO(Proc)->Uncore.MC[mc].MTL.MADC0.Dimm_L_Map
6330-
].Rows = 1 << 17;
6319+
].DIMM[0].Rows = 1 << 17;
63316320

6332-
RO(Shm)->Uncore.MC[mc].Channel[1].DIMM[
6321+
RO(Shm)->Uncore.MC[mc].Channel[
63336322
RO(Proc)->Uncore.MC[mc].MTL.MADC1.Dimm_L_Map
6334-
].Rows = 1 << 17;
6323+
].DIMM[0].Rows = 1 << 17;
63356324

6336-
RO(Shm)->Uncore.MC[mc].Channel[1].DIMM[
6325+
RO(Shm)->Uncore.MC[mc].Channel[
63376326
!RO(Proc)->Uncore.MC[mc].MTL.MADC1.Dimm_L_Map
6338-
].Rows = 1 << 17;
6327+
].DIMM[0].Rows = 1 << 17;
63396328

6340-
RO(Shm)->Uncore.MC[mc].Channel[0].DIMM[
6329+
RO(Shm)->Uncore.MC[mc].Channel[
63416330
RO(Proc)->Uncore.MC[mc].MTL.MADC0.Dimm_L_Map
6342-
].Size = 1024 * RO(Proc)->Uncore.MC[mc].MTL.MADD0.Dimm_L_Size;
6331+
].DIMM[0].Size = 1024 * RO(Proc)->Uncore.MC[mc].MTL.MADD0.Dimm_L_Size;
63436332

6344-
RO(Shm)->Uncore.MC[mc].Channel[0].DIMM[
6333+
RO(Shm)->Uncore.MC[mc].Channel[
63456334
!RO(Proc)->Uncore.MC[mc].MTL.MADC0.Dimm_L_Map
6346-
].Size = 1024 * RO(Proc)->Uncore.MC[mc].MTL.MADD0.Dimm_S_Size;
6335+
].DIMM[0].Size = 1024 * RO(Proc)->Uncore.MC[mc].MTL.MADD0.Dimm_S_Size;
63476336

6348-
RO(Shm)->Uncore.MC[mc].Channel[1].DIMM[
6337+
RO(Shm)->Uncore.MC[mc].Channel[
63496338
RO(Proc)->Uncore.MC[mc].MTL.MADC1.Dimm_L_Map
6350-
].Size = 1024 * RO(Proc)->Uncore.MC[mc].MTL.MADD1.Dimm_L_Size;
6339+
].DIMM[0].Size = 1024 * RO(Proc)->Uncore.MC[mc].MTL.MADD1.Dimm_L_Size;
63516340

6352-
RO(Shm)->Uncore.MC[mc].Channel[1].DIMM[
6341+
RO(Shm)->Uncore.MC[mc].Channel[
63536342
!RO(Proc)->Uncore.MC[mc].MTL.MADC1.Dimm_L_Map
6354-
].Size = 1024 * RO(Proc)->Uncore.MC[mc].MTL.MADD1.Dimm_S_Size;
6355-
break;
6356-
}
6357-
RO(Shm)->Uncore.MC[mc].Channel[0].DIMM[
6343+
].DIMM[0].Size = 1024 * RO(Proc)->Uncore.MC[mc].MTL.MADD1.Dimm_S_Size;
6344+
6345+
RO(Shm)->Uncore.MC[mc].Channel[
63586346
RO(Proc)->Uncore.MC[mc].MTL.MADC0.Dimm_L_Map
6359-
].Ranks = 1 + RO(Proc)->Uncore.MC[mc].MTL.MADD0.DLNOR;
6347+
].DIMM[0].Ranks = 1 + RO(Proc)->Uncore.MC[mc].MTL.MADD0.DLNOR;
63606348

6361-
RO(Shm)->Uncore.MC[mc].Channel[0].DIMM[
6349+
RO(Shm)->Uncore.MC[mc].Channel[
63626350
!RO(Proc)->Uncore.MC[mc].MTL.MADC0.Dimm_L_Map
6363-
].Ranks = 1 + RO(Proc)->Uncore.MC[mc].MTL.MADD0.DSNOR;
6351+
].DIMM[0].Ranks = 1 + RO(Proc)->Uncore.MC[mc].MTL.MADD0.DSNOR;
63646352

6365-
RO(Shm)->Uncore.MC[mc].Channel[1].DIMM[
6353+
RO(Shm)->Uncore.MC[mc].Channel[
63666354
RO(Proc)->Uncore.MC[mc].MTL.MADC1.Dimm_L_Map
6367-
].Ranks = 1 + RO(Proc)->Uncore.MC[mc].MTL.MADD1.DLNOR;
6355+
].DIMM[0].Ranks = 1 + RO(Proc)->Uncore.MC[mc].MTL.MADD1.DLNOR;
63686356

6369-
RO(Shm)->Uncore.MC[mc].Channel[1].DIMM[
6357+
RO(Shm)->Uncore.MC[mc].Channel[
63706358
!RO(Proc)->Uncore.MC[mc].MTL.MADC1.Dimm_L_Map
6371-
].Ranks = 1 + RO(Proc)->Uncore.MC[mc].MTL.MADD1.DSNOR;
6359+
].DIMM[0].Ranks = 1 + RO(Proc)->Uncore.MC[mc].MTL.MADD1.DSNOR;
6360+
break;
6361+
}
6362+
RO(Shm)->Uncore.MC[mc].Channel[0].DIMM[0].Banks = \
6363+
!RO(Proc)->Uncore.MC[mc].Channel[0].MTL.Sched.ReservedBits1 ? 16 : 8;
6364+
6365+
RO(Shm)->Uncore.MC[mc].Channel[1].DIMM[0].Banks = \
6366+
!RO(Proc)->Uncore.MC[mc].Channel[1].MTL.Sched.ReservedBits1 ? 16 : 8;
6367+
6368+
RO(Shm)->Uncore.MC[mc].Channel[0].DIMM[0].Cols = \
6369+
RO(Shm)->Uncore.MC[mc].Channel[1].DIMM[0].Cols = 1 << 10;
63726370
}
63736371
}
63746372

x86_64/corefreqk.c

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -5591,7 +5591,6 @@ static void Query_ADL_IMC(void __iomem *mchmap, unsigned short mc)
55915591

55925592
virtualCount = PUBLIC(RO(Proc))->Uncore.MC[mc].ChannelCount;
55935593
}
5594-
PUBLIC(RO(Proc))->Uncore.MC[mc].SlotCount = 2;
55955594
PUBLIC(RO(Proc))->Uncore.MC[mc].SlotCount = 1;
55965595

55975596
for (cha = 0 ; cha < virtualCount; cha++)
@@ -5702,7 +5701,7 @@ static void Query_MTL_IMC(void __iomem *mchmap, unsigned short mc)
57025701

57035702
virtualCount = PUBLIC(RO(Proc))->Uncore.MC[mc].ChannelCount;
57045703
}
5705-
PUBLIC(RO(Proc))->Uncore.MC[mc].SlotCount = 2;
5704+
PUBLIC(RO(Proc))->Uncore.MC[mc].SlotCount = 1;
57065705

57075706
for (cha = 0 ; cha < virtualCount; cha++)
57085707
{

0 commit comments

Comments
 (0)