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Vlad.Karpovichbroonie
Vlad.Karpovich
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broonie
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ASoC: cs35l45: DSP Support
The CS35L45 digital core incorporates one programmable DSP block, capable of running a wide range of audio enhancement and speaker and battery protection functions. Signed-off-by: Vlad Karpovich <vkarpovi@opensource.cirrus.com> Link: https://lore.kernel.org/r/167933510679.26.5992985447093367768@mailman-core.alsa-project.org Signed-off-by: Mark Brown <broonie@kernel.org>
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lines changed

‎sound/soc/codecs/Kconfig‎

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -364,13 +364,17 @@ config SND_SOC_WM_ADSP
364364
default y if SND_SOC_WM2200=y
365365
default y if SND_SOC_CS35L41_SPI=y
366366
default y if SND_SOC_CS35L41_I2C=y
367+
default y if SND_SOC_CS35L45_SPI=y
368+
default y if SND_SOC_CS35L45_I2C=y
367369
default m if SND_SOC_MADERA=m
368370
default m if SND_SOC_CS47L24=m
369371
default m if SND_SOC_WM5102=m
370372
default m if SND_SOC_WM5110=m
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default m if SND_SOC_WM2200=m
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default m if SND_SOC_CS35L41_SPI=m
373375
default m if SND_SOC_CS35L41_I2C=m
376+
default m if SND_SOC_CS35L45_SPI=m
377+
default m if SND_SOC_CS35L45_I2C=m
374378

375379
config SND_SOC_AB8500_CODEC
376380
tristate

‎sound/soc/codecs/cs35l45-spi.c‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -23,6 +23,9 @@ static int cs35l45_spi_probe(struct spi_device *spi)
2323
if (cs35l45 == NULL)
2424
return -ENOMEM;
2525

26+
spi->max_speed_hz = CS35L45_SPI_MAX_FREQ;
27+
spi_setup(spi);
28+
2629
spi_set_drvdata(spi, cs35l45);
2730
cs35l45->regmap = devm_regmap_init_spi(spi, &cs35l45_spi_regmap);
2831
if (IS_ERR(cs35l45->regmap)) {

‎sound/soc/codecs/cs35l45-tables.c‎

Lines changed: 86 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -46,6 +46,7 @@ static const struct reg_default cs35l45_defaults[] = {
4646
{ CS35L45_SYNC_GPIO1, 0x00000007 },
4747
{ CS35L45_INTB_GPIO2_MCLK_REF, 0x00000005 },
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{ CS35L45_GPIO3, 0x00000005 },
49+
{ CS35L45_PWRMGT_CTL, 0x00000000 },
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{ CS35L45_REFCLK_INPUT, 0x00000510 },
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{ CS35L45_GLOBAL_SAMPLE_RATE, 0x00000003 },
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{ CS35L45_ASP_ENABLES1, 0x00000000 },
@@ -63,6 +64,30 @@ static const struct reg_default cs35l45_defaults[] = {
6364
{ CS35L45_ASPTX3_INPUT, 0x00000020 },
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{ CS35L45_ASPTX4_INPUT, 0x00000028 },
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{ CS35L45_ASPTX5_INPUT, 0x00000048 },
67+
{ CS35L45_DSP1_RX1_RATE, 0x00000001 },
68+
{ CS35L45_DSP1_RX2_RATE, 0x00000001 },
69+
{ CS35L45_DSP1_RX3_RATE, 0x00000001 },
70+
{ CS35L45_DSP1_RX4_RATE, 0x00000001 },
71+
{ CS35L45_DSP1_RX5_RATE, 0x00000001 },
72+
{ CS35L45_DSP1_RX6_RATE, 0x00000001 },
73+
{ CS35L45_DSP1_RX7_RATE, 0x00000001 },
74+
{ CS35L45_DSP1_RX8_RATE, 0x00000001 },
75+
{ CS35L45_DSP1_TX1_RATE, 0x00000001 },
76+
{ CS35L45_DSP1_TX2_RATE, 0x00000001 },
77+
{ CS35L45_DSP1_TX3_RATE, 0x00000001 },
78+
{ CS35L45_DSP1_TX4_RATE, 0x00000001 },
79+
{ CS35L45_DSP1_TX5_RATE, 0x00000001 },
80+
{ CS35L45_DSP1_TX6_RATE, 0x00000001 },
81+
{ CS35L45_DSP1_TX7_RATE, 0x00000001 },
82+
{ CS35L45_DSP1_TX8_RATE, 0x00000001 },
83+
{ CS35L45_DSP1RX1_INPUT, 0x00000008 },
84+
{ CS35L45_DSP1RX2_INPUT, 0x00000009 },
85+
{ CS35L45_DSP1RX3_INPUT, 0x00000018 },
86+
{ CS35L45_DSP1RX4_INPUT, 0x00000019 },
87+
{ CS35L45_DSP1RX5_INPUT, 0x00000020 },
88+
{ CS35L45_DSP1RX6_INPUT, 0x00000028 },
89+
{ CS35L45_DSP1RX7_INPUT, 0x0000003A },
90+
{ CS35L45_DSP1RX8_INPUT, 0x00000028 },
6691
{ CS35L45_AMP_PCM_CONTROL, 0x00100000 },
6792
{ CS35L45_IRQ1_CFG, 0x00000000 },
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{ CS35L45_IRQ1_MASK_1, 0xBFEFFFBF },
@@ -100,6 +125,7 @@ static bool cs35l45_readable_reg(struct device *dev, unsigned int reg)
100125
case CS35L45_SYNC_GPIO1:
101126
case CS35L45_INTB_GPIO2_MCLK_REF:
102127
case CS35L45_GPIO3:
128+
case CS35L45_PWRMGT_CTL:
103129
case CS35L45_REFCLK_INPUT:
104130
case CS35L45_GLOBAL_SAMPLE_RATE:
105131
case CS35L45_ASP_ENABLES1:
@@ -117,6 +143,14 @@ static bool cs35l45_readable_reg(struct device *dev, unsigned int reg)
117143
case CS35L45_ASPTX3_INPUT:
118144
case CS35L45_ASPTX4_INPUT:
119145
case CS35L45_ASPTX5_INPUT:
146+
case CS35L45_DSP1RX1_INPUT:
147+
case CS35L45_DSP1RX2_INPUT:
148+
case CS35L45_DSP1RX3_INPUT:
149+
case CS35L45_DSP1RX4_INPUT:
150+
case CS35L45_DSP1RX5_INPUT:
151+
case CS35L45_DSP1RX6_INPUT:
152+
case CS35L45_DSP1RX7_INPUT:
153+
case CS35L45_DSP1RX8_INPUT:
120154
case CS35L45_AMP_PCM_CONTROL:
121155
case CS35L45_AMP_PCM_HPF_TST:
122156
case CS35L45_IRQ1_CFG:
@@ -128,6 +162,40 @@ static bool cs35l45_readable_reg(struct device *dev, unsigned int reg)
128162
case CS35L45_GPIO1_CTRL1:
129163
case CS35L45_GPIO2_CTRL1:
130164
case CS35L45_GPIO3_CTRL1:
165+
case CS35L45_DSP_MBOX_1:
166+
case CS35L45_DSP_MBOX_2:
167+
case CS35L45_DSP_VIRT1_MBOX_1 ... CS35L45_DSP_VIRT1_MBOX_4:
168+
case CS35L45_DSP_VIRT2_MBOX_1 ... CS35L45_DSP_VIRT2_MBOX_4:
169+
case CS35L45_DSP1_SYS_ID:
170+
case CS35L45_DSP1_CLOCK_FREQ:
171+
case CS35L45_DSP1_RX1_RATE:
172+
case CS35L45_DSP1_RX2_RATE:
173+
case CS35L45_DSP1_RX3_RATE:
174+
case CS35L45_DSP1_RX4_RATE:
175+
case CS35L45_DSP1_RX5_RATE:
176+
case CS35L45_DSP1_RX6_RATE:
177+
case CS35L45_DSP1_RX7_RATE:
178+
case CS35L45_DSP1_RX8_RATE:
179+
case CS35L45_DSP1_TX1_RATE:
180+
case CS35L45_DSP1_TX2_RATE:
181+
case CS35L45_DSP1_TX3_RATE:
182+
case CS35L45_DSP1_TX4_RATE:
183+
case CS35L45_DSP1_TX5_RATE:
184+
case CS35L45_DSP1_TX6_RATE:
185+
case CS35L45_DSP1_TX7_RATE:
186+
case CS35L45_DSP1_TX8_RATE:
187+
case CS35L45_DSP1_SCRATCH1:
188+
case CS35L45_DSP1_SCRATCH2:
189+
case CS35L45_DSP1_SCRATCH3:
190+
case CS35L45_DSP1_SCRATCH4:
191+
case CS35L45_DSP1_CCM_CORE_CONTROL:
192+
case CS35L45_DSP1_XMEM_PACK_0 ... CS35L45_DSP1_XMEM_PACK_4607:
193+
case CS35L45_DSP1_XMEM_UNPACK32_0 ... CS35L45_DSP1_XMEM_UNPACK32_3071:
194+
case CS35L45_DSP1_XMEM_UNPACK24_0 ... CS35L45_DSP1_XMEM_UNPACK24_6143:
195+
case CS35L45_DSP1_YMEM_PACK_0 ... CS35L45_DSP1_YMEM_PACK_1532:
196+
case CS35L45_DSP1_YMEM_UNPACK32_0 ... CS35L45_DSP1_YMEM_UNPACK32_1022:
197+
case CS35L45_DSP1_YMEM_UNPACK24_0 ... CS35L45_DSP1_YMEM_UNPACK24_2043:
198+
case CS35L45_DSP1_PMEM_0 ... CS35L45_DSP1_PMEM_3834:
131199
return true;
132200
default:
133201
return false;
@@ -146,6 +214,24 @@ static bool cs35l45_volatile_reg(struct device *dev, unsigned int reg)
146214
case CS35L45_IRQ1_EINT_1 ... CS35L45_IRQ1_EINT_18:
147215
case CS35L45_IRQ1_STS_1 ... CS35L45_IRQ1_STS_18:
148216
case CS35L45_GPIO_STATUS1:
217+
case CS35L45_DSP_MBOX_1:
218+
case CS35L45_DSP_MBOX_2:
219+
case CS35L45_DSP_VIRT1_MBOX_1 ... CS35L45_DSP_VIRT1_MBOX_4:
220+
case CS35L45_DSP_VIRT2_MBOX_1 ... CS35L45_DSP_VIRT2_MBOX_4:
221+
case CS35L45_DSP1_SYS_ID:
222+
case CS35L45_DSP1_CLOCK_FREQ:
223+
case CS35L45_DSP1_SCRATCH1:
224+
case CS35L45_DSP1_SCRATCH2:
225+
case CS35L45_DSP1_SCRATCH3:
226+
case CS35L45_DSP1_SCRATCH4:
227+
case CS35L45_DSP1_CCM_CORE_CONTROL:
228+
case CS35L45_DSP1_XMEM_PACK_0 ... CS35L45_DSP1_XMEM_PACK_4607:
229+
case CS35L45_DSP1_XMEM_UNPACK32_0 ... CS35L45_DSP1_XMEM_UNPACK32_3071:
230+
case CS35L45_DSP1_XMEM_UNPACK24_0 ... CS35L45_DSP1_XMEM_UNPACK24_6143:
231+
case CS35L45_DSP1_YMEM_PACK_0 ... CS35L45_DSP1_YMEM_PACK_1532:
232+
case CS35L45_DSP1_YMEM_UNPACK32_0 ... CS35L45_DSP1_YMEM_UNPACK32_1022:
233+
case CS35L45_DSP1_YMEM_UNPACK24_0 ... CS35L45_DSP1_YMEM_UNPACK24_2043:
234+
case CS35L45_DSP1_PMEM_0 ... CS35L45_DSP1_PMEM_3834:
149235
return true;
150236
default:
151237
return false;

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