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1 parent a445699 commit e01d48cCopy full SHA for e01d48c
arch/riscv/kernel/vendor_extensions.c
@@ -38,7 +38,7 @@ bool __riscv_isa_vendor_extension_available(int cpu, unsigned long vendor, unsig
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#ifdef CONFIG_RISCV_ISA_VENDOR_EXT_ANDES
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case ANDES_VENDOR_ID:
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bmap = &riscv_isa_vendor_ext_list_andes.all_harts_isa_bitmap;
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- cpu_bmap = &riscv_isa_vendor_ext_list_andes.per_hart_isa_bitmap[cpu];
+ cpu_bmap = riscv_isa_vendor_ext_list_andes.per_hart_isa_bitmap;
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break;
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#endif
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default:
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