@@ -4747,8 +4747,10 @@ static int bnxt_hwrm_cfa_l2_set_rx_mask(struct bnxt *bp, u16 vnic_id)
47474747 return rc ;
47484748
47494749 req -> vnic_id = cpu_to_le32 (vnic -> fw_vnic_id );
4750- req -> num_mc_entries = cpu_to_le32 (vnic -> mc_list_count );
4751- req -> mc_tbl_addr = cpu_to_le64 (vnic -> mc_list_mapping );
4750+ if (vnic -> rx_mask & CFA_L2_SET_RX_MASK_REQ_MASK_MCAST ) {
4751+ req -> num_mc_entries = cpu_to_le32 (vnic -> mc_list_count );
4752+ req -> mc_tbl_addr = cpu_to_le64 (vnic -> mc_list_mapping );
4753+ }
47524754 req -> mask = cpu_to_le32 (vnic -> rx_mask );
47534755 return hwrm_req_send_silent (bp , req );
47544756}
@@ -7787,6 +7789,19 @@ static int bnxt_map_fw_health_regs(struct bnxt *bp)
77877789 return 0 ;
77887790}
77897791
7792+ static void bnxt_remap_fw_health_regs (struct bnxt * bp )
7793+ {
7794+ if (!bp -> fw_health )
7795+ return ;
7796+
7797+ if (bp -> fw_cap & BNXT_FW_CAP_ERROR_RECOVERY ) {
7798+ bp -> fw_health -> status_reliable = true;
7799+ bp -> fw_health -> resets_reliable = true;
7800+ } else {
7801+ bnxt_try_map_fw_health_reg (bp );
7802+ }
7803+ }
7804+
77907805static int bnxt_hwrm_error_recovery_qcfg (struct bnxt * bp )
77917806{
77927807 struct bnxt_fw_health * fw_health = bp -> fw_health ;
@@ -8639,6 +8654,9 @@ static int bnxt_init_chip(struct bnxt *bp, bool irq_re_init)
86398654 vnic -> uc_filter_count = 1 ;
86408655
86418656 vnic -> rx_mask = 0 ;
8657+ if (test_bit (BNXT_STATE_HALF_OPEN , & bp -> state ))
8658+ goto skip_rx_mask ;
8659+
86428660 if (bp -> dev -> flags & IFF_BROADCAST )
86438661 vnic -> rx_mask |= CFA_L2_SET_RX_MASK_REQ_MASK_BCAST ;
86448662
@@ -8648,7 +8666,7 @@ static int bnxt_init_chip(struct bnxt *bp, bool irq_re_init)
86488666 if (bp -> dev -> flags & IFF_ALLMULTI ) {
86498667 vnic -> rx_mask |= CFA_L2_SET_RX_MASK_REQ_MASK_ALL_MCAST ;
86508668 vnic -> mc_list_count = 0 ;
8651- } else {
8669+ } else if ( bp -> dev -> flags & IFF_MULTICAST ) {
86528670 u32 mask = 0 ;
86538671
86548672 bnxt_mc_list_updated (bp , & mask );
@@ -8659,6 +8677,7 @@ static int bnxt_init_chip(struct bnxt *bp, bool irq_re_init)
86598677 if (rc )
86608678 goto err_out ;
86618679
8680+ skip_rx_mask :
86628681 rc = bnxt_hwrm_set_coal (bp );
86638682 if (rc )
86648683 netdev_warn (bp -> dev , "HWRM set coalescing failure rc: %x\n" ,
@@ -9850,8 +9869,8 @@ static int bnxt_hwrm_if_change(struct bnxt *bp, bool up)
98509869 resc_reinit = true;
98519870 if (flags & FUNC_DRV_IF_CHANGE_RESP_FLAGS_HOT_FW_RESET_DONE )
98529871 fw_reset = true;
9853- else if ( bp -> fw_health && ! bp -> fw_health -> status_reliable )
9854- bnxt_try_map_fw_health_reg (bp );
9872+ else
9873+ bnxt_remap_fw_health_regs (bp );
98559874
98569875 if (test_bit (BNXT_STATE_IN_FW_RESET , & bp -> state ) && !fw_reset ) {
98579876 netdev_err (bp -> dev , "RESET_DONE not set during FW reset.\n" );
@@ -10330,21 +10349,23 @@ int bnxt_half_open_nic(struct bnxt *bp)
1033010349 goto half_open_err ;
1033110350 }
1033210351
10333- rc = bnxt_alloc_mem (bp , false );
10352+ rc = bnxt_alloc_mem (bp , true );
1033410353 if (rc ) {
1033510354 netdev_err (bp -> dev , "bnxt_alloc_mem err: %x\n" , rc );
1033610355 goto half_open_err ;
1033710356 }
10338- rc = bnxt_init_nic (bp , false);
10357+ set_bit (BNXT_STATE_HALF_OPEN , & bp -> state );
10358+ rc = bnxt_init_nic (bp , true);
1033910359 if (rc ) {
10360+ clear_bit (BNXT_STATE_HALF_OPEN , & bp -> state );
1034010361 netdev_err (bp -> dev , "bnxt_init_nic err: %x\n" , rc );
1034110362 goto half_open_err ;
1034210363 }
1034310364 return 0 ;
1034410365
1034510366half_open_err :
1034610367 bnxt_free_skbs (bp );
10347- bnxt_free_mem (bp , false );
10368+ bnxt_free_mem (bp , true );
1034810369 dev_close (bp -> dev );
1034910370 return rc ;
1035010371}
@@ -10354,9 +10375,10 @@ int bnxt_half_open_nic(struct bnxt *bp)
1035410375 */
1035510376void bnxt_half_close_nic (struct bnxt * bp )
1035610377{
10357- bnxt_hwrm_resource_free (bp , false, false );
10378+ bnxt_hwrm_resource_free (bp , false, true );
1035810379 bnxt_free_skbs (bp );
10359- bnxt_free_mem (bp , false);
10380+ bnxt_free_mem (bp , true);
10381+ clear_bit (BNXT_STATE_HALF_OPEN , & bp -> state );
1036010382}
1036110383
1036210384void bnxt_reenable_sriov (struct bnxt * bp )
@@ -10772,7 +10794,7 @@ static void bnxt_set_rx_mode(struct net_device *dev)
1077210794 if (dev -> flags & IFF_ALLMULTI ) {
1077310795 mask |= CFA_L2_SET_RX_MASK_REQ_MASK_ALL_MCAST ;
1077410796 vnic -> mc_list_count = 0 ;
10775- } else {
10797+ } else if ( dev -> flags & IFF_MULTICAST ) {
1077610798 mc_update = bnxt_mc_list_updated (bp , & mask );
1077710799 }
1077810800
@@ -10849,9 +10871,10 @@ static int bnxt_cfg_rx_mode(struct bnxt *bp)
1084910871 !bnxt_promisc_ok (bp ))
1085010872 vnic -> rx_mask &= ~CFA_L2_SET_RX_MASK_REQ_MASK_PROMISCUOUS ;
1085110873 rc = bnxt_hwrm_cfa_l2_set_rx_mask (bp , 0 );
10852- if (rc && vnic -> mc_list_count ) {
10874+ if (rc && ( vnic -> rx_mask & CFA_L2_SET_RX_MASK_REQ_MASK_MCAST ) ) {
1085310875 netdev_info (bp -> dev , "Failed setting MC filters rc: %d, turning on ALL_MCAST mode\n" ,
1085410876 rc );
10877+ vnic -> rx_mask &= ~CFA_L2_SET_RX_MASK_REQ_MASK_MCAST ;
1085510878 vnic -> rx_mask |= CFA_L2_SET_RX_MASK_REQ_MASK_ALL_MCAST ;
1085610879 vnic -> mc_list_count = 0 ;
1085710880 rc = bnxt_hwrm_cfa_l2_set_rx_mask (bp , 0 );
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