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Emeel Hakimkuba-moo
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net/mlx5e: Create advanced steering operation (ASO) object for MACsec
Add support for ASO work queue entry (WQE) data to allow reading data upon querying the ASO work queue (WQ). Register user mode memory registration (UMR) upon ASO WQ init, de-register UMR upon ASO WQ cleanup. MACsec uses UMR to determine the cause of the event triggered by the HW since different scenarios could trigger the same event. Setup MACsec ASO object to sync HW with SW about various macsec flow stateful features like: replay window, lifetime limits e.t.c Reviewed-by: Raed Salem <raeds@nvidia.com> Signed-off-by: Emeel Hakim <ehakim@nvidia.com> Reviewed-by: Tariq Toukan <tariqt@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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-19
lines changed
  • drivers/net/ethernet/mellanox/mlx5/core/en_accel

1 file changed

+130
-19
lines changed

drivers/net/ethernet/mellanox/mlx5/core/en_accel/macsec.c

Lines changed: 130 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -6,13 +6,11 @@
66
#include <linux/xarray.h>
77

88
#include "en.h"
9+
#include "lib/aso.h"
910
#include "lib/mlx5.h"
1011
#include "en_accel/macsec.h"
1112
#include "en_accel/macsec_fs.h"
1213

13-
#define MLX5_MACSEC_ASO_INC_SN 0x2
14-
#define MLX5_MACSEC_ASO_REG_C_4_5 0x2
15-
1614
struct mlx5e_macsec_sa {
1715
bool active;
1816
u8 assoc_num;
@@ -43,6 +41,23 @@ struct mlx5e_macsec_rx_sc {
4341
struct rcu_head rcu_head;
4442
};
4543

44+
struct mlx5e_macsec_umr {
45+
dma_addr_t dma_addr;
46+
u8 ctx[MLX5_ST_SZ_BYTES(macsec_aso)];
47+
u32 mkey;
48+
};
49+
50+
struct mlx5e_macsec_aso {
51+
/* ASO */
52+
struct mlx5_aso *maso;
53+
/* Protects macsec ASO */
54+
struct mutex aso_lock;
55+
/* UMR */
56+
struct mlx5e_macsec_umr *umr;
57+
58+
u32 pdn;
59+
};
60+
4661
static const struct rhashtable_params rhash_sci = {
4762
.key_len = sizeof_field(struct mlx5e_macsec_sa, sci),
4863
.key_offset = offsetof(struct mlx5e_macsec_sa, sci),
@@ -65,9 +80,6 @@ struct mlx5e_macsec {
6580
struct mlx5e_macsec_fs *macsec_fs;
6681
struct mutex lock; /* Protects mlx5e_macsec internal contexts */
6782

68-
/* Global PD for MACsec object ASO context */
69-
u32 aso_pdn;
70-
7183
/* Tx sci -> fs id mapping handling */
7284
struct rhashtable sci_hash; /* sci -> mlx5e_macsec_sa */
7385

@@ -78,6 +90,9 @@ struct mlx5e_macsec {
7890

7991
/* Stats manage */
8092
struct mlx5e_macsec_stats stats;
93+
94+
/* ASO */
95+
struct mlx5e_macsec_aso aso;
8196
};
8297

8398
struct mlx5_macsec_obj_attrs {
@@ -88,6 +103,55 @@ struct mlx5_macsec_obj_attrs {
88103
bool encrypt;
89104
};
90105

106+
static int mlx5e_macsec_aso_reg_mr(struct mlx5_core_dev *mdev, struct mlx5e_macsec_aso *aso)
107+
{
108+
struct mlx5e_macsec_umr *umr;
109+
struct device *dma_device;
110+
dma_addr_t dma_addr;
111+
int err;
112+
113+
umr = kzalloc(sizeof(*umr), GFP_KERNEL);
114+
if (!umr) {
115+
err = -ENOMEM;
116+
return err;
117+
}
118+
119+
dma_device = &mdev->pdev->dev;
120+
dma_addr = dma_map_single(dma_device, umr->ctx, sizeof(umr->ctx), DMA_BIDIRECTIONAL);
121+
err = dma_mapping_error(dma_device, dma_addr);
122+
if (err) {
123+
mlx5_core_err(mdev, "Can't map dma device, err=%d\n", err);
124+
goto out_dma;
125+
}
126+
127+
err = mlx5e_create_mkey(mdev, aso->pdn, &umr->mkey);
128+
if (err) {
129+
mlx5_core_err(mdev, "Can't create mkey, err=%d\n", err);
130+
goto out_mkey;
131+
}
132+
133+
umr->dma_addr = dma_addr;
134+
135+
aso->umr = umr;
136+
137+
return 0;
138+
139+
out_mkey:
140+
dma_unmap_single(dma_device, dma_addr, sizeof(umr->ctx), DMA_BIDIRECTIONAL);
141+
out_dma:
142+
kfree(umr);
143+
return err;
144+
}
145+
146+
static void mlx5e_macsec_aso_dereg_mr(struct mlx5_core_dev *mdev, struct mlx5e_macsec_aso *aso)
147+
{
148+
struct mlx5e_macsec_umr *umr = aso->umr;
149+
150+
mlx5_core_destroy_mkey(mdev, umr->mkey);
151+
dma_unmap_single(&mdev->pdev->dev, umr->dma_addr, sizeof(umr->ctx), DMA_BIDIRECTIONAL);
152+
kfree(umr);
153+
}
154+
91155
static int mlx5e_macsec_create_object(struct mlx5_core_dev *mdev,
92156
struct mlx5_macsec_obj_attrs *attrs,
93157
bool is_tx,
@@ -180,7 +244,7 @@ static int mlx5e_macsec_init_sa(struct macsec_context *ctx,
180244
obj_attrs.sci = cpu_to_be64((__force u64)sa->sci);
181245
obj_attrs.enc_key_id = sa->enc_key_id;
182246
obj_attrs.encrypt = encrypt;
183-
obj_attrs.aso_pdn = macsec->aso_pdn;
247+
obj_attrs.aso_pdn = macsec->aso.pdn;
184248

185249
err = mlx5e_macsec_create_object(mdev, &obj_attrs, is_tx, &sa->macsec_obj_id);
186250
if (err)
@@ -1122,6 +1186,54 @@ static int mlx5e_macsec_del_secy(struct macsec_context *ctx)
11221186
return err;
11231187
}
11241188

1189+
static int mlx5e_macsec_aso_init(struct mlx5e_macsec_aso *aso, struct mlx5_core_dev *mdev)
1190+
{
1191+
struct mlx5_aso *maso;
1192+
int err;
1193+
1194+
err = mlx5_core_alloc_pd(mdev, &aso->pdn);
1195+
if (err) {
1196+
mlx5_core_err(mdev,
1197+
"MACsec offload: Failed to alloc pd for MACsec ASO, err=%d\n",
1198+
err);
1199+
return err;
1200+
}
1201+
1202+
maso = mlx5_aso_create(mdev, aso->pdn);
1203+
if (IS_ERR(maso)) {
1204+
err = PTR_ERR(maso);
1205+
goto err_aso;
1206+
}
1207+
1208+
err = mlx5e_macsec_aso_reg_mr(mdev, aso);
1209+
if (err)
1210+
goto err_aso_reg;
1211+
1212+
mutex_init(&aso->aso_lock);
1213+
1214+
aso->maso = maso;
1215+
1216+
return 0;
1217+
1218+
err_aso_reg:
1219+
mlx5_aso_destroy(maso);
1220+
err_aso:
1221+
mlx5_core_dealloc_pd(mdev, aso->pdn);
1222+
return err;
1223+
}
1224+
1225+
static void mlx5e_macsec_aso_cleanup(struct mlx5e_macsec_aso *aso, struct mlx5_core_dev *mdev)
1226+
{
1227+
if (!aso)
1228+
return;
1229+
1230+
mlx5e_macsec_aso_dereg_mr(mdev, aso);
1231+
1232+
mlx5_aso_destroy(aso->maso);
1233+
1234+
mlx5_core_dealloc_pd(mdev, aso->pdn);
1235+
}
1236+
11251237
bool mlx5e_is_macsec_device(const struct mlx5_core_dev *mdev)
11261238
{
11271239
if (!(MLX5_CAP_GEN_64(mdev, general_obj_types) &
@@ -1272,21 +1384,19 @@ int mlx5e_macsec_init(struct mlx5e_priv *priv)
12721384
INIT_LIST_HEAD(&macsec->macsec_device_list_head);
12731385
mutex_init(&macsec->lock);
12741386

1275-
err = mlx5_core_alloc_pd(mdev, &macsec->aso_pdn);
1276-
if (err) {
1277-
mlx5_core_err(mdev,
1278-
"MACsec offload: Failed to alloc pd for MACsec ASO, err=%d\n",
1279-
err);
1280-
goto err_pd;
1281-
}
1282-
12831387
err = rhashtable_init(&macsec->sci_hash, &rhash_sci);
12841388
if (err) {
12851389
mlx5_core_err(mdev, "MACsec offload: Failed to init SCI hash table, err=%d\n",
12861390
err);
12871391
goto err_hash;
12881392
}
12891393

1394+
err = mlx5e_macsec_aso_init(&macsec->aso, priv->mdev);
1395+
if (err) {
1396+
mlx5_core_err(mdev, "MACsec offload: Failed to init aso, err=%d\n", err);
1397+
goto err_aso;
1398+
}
1399+
12901400
xa_init_flags(&macsec->sc_xarray, XA_FLAGS_ALLOC1);
12911401

12921402
priv->macsec = macsec;
@@ -1306,10 +1416,10 @@ int mlx5e_macsec_init(struct mlx5e_priv *priv)
13061416
return 0;
13071417

13081418
err_out:
1419+
mlx5e_macsec_aso_cleanup(&macsec->aso, priv->mdev);
1420+
err_aso:
13091421
rhashtable_destroy(&macsec->sci_hash);
13101422
err_hash:
1311-
mlx5_core_dealloc_pd(priv->mdev, macsec->aso_pdn);
1312-
err_pd:
13131423
kfree(macsec);
13141424
priv->macsec = NULL;
13151425
return err;
@@ -1318,15 +1428,16 @@ int mlx5e_macsec_init(struct mlx5e_priv *priv)
13181428
void mlx5e_macsec_cleanup(struct mlx5e_priv *priv)
13191429
{
13201430
struct mlx5e_macsec *macsec = priv->macsec;
1431+
struct mlx5_core_dev *mdev = macsec->mdev;
13211432

13221433
if (!macsec)
13231434
return;
13241435

13251436
mlx5e_macsec_fs_cleanup(macsec->macsec_fs);
13261437

1327-
priv->macsec = NULL;
1438+
mlx5e_macsec_aso_cleanup(&macsec->aso, mdev);
13281439

1329-
mlx5_core_dealloc_pd(priv->mdev, macsec->aso_pdn);
1440+
priv->macsec = NULL;
13301441

13311442
rhashtable_destroy(&macsec->sci_hash);
13321443

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