riscv.ac

AC_LANG_CPLUSPLUS

AX_BOOST_BASE([1.53])
AX_BOOST_ASIO
AX_BOOST_REGEX

AC_CHECK_LIB([boost_system], [main], [], [])

AC_CHECK_LIB([boost_regex], [main], [], [])

AC_ARG_WITH(isa,
	[AS_HELP_STRING([--with-isa=RV64IMAFDC_zicntr_zihpm],
		[Sets the default RISC-V ISA])],
  AC_DEFINE_UNQUOTED([DEFAULT_ISA], "$withval", [Default value for --isa switch]),
  AC_DEFINE_UNQUOTED([DEFAULT_ISA], "RV64IMAFDC_zicntr_zihpm", [Default value for --isa switch]))

AC_ARG_WITH(priv,
	[AS_HELP_STRING([--with-priv=MSU],
		[Sets the default RISC-V privilege modes supported])],
  AC_DEFINE_UNQUOTED([DEFAULT_PRIV], "$withval", [Default value for --priv switch]),
  AC_DEFINE_UNQUOTED([DEFAULT_PRIV], "MSU", [Default value for --priv switch]))

AC_ARG_WITH(varch,
	[AS_HELP_STRING([--with-varch=vlen:128,elen:64],
		[Sets the default vector config])],
  AC_DEFINE_UNQUOTED([DEFAULT_VARCH], "$withval", [Default value for --varch switch]),
  AC_DEFINE_UNQUOTED([DEFAULT_VARCH], ["vlen:128,elen:64"], [Default value for --varch switch]))

AC_ARG_WITH(target,
	[AS_HELP_STRING([--with-target=riscv64-unknown-elf],
		[Sets the default target config])],
  AC_DEFINE_UNQUOTED([TARGET_ARCH], "$withval", [Default value for --target switch]),
  AC_DEFINE_UNQUOTED([TARGET_ARCH], ["riscv64-unknown-elf"], [Default value for --target switch]))

AC_SEARCH_LIBS([dlopen], [dl dld], [
  AC_DEFINE([HAVE_DLOPEN], [], [Dynamic library loading is supported])
  AC_SUBST([HAVE_DLOPEN], [yes])
])

AC_CHECK_LIB(pthread, pthread_create, [], [AC_MSG_ERROR([libpthread is required])])

AC_ARG_ENABLE([dual-endian], AS_HELP_STRING([--enable-dual-endian], [Enable support for running target in either endianness]))
AS_IF([test "x$enable_dual_endian" = "xyes"], [
  AC_DEFINE([RISCV_ENABLE_DUAL_ENDIAN],,[Enable support for running target in either endianness])
])