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1 parent d9b15b0 commit 3746f20Copy full SHA for 3746f20
llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn
@@ -106,6 +106,7 @@ static_library("LLVMRISCVCodeGen") {
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"RISCVDeadRegisterDefinitions.cpp",
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"RISCVExpandAtomicPseudoInsts.cpp",
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"RISCVExpandPseudoInsts.cpp",
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+ "RISCVFoldMasks.cpp",
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"RISCVFrameLowering.cpp",
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"RISCVGatherScatterLowering.cpp",
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"RISCVISelDAGToDAG.cpp",
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