From a8eb761a6e9d6a26ba110f0d2360d6e792eade73 Mon Sep 17 00:00:00 2001
From: forest <136390975+vvvv-vvvv@users.noreply.github.com>
Date: Sat, 2 Dec 2023 23:12:09 +0000
Subject: [PATCH] Add stub for MSR_AMD64_DE_CFG

Linux commit 2632daebafd0 ("x86/cpu: Restore AMD's DE_CFG MSR after
resume")
---
 src/rust/cpu/cpu.rs             | 1 +
 src/rust/cpu/instructions_0f.rs | 3 +++
 2 files changed, 4 insertions(+)

diff --git a/src/rust/cpu/cpu.rs b/src/rust/cpu/cpu.rs
index 6f1e6747c7..b866ceda0f 100644
--- a/src/rust/cpu/cpu.rs
+++ b/src/rust/cpu/cpu.rs
@@ -216,6 +216,7 @@ pub const IA32_RTIT_CTL: i32 = 0x570;
 pub const MSR_PKG_C2_RESIDENCY: i32 = 0x60D;
 pub const IA32_KERNEL_GS_BASE: i32 = 0xC0000101u32 as i32;
 pub const MSR_AMD64_LS_CFG: i32 = 0xC0011020u32 as i32;
+pub const MSR_AMD64_DE_CFG: i32 = 0xC0011029u32 as i32;
 
 pub const IA32_APIC_BASE_BSP: i32 = 1 << 8;
 pub const IA32_APIC_BASE_EXTD: i32 = 1 << 10;
diff --git a/src/rust/cpu/instructions_0f.rs b/src/rust/cpu/instructions_0f.rs
index 53818cc539..c68f0be5b9 100644
--- a/src/rust/cpu/instructions_0f.rs
+++ b/src/rust/cpu/instructions_0f.rs
@@ -1230,6 +1230,8 @@ pub unsafe fn instr_0F30() {
         IA32_TSX_CTRL => {},       // linux 5.19
         MSR_TSX_FORCE_ABORT => {}, // linux 5.19
         IA32_MCU_OPT_CTRL => {},   // linux 5.19
+        MSR_AMD64_LS_CFG => {},    // linux 5.19
+        MSR_AMD64_DE_CFG => {},    // linux 6.1
         _ => {
             dbg_log!("Unknown msr: {:x}", index);
             dbg_assert!(false);
@@ -1307,6 +1309,7 @@ pub unsafe fn instr_0F32() {
         MSR_TSX_FORCE_ABORT => {}, // linux 5.19
         IA32_MCU_OPT_CTRL => {},   // linux 5.19
         MSR_AMD64_LS_CFG => {},    // linux 5.19
+        MSR_AMD64_DE_CFG => {},    // linux 6.1
         _ => {
             dbg_log!("Unknown msr: {:x}", index);
             dbg_assert!(false);