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* It is a 23-bit down counter with an optional prescaler (16 or 256).
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*/
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+ #define TM_RELOAD BIT(6)
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#define TM_ENABLE BIT(7)
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- #define TM_AUTO_RELOAD BIT(6)
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- #define TM_INT_EDGE 0
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#define TIMER_FREQ 80000000
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#define TIMER_PRESCALER_1 0
@@ -46,17 +45,13 @@ IRAM void nmi_isr(void) {
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mgos_hw_timers_isr (s_ti );
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}
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+ #define NMI_INT_ENABLE_REG (PERIPHS_DPORT_BASEADDR)
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+ #define FRC1_INT_ENA BIT(1)
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+
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IRAM bool mgos_hw_timers_dev_set (struct mgos_hw_timer_info * ti , int usecs ,
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int flags ) {
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- uint32_t ctl = TM_ENABLE | TM_INT_EDGE ;
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- if (flags & MGOS_TIMER_REPEAT ) ctl |= TM_AUTO_RELOAD ;
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- if (flags & MGOS_ESP8266_HW_TIMER_NMI ) {
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- /* There's only one timer anyway, this will do. */
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- s_ti = ti ;
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- ETS_FRC_TIMER1_NMI_INTR_ATTACH (nmi_isr );
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- } else {
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- ETS_FRC_TIMER1_INTR_ATTACH ((ets_isr_t ) mgos_hw_timers_isr , ti );
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- }
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+ uint32_t ctl = TM_ENABLE ;
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+ if (flags & MGOS_TIMER_REPEAT ) ctl |= TM_RELOAD ;
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uint32_t load = usecs * (TIMER_FREQ / 1000000 );
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if (load < TIMER_MAX_LOAD && load >= TIMER_MIN_LOAD ) {
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ctl |= TIMER_PRESCALER_1 ;
@@ -75,6 +70,15 @@ IRAM bool mgos_hw_timers_dev_set(struct mgos_hw_timer_info *ti, int usecs,
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}
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RTC_REG_WRITE (FRC1_LOAD_ADDRESS , load );
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RTC_CLR_REG_MASK (FRC1_INT_ADDRESS , FRC1_INT_CLR_MASK );
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+ if (flags & MGOS_ESP8266_HW_TIMER_NMI ) {
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+ /* There's only one timer anyway, this will do. */
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+ s_ti = ti ;
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+ ETS_FRC_TIMER1_NMI_INTR_ATTACH (nmi_isr );
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+ SET_PERI_REG_MASK (NMI_INT_ENABLE_REG , FRC1_INT_ENA );
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+ } else {
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+ CLEAR_PERI_REG_MASK (NMI_INT_ENABLE_REG , FRC1_INT_ENA );
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+ ETS_FRC_TIMER1_INTR_ATTACH ((ets_isr_t ) mgos_hw_timers_isr , ti );
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+ }
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TM1_EDGE_INT_ENABLE ();
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ETS_FRC1_INTR_ENABLE ();
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RTC_REG_WRITE (FRC1_CTRL_ADDRESS , ctl );
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