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ESP8266: Fix HW timer int mode
Need to clear the FRC1->NMI routing bit in NMI_INT_ENABLE_REG when not using NMI.
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+15
-11
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+15
-11
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platforms/esp8266/src/esp_hw_timers.c

Lines changed: 15 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -29,9 +29,8 @@
2929
* It is a 23-bit down counter with an optional prescaler (16 or 256).
3030
*/
3131

32+
#define TM_RELOAD BIT(6)
3233
#define TM_ENABLE BIT(7)
33-
#define TM_AUTO_RELOAD BIT(6)
34-
#define TM_INT_EDGE 0
3534

3635
#define TIMER_FREQ 80000000
3736
#define TIMER_PRESCALER_1 0
@@ -46,17 +45,13 @@ IRAM void nmi_isr(void) {
4645
mgos_hw_timers_isr(s_ti);
4746
}
4847

48+
#define NMI_INT_ENABLE_REG (PERIPHS_DPORT_BASEADDR)
49+
#define FRC1_INT_ENA BIT(1)
50+
4951
IRAM bool mgos_hw_timers_dev_set(struct mgos_hw_timer_info *ti, int usecs,
5052
int flags) {
51-
uint32_t ctl = TM_ENABLE | TM_INT_EDGE;
52-
if (flags & MGOS_TIMER_REPEAT) ctl |= TM_AUTO_RELOAD;
53-
if (flags & MGOS_ESP8266_HW_TIMER_NMI) {
54-
/* There's only one timer anyway, this will do. */
55-
s_ti = ti;
56-
ETS_FRC_TIMER1_NMI_INTR_ATTACH(nmi_isr);
57-
} else {
58-
ETS_FRC_TIMER1_INTR_ATTACH((ets_isr_t) mgos_hw_timers_isr, ti);
59-
}
53+
uint32_t ctl = TM_ENABLE;
54+
if (flags & MGOS_TIMER_REPEAT) ctl |= TM_RELOAD;
6055
uint32_t load = usecs * (TIMER_FREQ / 1000000);
6156
if (load < TIMER_MAX_LOAD && load >= TIMER_MIN_LOAD) {
6257
ctl |= TIMER_PRESCALER_1;
@@ -75,6 +70,15 @@ IRAM bool mgos_hw_timers_dev_set(struct mgos_hw_timer_info *ti, int usecs,
7570
}
7671
RTC_REG_WRITE(FRC1_LOAD_ADDRESS, load);
7772
RTC_CLR_REG_MASK(FRC1_INT_ADDRESS, FRC1_INT_CLR_MASK);
73+
if (flags & MGOS_ESP8266_HW_TIMER_NMI) {
74+
/* There's only one timer anyway, this will do. */
75+
s_ti = ti;
76+
ETS_FRC_TIMER1_NMI_INTR_ATTACH(nmi_isr);
77+
SET_PERI_REG_MASK(NMI_INT_ENABLE_REG, FRC1_INT_ENA);
78+
} else {
79+
CLEAR_PERI_REG_MASK(NMI_INT_ENABLE_REG, FRC1_INT_ENA);
80+
ETS_FRC_TIMER1_INTR_ATTACH((ets_isr_t) mgos_hw_timers_isr, ti);
81+
}
7882
TM1_EDGE_INT_ENABLE();
7983
ETS_FRC1_INTR_ENABLE();
8084
RTC_REG_WRITE(FRC1_CTRL_ADDRESS, ctl);

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