AARCH64 incorrect operand access reported for mov immediate

[RobertHenry6bev]

The AARCH64/ARM64 instruction 0xd2801c00 decodes to "mov x0, #0xe0".

Working in the 'next' branch at head (commit d956ced), when asking for detail, in a non-DIET build, then the C++ decoder yields for
capstone_insn.detail.arm64.operands[0].access
the value 3, which is a bitset of CS_AC_READ | CS_AC_WRITE

But this instruction does NOT read register x0; it just writes it!

[RobertHenry6bev]

The mrs instruction (read from special purpose register into a GPR) has the same problem
0xd538d09a mrs x26, tpidr_el1
capstone says x26 is both read and written.

[RobertHenry6bev]

"cmp" and "tst" have a similar illness. Operands to these instructions are exceptional, as they are only read, not written, but capstone marks the 0th operand as being written, not read.

[aquynh]

Did you try with the next branch?

[RobertHenry6bev]

Yes. I don't rely on what ubuntu ships, and have been running the up-to-date next branch since Feb 2, 2020, when I pointed out another bug present in the mainline, but not in next.

[RobertHenry6bev]

Has there been any progress towards fixing this?

[Rot127]

Is fixed with #2026