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zs.c
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/*
* decserial.c: Serial port driver for IOASIC DECstations.
*
* Derived from drivers/sbus/char/sunserial.c by Paul Mackerras.
* Derived from drivers/macintosh/macserial.c by Harald Koerfgen.
*
* DECstation changes
* Copyright (C) 1998-2000 Harald Koerfgen
* Copyright (C) 2000, 2001, 2002, 2003, 2004, 2005 Maciej W. Rozycki
*
* For the rest of the code the original Copyright applies:
* Copyright (C) 1996 Paul Mackerras (Paul.Mackerras@cs.anu.edu.au)
* Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
*
*
* Note: for IOASIC systems the wiring is as follows:
*
* mouse/keyboard:
* DIN-7 MJ-4 signal SCC
* 2 1 TxD <- A.TxD
* 3 4 RxD -> A.RxD
*
* EIA-232/EIA-423:
* DB-25 MMJ-6 signal SCC
* 2 2 TxD <- B.TxD
* 3 5 RxD -> B.RxD
* 4 RTS <- ~A.RTS
* 5 CTS -> ~B.CTS
* 6 6 DSR -> ~A.SYNC
* 8 CD -> ~B.DCD
* 12 DSRS(DCE) -> ~A.CTS (*)
* 15 TxC -> B.TxC
* 17 RxC -> B.RxC
* 20 1 DTR <- ~A.DTR
* 22 RI -> ~A.DCD
* 23 DSRS(DTE) <- ~B.RTS
*
* (*) EIA-232 defines the signal at this pin to be SCD, while DSRS(DCE)
* is shared with DSRS(DTE) at pin 23.
*/
#include <linux/config.h>
#include <linux/errno.h>
#include <linux/signal.h>
#include <linux/sched.h>
#include <linux/timer.h>
#include <linux/interrupt.h>
#include <linux/tty.h>
#include <linux/tty_flip.h>
#include <linux/major.h>
#include <linux/string.h>
#include <linux/fcntl.h>
#include <linux/mm.h>
#include <linux/kernel.h>
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/ioport.h>
#include <linux/spinlock.h>
#ifdef CONFIG_SERIAL_DEC_CONSOLE
#include <linux/console.h>
#endif
#include <asm/io.h>
#include <asm/pgtable.h>
#include <asm/irq.h>
#include <asm/system.h>
#include <asm/bootinfo.h>
#include <asm/dec/interrupts.h>
#include <asm/dec/ioasic_addrs.h>
#include <asm/dec/machtype.h>
#include <asm/dec/serial.h>
#include <asm/dec/system.h>
#include <asm/dec/tc.h>
#ifdef CONFIG_KGDB
#include <asm/kgdb.h>
#endif
#ifdef CONFIG_MAGIC_SYSRQ
#include <linux/sysrq.h>
#endif
#include "zs.h"
/*
* It would be nice to dynamically allocate everything that
* depends on NUM_SERIAL, so we could support any number of
* Z8530s, but for now...
*/
#define NUM_SERIAL 2 /* Max number of ZS chips supported */
#define NUM_CHANNELS (NUM_SERIAL * 2) /* 2 channels per chip */
#define CHANNEL_A_NR (zs_parms->channel_a_offset > zs_parms->channel_b_offset)
/* Number of channel A in the chip */
#define ZS_CHAN_IO_SIZE 8
#define ZS_CLOCK 7372800 /* Z8530 RTxC input clock rate */
#define RECOVERY_DELAY udelay(2)
struct zs_parms {
unsigned long scc0;
unsigned long scc1;
int channel_a_offset;
int channel_b_offset;
int irq0;
int irq1;
int clock;
};
static struct zs_parms *zs_parms;
#ifdef CONFIG_MACH_DECSTATION
static struct zs_parms ds_parms = {
scc0 : IOASIC_SCC0,
scc1 : IOASIC_SCC1,
channel_a_offset : 1,
channel_b_offset : 9,
irq0 : -1,
irq1 : -1,
clock : ZS_CLOCK
};
#endif
#ifdef CONFIG_MACH_DECSTATION
#define DS_BUS_PRESENT (IOASIC)
#else
#define DS_BUS_PRESENT 0
#endif
#define BUS_PRESENT (DS_BUS_PRESENT)
DEFINE_SPINLOCK(zs_lock);
struct dec_zschannel zs_channels[NUM_CHANNELS];
struct dec_serial zs_soft[NUM_CHANNELS];
int zs_channels_found;
struct dec_serial *zs_chain; /* list of all channels */
struct tty_struct zs_ttys[NUM_CHANNELS];
#ifdef CONFIG_SERIAL_DEC_CONSOLE
static struct console sercons;
#endif
#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) && \
!defined(MODULE)
static unsigned long break_pressed; /* break, really ... */
#endif
static unsigned char zs_init_regs[16] __initdata = {
0, /* write 0 */
0, /* write 1 */
0, /* write 2 */
0, /* write 3 */
(X16CLK), /* write 4 */
0, /* write 5 */
0, 0, 0, /* write 6, 7, 8 */
(MIE | DLC | NV), /* write 9 */
(NRZ), /* write 10 */
(TCBR | RCBR), /* write 11 */
0, 0, /* BRG time constant, write 12 + 13 */
(BRSRC | BRENABL), /* write 14 */
0 /* write 15 */
};
static struct tty_driver *serial_driver;
/* serial subtype definitions */
#define SERIAL_TYPE_NORMAL 1
/* number of characters left in xmit buffer before we ask for more */
#define WAKEUP_CHARS 256
/*
* Debugging.
*/
#undef SERIAL_DEBUG_OPEN
#undef SERIAL_DEBUG_FLOW
#undef SERIAL_DEBUG_THROTTLE
#undef SERIAL_PARANOIA_CHECK
#undef ZS_DEBUG_REGS
#ifdef SERIAL_DEBUG_THROTTLE
#define _tty_name(tty,buf) tty_name(tty,buf)
#endif
#define RS_STROBE_TIME 10
#define RS_ISR_PASS_LIMIT 256
#define _INLINE_ inline
static void probe_sccs(void);
static void change_speed(struct dec_serial *info);
static void rs_wait_until_sent(struct tty_struct *tty, int timeout);
static inline int serial_paranoia_check(struct dec_serial *info,
char *name, const char *routine)
{
#ifdef SERIAL_PARANOIA_CHECK
static const char *badmagic =
"Warning: bad magic number for serial struct %s in %s\n";
static const char *badinfo =
"Warning: null mac_serial for %s in %s\n";
if (!info) {
printk(badinfo, name, routine);
return 1;
}
if (info->magic != SERIAL_MAGIC) {
printk(badmagic, name, routine);
return 1;
}
#endif
return 0;
}
/*
* This is used to figure out the divisor speeds and the timeouts
*/
static int baud_table[] = {
0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, 4800,
9600, 19200, 38400, 57600, 115200, 0 };
/*
* Reading and writing Z8530 registers.
*/
static inline unsigned char read_zsreg(struct dec_zschannel *channel,
unsigned char reg)
{
unsigned char retval;
if (reg != 0) {
*channel->control = reg & 0xf;
fast_iob(); RECOVERY_DELAY;
}
retval = *channel->control;
RECOVERY_DELAY;
return retval;
}
static inline void write_zsreg(struct dec_zschannel *channel,
unsigned char reg, unsigned char value)
{
if (reg != 0) {
*channel->control = reg & 0xf;
fast_iob(); RECOVERY_DELAY;
}
*channel->control = value;
fast_iob(); RECOVERY_DELAY;
return;
}
static inline unsigned char read_zsdata(struct dec_zschannel *channel)
{
unsigned char retval;
retval = *channel->data;
RECOVERY_DELAY;
return retval;
}
static inline void write_zsdata(struct dec_zschannel *channel,
unsigned char value)
{
*channel->data = value;
fast_iob(); RECOVERY_DELAY;
return;
}
static inline void load_zsregs(struct dec_zschannel *channel,
unsigned char *regs)
{
/* ZS_CLEARERR(channel);
ZS_CLEARFIFO(channel); */
/* Load 'em up */
write_zsreg(channel, R3, regs[R3] & ~RxENABLE);
write_zsreg(channel, R5, regs[R5] & ~TxENAB);
write_zsreg(channel, R4, regs[R4]);
write_zsreg(channel, R9, regs[R9]);
write_zsreg(channel, R1, regs[R1]);
write_zsreg(channel, R2, regs[R2]);
write_zsreg(channel, R10, regs[R10]);
write_zsreg(channel, R11, regs[R11]);
write_zsreg(channel, R12, regs[R12]);
write_zsreg(channel, R13, regs[R13]);
write_zsreg(channel, R14, regs[R14]);
write_zsreg(channel, R15, regs[R15]);
write_zsreg(channel, R3, regs[R3]);
write_zsreg(channel, R5, regs[R5]);
return;
}
/* Sets or clears DTR/RTS on the requested line */
static inline void zs_rtsdtr(struct dec_serial *info, int which, int set)
{
unsigned long flags;
spin_lock_irqsave(&zs_lock, flags);
if (info->zs_channel != info->zs_chan_a) {
if (set) {
info->zs_chan_a->curregs[5] |= (which & (RTS | DTR));
} else {
info->zs_chan_a->curregs[5] &= ~(which & (RTS | DTR));
}
write_zsreg(info->zs_chan_a, 5, info->zs_chan_a->curregs[5]);
}
spin_unlock_irqrestore(&zs_lock, flags);
}
/* Utility routines for the Zilog */
static inline int get_zsbaud(struct dec_serial *ss)
{
struct dec_zschannel *channel = ss->zs_channel;
int brg;
/* The baud rate is split up between two 8-bit registers in
* what is termed 'BRG time constant' format in my docs for
* the chip, it is a function of the clk rate the chip is
* receiving which happens to be constant.
*/
brg = (read_zsreg(channel, 13) << 8);
brg |= read_zsreg(channel, 12);
return BRG_TO_BPS(brg, (zs_parms->clock/(ss->clk_divisor)));
}
/* On receive, this clears errors and the receiver interrupts */
static inline void rs_recv_clear(struct dec_zschannel *zsc)
{
write_zsreg(zsc, 0, ERR_RES);
write_zsreg(zsc, 0, RES_H_IUS); /* XXX this is unnecessary */
}
/*
* ----------------------------------------------------------------------
*
* Here starts the interrupt handling routines. All of the following
* subroutines are declared as inline and are folded into
* rs_interrupt(). They were separated out for readability's sake.
*
* - Ted Ts'o (tytso@mit.edu), 7-Mar-93
* -----------------------------------------------------------------------
*/
/*
* This routine is used by the interrupt handler to schedule
* processing in the software interrupt portion of the driver.
*/
static _INLINE_ void rs_sched_event(struct dec_serial *info, int event)
{
info->event |= 1 << event;
tasklet_schedule(&info->tlet);
}
static _INLINE_ void receive_chars(struct dec_serial *info,
struct pt_regs *regs)
{
struct tty_struct *tty = info->tty;
unsigned char ch, stat, flag;
while ((read_zsreg(info->zs_channel, R0) & Rx_CH_AV) != 0) {
stat = read_zsreg(info->zs_channel, R1);
ch = read_zsdata(info->zs_channel);
if (!tty && (!info->hook || !info->hook->rx_char))
continue;
flag = TTY_NORMAL;
if (info->tty_break) {
info->tty_break = 0;
flag = TTY_BREAK;
if (info->flags & ZILOG_SAK)
do_SAK(tty);
/* Ignore the null char got when BREAK is removed. */
if (ch == 0)
continue;
} else {
if (stat & Rx_OVR) {
flag = TTY_OVERRUN;
} else if (stat & FRM_ERR) {
flag = TTY_FRAME;
} else if (stat & PAR_ERR) {
flag = TTY_PARITY;
}
if (flag != TTY_NORMAL)
/* reset the error indication */
write_zsreg(info->zs_channel, R0, ERR_RES);
}
#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) && \
!defined(MODULE)
if (break_pressed && info->line == sercons.index) {
/* Ignore the null char got when BREAK is removed. */
if (ch == 0)
continue;
if (time_before(jiffies, break_pressed + HZ * 5)) {
handle_sysrq(ch, regs, NULL);
break_pressed = 0;
continue;
}
break_pressed = 0;
}
#endif
if (info->hook && info->hook->rx_char) {
(*info->hook->rx_char)(ch, flag);
return;
}
tty_insert_flip_char(tty, ch, flag);
}
if (tty)
tty_flip_buffer_push(tty);
}
static void transmit_chars(struct dec_serial *info)
{
if ((read_zsreg(info->zs_channel, R0) & Tx_BUF_EMP) == 0)
return;
info->tx_active = 0;
if (info->x_char) {
/* Send next char */
write_zsdata(info->zs_channel, info->x_char);
info->x_char = 0;
info->tx_active = 1;
return;
}
if ((info->xmit_cnt <= 0) || (info->tty && info->tty->stopped)
|| info->tx_stopped) {
write_zsreg(info->zs_channel, R0, RES_Tx_P);
return;
}
/* Send char */
write_zsdata(info->zs_channel, info->xmit_buf[info->xmit_tail++]);
info->xmit_tail = info->xmit_tail & (SERIAL_XMIT_SIZE-1);
info->xmit_cnt--;
info->tx_active = 1;
if (info->xmit_cnt < WAKEUP_CHARS)
rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
}
static _INLINE_ void status_handle(struct dec_serial *info)
{
unsigned char stat;
/* Get status from Read Register 0 */
stat = read_zsreg(info->zs_channel, R0);
if ((stat & BRK_ABRT) && !(info->read_reg_zero & BRK_ABRT)) {
#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) && \
!defined(MODULE)
if (info->line == sercons.index) {
if (!break_pressed)
break_pressed = jiffies;
} else
#endif
info->tty_break = 1;
}
if (info->zs_channel != info->zs_chan_a) {
/* Check for DCD transitions */
if (info->tty && !C_CLOCAL(info->tty) &&
((stat ^ info->read_reg_zero) & DCD) != 0 ) {
if (stat & DCD) {
wake_up_interruptible(&info->open_wait);
} else {
tty_hangup(info->tty);
}
}
/* Check for CTS transitions */
if (info->tty && C_CRTSCTS(info->tty)) {
if ((stat & CTS) != 0) {
if (info->tx_stopped) {
info->tx_stopped = 0;
if (!info->tx_active)
transmit_chars(info);
}
} else {
info->tx_stopped = 1;
}
}
}
/* Clear status condition... */
write_zsreg(info->zs_channel, R0, RES_EXT_INT);
info->read_reg_zero = stat;
}
/*
* This is the serial driver's generic interrupt routine
*/
static irqreturn_t rs_interrupt(int irq, void *dev_id, struct pt_regs *regs)
{
struct dec_serial *info = (struct dec_serial *) dev_id;
irqreturn_t status = IRQ_NONE;
unsigned char zs_intreg;
int shift;
/* NOTE: The read register 3, which holds the irq status,
* does so for both channels on each chip. Although
* the status value itself must be read from the A
* channel and is only valid when read from channel A.
* Yes... broken hardware...
*/
#define CHAN_IRQMASK (CHBRxIP | CHBTxIP | CHBEXT)
if (info->zs_chan_a == info->zs_channel)
shift = 3; /* Channel A */
else
shift = 0; /* Channel B */
for (;;) {
zs_intreg = read_zsreg(info->zs_chan_a, R3) >> shift;
if ((zs_intreg & CHAN_IRQMASK) == 0)
break;
status = IRQ_HANDLED;
if (zs_intreg & CHBRxIP) {
receive_chars(info, regs);
}
if (zs_intreg & CHBTxIP) {
transmit_chars(info);
}
if (zs_intreg & CHBEXT) {
status_handle(info);
}
}
/* Why do we need this ? */
write_zsreg(info->zs_channel, 0, RES_H_IUS);
return status;
}
#ifdef ZS_DEBUG_REGS
void zs_dump (void) {
int i, j;
for (i = 0; i < zs_channels_found; i++) {
struct dec_zschannel *ch = &zs_channels[i];
if ((long)ch->control == UNI_IO_BASE+UNI_SCC1A_CTRL) {
for (j = 0; j < 15; j++) {
printk("W%d = 0x%x\t",
j, (int)ch->curregs[j]);
}
for (j = 0; j < 15; j++) {
printk("R%d = 0x%x\t",
j, (int)read_zsreg(ch,j));
}
printk("\n\n");
}
}
}
#endif
/*
* -------------------------------------------------------------------
* Here ends the serial interrupt routines.
* -------------------------------------------------------------------
*/
/*
* ------------------------------------------------------------
* rs_stop() and rs_start()
*
* This routines are called before setting or resetting tty->stopped.
* ------------------------------------------------------------
*/
static void rs_stop(struct tty_struct *tty)
{
struct dec_serial *info = (struct dec_serial *)tty->driver_data;
unsigned long flags;
if (serial_paranoia_check(info, tty->name, "rs_stop"))
return;
#if 1
spin_lock_irqsave(&zs_lock, flags);
if (info->zs_channel->curregs[5] & TxENAB) {
info->zs_channel->curregs[5] &= ~TxENAB;
write_zsreg(info->zs_channel, 5, info->zs_channel->curregs[5]);
}
spin_unlock_irqrestore(&zs_lock, flags);
#endif
}
static void rs_start(struct tty_struct *tty)
{
struct dec_serial *info = (struct dec_serial *)tty->driver_data;
unsigned long flags;
if (serial_paranoia_check(info, tty->name, "rs_start"))
return;
spin_lock_irqsave(&zs_lock, flags);
#if 1
if (info->xmit_cnt && info->xmit_buf && !(info->zs_channel->curregs[5] & TxENAB)) {
info->zs_channel->curregs[5] |= TxENAB;
write_zsreg(info->zs_channel, 5, info->zs_channel->curregs[5]);
}
#else
if (info->xmit_cnt && info->xmit_buf && !info->tx_active) {
transmit_chars(info);
}
#endif
spin_unlock_irqrestore(&zs_lock, flags);
}
/*
* This routine is used to handle the "bottom half" processing for the
* serial driver, known also the "software interrupt" processing.
* This processing is done at the kernel interrupt level, after the
* rs_interrupt() has returned, BUT WITH INTERRUPTS TURNED ON. This
* is where time-consuming activities which can not be done in the
* interrupt driver proper are done; the interrupt driver schedules
* them using rs_sched_event(), and they get done here.
*/
static void do_softint(unsigned long private_)
{
struct dec_serial *info = (struct dec_serial *) private_;
struct tty_struct *tty;
tty = info->tty;
if (!tty)
return;
if (test_and_clear_bit(RS_EVENT_WRITE_WAKEUP, &info->event)) {
tty_wakeup(tty);
wake_up_interruptible(&tty->write_wait);
}
}
static int zs_startup(struct dec_serial * info)
{
unsigned long flags;
if (info->flags & ZILOG_INITIALIZED)
return 0;
if (!info->xmit_buf) {
info->xmit_buf = (unsigned char *) get_zeroed_page(GFP_KERNEL);
if (!info->xmit_buf)
return -ENOMEM;
}
spin_lock_irqsave(&zs_lock, flags);
#ifdef SERIAL_DEBUG_OPEN
printk("starting up ttyS%d (irq %d)...", info->line, info->irq);
#endif
/*
* Clear the receive FIFO.
*/
ZS_CLEARFIFO(info->zs_channel);
info->xmit_fifo_size = 1;
/*
* Clear the interrupt registers.
*/
write_zsreg(info->zs_channel, R0, ERR_RES);
write_zsreg(info->zs_channel, R0, RES_H_IUS);
/*
* Set the speed of the serial port
*/
change_speed(info);
/*
* Turn on RTS and DTR.
*/
zs_rtsdtr(info, RTS | DTR, 1);
/*
* Finally, enable sequencing and interrupts
*/
info->zs_channel->curregs[R1] &= ~RxINT_MASK;
info->zs_channel->curregs[R1] |= (RxINT_ALL | TxINT_ENAB |
EXT_INT_ENAB);
info->zs_channel->curregs[R3] |= RxENABLE;
info->zs_channel->curregs[R5] |= TxENAB;
info->zs_channel->curregs[R15] |= (DCDIE | CTSIE | TxUIE | BRKIE);
write_zsreg(info->zs_channel, R1, info->zs_channel->curregs[R1]);
write_zsreg(info->zs_channel, R3, info->zs_channel->curregs[R3]);
write_zsreg(info->zs_channel, R5, info->zs_channel->curregs[R5]);
write_zsreg(info->zs_channel, R15, info->zs_channel->curregs[R15]);
/*
* And clear the interrupt registers again for luck.
*/
write_zsreg(info->zs_channel, R0, ERR_RES);
write_zsreg(info->zs_channel, R0, RES_H_IUS);
/* Save the current value of RR0 */
info->read_reg_zero = read_zsreg(info->zs_channel, R0);
if (info->tty)
clear_bit(TTY_IO_ERROR, &info->tty->flags);
info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
info->flags |= ZILOG_INITIALIZED;
spin_unlock_irqrestore(&zs_lock, flags);
return 0;
}
/*
* This routine will shutdown a serial port; interrupts are disabled, and
* DTR is dropped if the hangup on close termio flag is on.
*/
static void shutdown(struct dec_serial * info)
{
unsigned long flags;
if (!(info->flags & ZILOG_INITIALIZED))
return;
#ifdef SERIAL_DEBUG_OPEN
printk("Shutting down serial port %d (irq %d)....", info->line,
info->irq);
#endif
spin_lock_irqsave(&zs_lock, flags);
if (info->xmit_buf) {
free_page((unsigned long) info->xmit_buf);
info->xmit_buf = 0;
}
info->zs_channel->curregs[1] = 0;
write_zsreg(info->zs_channel, 1, info->zs_channel->curregs[1]); /* no interrupts */
info->zs_channel->curregs[3] &= ~RxENABLE;
write_zsreg(info->zs_channel, 3, info->zs_channel->curregs[3]);
info->zs_channel->curregs[5] &= ~TxENAB;
write_zsreg(info->zs_channel, 5, info->zs_channel->curregs[5]);
if (!info->tty || C_HUPCL(info->tty)) {
zs_rtsdtr(info, RTS | DTR, 0);
}
if (info->tty)
set_bit(TTY_IO_ERROR, &info->tty->flags);
info->flags &= ~ZILOG_INITIALIZED;
spin_unlock_irqrestore(&zs_lock, flags);
}
/*
* This routine is called to set the UART divisor registers to match
* the specified baud rate for a serial port.
*/
static void change_speed(struct dec_serial *info)
{
unsigned cflag;
int i;
int brg, bits;
unsigned long flags;
if (!info->hook) {
if (!info->tty || !info->tty->termios)
return;
cflag = info->tty->termios->c_cflag;
if (!info->port)
return;
} else {
cflag = info->hook->cflags;
}
i = cflag & CBAUD;
if (i & CBAUDEX) {
i &= ~CBAUDEX;
if (i < 1 || i > 2) {
if (!info->hook)
info->tty->termios->c_cflag &= ~CBAUDEX;
else
info->hook->cflags &= ~CBAUDEX;
} else
i += 15;
}
spin_lock_irqsave(&zs_lock, flags);
info->zs_baud = baud_table[i];
if (info->zs_baud) {
brg = BPS_TO_BRG(info->zs_baud, zs_parms->clock/info->clk_divisor);
info->zs_channel->curregs[12] = (brg & 255);
info->zs_channel->curregs[13] = ((brg >> 8) & 255);
zs_rtsdtr(info, DTR, 1);
} else {
zs_rtsdtr(info, RTS | DTR, 0);
return;
}
/* byte size and parity */
info->zs_channel->curregs[3] &= ~RxNBITS_MASK;
info->zs_channel->curregs[5] &= ~TxNBITS_MASK;
switch (cflag & CSIZE) {
case CS5:
bits = 7;
info->zs_channel->curregs[3] |= Rx5;
info->zs_channel->curregs[5] |= Tx5;
break;
case CS6:
bits = 8;
info->zs_channel->curregs[3] |= Rx6;
info->zs_channel->curregs[5] |= Tx6;
break;
case CS7:
bits = 9;
info->zs_channel->curregs[3] |= Rx7;
info->zs_channel->curregs[5] |= Tx7;
break;
case CS8:
default: /* defaults to 8 bits */
bits = 10;
info->zs_channel->curregs[3] |= Rx8;
info->zs_channel->curregs[5] |= Tx8;
break;
}
info->timeout = ((info->xmit_fifo_size*HZ*bits) / info->zs_baud);
info->timeout += HZ/50; /* Add .02 seconds of slop */
info->zs_channel->curregs[4] &= ~(SB_MASK | PAR_ENA | PAR_EVEN);
if (cflag & CSTOPB) {
info->zs_channel->curregs[4] |= SB2;
} else {
info->zs_channel->curregs[4] |= SB1;
}
if (cflag & PARENB) {
info->zs_channel->curregs[4] |= PAR_ENA;
}
if (!(cflag & PARODD)) {
info->zs_channel->curregs[4] |= PAR_EVEN;
}
if (!(cflag & CLOCAL)) {
if (!(info->zs_channel->curregs[15] & DCDIE))
info->read_reg_zero = read_zsreg(info->zs_channel, 0);
info->zs_channel->curregs[15] |= DCDIE;
} else
info->zs_channel->curregs[15] &= ~DCDIE;
if (cflag & CRTSCTS) {
info->zs_channel->curregs[15] |= CTSIE;
if ((read_zsreg(info->zs_channel, 0) & CTS) == 0)
info->tx_stopped = 1;
} else {
info->zs_channel->curregs[15] &= ~CTSIE;
info->tx_stopped = 0;
}
/* Load up the new values */
load_zsregs(info->zs_channel, info->zs_channel->curregs);
spin_unlock_irqrestore(&zs_lock, flags);
}
static void rs_flush_chars(struct tty_struct *tty)
{
struct dec_serial *info = (struct dec_serial *)tty->driver_data;
unsigned long flags;
if (serial_paranoia_check(info, tty->name, "rs_flush_chars"))
return;
if (info->xmit_cnt <= 0 || tty->stopped || info->tx_stopped ||
!info->xmit_buf)
return;
/* Enable transmitter */
spin_lock_irqsave(&zs_lock, flags);
transmit_chars(info);
spin_unlock_irqrestore(&zs_lock, flags);
}
static int rs_write(struct tty_struct * tty,
const unsigned char *buf, int count)
{
int c, total = 0;
struct dec_serial *info = (struct dec_serial *)tty->driver_data;
unsigned long flags;
if (serial_paranoia_check(info, tty->name, "rs_write"))
return 0;
if (!tty || !info->xmit_buf)
return 0;
while (1) {
spin_lock_irqsave(&zs_lock, flags);
c = min(count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
SERIAL_XMIT_SIZE - info->xmit_head));
if (c <= 0)
break;
memcpy(info->xmit_buf + info->xmit_head, buf, c);
info->xmit_head = (info->xmit_head + c) & (SERIAL_XMIT_SIZE-1);
info->xmit_cnt += c;
spin_unlock_irqrestore(&zs_lock, flags);
buf += c;
count -= c;
total += c;
}
if (info->xmit_cnt && !tty->stopped && !info->tx_stopped
&& !info->tx_active)
transmit_chars(info);
spin_unlock_irqrestore(&zs_lock, flags);
return total;
}
static int rs_write_room(struct tty_struct *tty)
{
struct dec_serial *info = (struct dec_serial *)tty->driver_data;
int ret;
if (serial_paranoia_check(info, tty->name, "rs_write_room"))
return 0;
ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
if (ret < 0)
ret = 0;
return ret;
}
static int rs_chars_in_buffer(struct tty_struct *tty)
{
struct dec_serial *info = (struct dec_serial *)tty->driver_data;
if (serial_paranoia_check(info, tty->name, "rs_chars_in_buffer"))
return 0;
return info->xmit_cnt;
}
static void rs_flush_buffer(struct tty_struct *tty)
{
struct dec_serial *info = (struct dec_serial *)tty->driver_data;
if (serial_paranoia_check(info, tty->name, "rs_flush_buffer"))
return;
spin_lock_irq(&zs_lock);
info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
spin_unlock_irq(&zs_lock);
tty_wakeup(tty);
}
/*
* ------------------------------------------------------------
* rs_throttle()
*
* This routine is called by the upper-layer tty layer to signal that
* incoming characters should be throttled.
* ------------------------------------------------------------
*/
static void rs_throttle(struct tty_struct * tty)
{
struct dec_serial *info = (struct dec_serial *)tty->driver_data;
unsigned long flags;
#ifdef SERIAL_DEBUG_THROTTLE
char buf[64];
printk("throttle %s: %d....\n", _tty_name(tty, buf),
tty->ldisc.chars_in_buffer(tty));
#endif
if (serial_paranoia_check(info, tty->name, "rs_throttle"))
return;
if (I_IXOFF(tty)) {
spin_lock_irqsave(&zs_lock, flags);
info->x_char = STOP_CHAR(tty);
if (!info->tx_active)
transmit_chars(info);
spin_unlock_irqrestore(&zs_lock, flags);
}
if (C_CRTSCTS(tty)) {
zs_rtsdtr(info, RTS, 0);
}
}
static void rs_unthrottle(struct tty_struct * tty)
{
struct dec_serial *info = (struct dec_serial *)tty->driver_data;
unsigned long flags;
#ifdef SERIAL_DEBUG_THROTTLE
char buf[64];
printk("unthrottle %s: %d....\n", _tty_name(tty, buf),
tty->ldisc.chars_in_buffer(tty));
#endif
if (serial_paranoia_check(info, tty->name, "rs_unthrottle"))
return;