Add try_call_indirect lowering as well.

Author: cfallin

cranelift/codegen/src/ir/instructions.rs

@@ -595,7 +595,7 @@ impl InstructionData {
                 ..
             } => {
                 let exdata = &exception_tables[exception];
-                CallInfo::Indirect(exdata.signature(), args.as_slice(pool))
+                CallInfo::Indirect(exdata.signature(), &args.as_slice(pool)[1..])
             }
             Self::Ternary {
                 opcode: Opcode::StackSwitch,

cranelift/codegen/src/machinst/isle.rs

@@ -908,13 +908,34 @@ macro_rules! isle_prelude_caller_methods {
 
         fn gen_try_call_indirect(
             &mut self,
-            _sig_ref: SigRef,
-            _callee: Value,
-            _et: ExceptionTable,
-            _args: ValueSlice,
-            _targets: &MachLabelSlice,
+            sigref: SigRef,
+            callee: Value,
+            et: ExceptionTable,
+            args: ValueSlice,
+            targets: &MachLabelSlice,
         ) -> () {
-            todo!()
+            let caller_conv = self.lower_ctx.abi().call_conv(self.lower_ctx.sigs());
+            let sig = &self.lower_ctx.dfg().signatures[sigref];
+            let num_rets = sig.returns.len();
+
+            let callee = self.put_in_reg(callee);
+
+            let caller = <$abicaller>::from_ptr(
+                self.lower_ctx.sigs(),
+                sigref,
+                callee,
+                IsTailCall::No,
+                caller_conv,
+                self.backend.flags().clone(),
+            );
+
+            crate::machinst::isle::gen_call_common(
+                &mut self.lower_ctx,
+                num_rets,
+                caller,
+                args,
+                Some((et, targets)),
+            );
         }
     };
 }

cranelift/filetests/filetests/isa/aarch64/exceptions.clif

@@ -121,3 +121,129 @@ function %f0(i32) -> i32, f32, f64 {
 ;   ldp x29, x30, [sp], #0x10
 ;   ret
 
+function %f2(i32) -> i32, f32, f64 {
+    sig0 = (i32) -> f32 tail
+    fn0 = %g(i32) -> f32 tail
+
+    block0(v1: i32):
+        v2 = f64const 0x1.0
+        v10 = func_addr.i64 fn0
+        try_call_indirect v10(v1), sig0, block1(ret0, v2), [ default: block2(exn0) ]
+
+    block1(v3: f32, v4: f64):
+        v5 = iconst.i32 1
+        return v5, v3, v4
+
+    block2(v6: i64):
+        v7 = ireduce.i32 v6
+        v8 = iadd_imm.i32 v7, 1
+        v9 = f32const 0x0.0        
+        return v8, v9, v2
+}
+
+; VCode:
+;   stp fp, lr, [sp, #-16]!
+;   mov fp, sp
+;   stp x27, x28, [sp, #-16]!
+;   stp x25, x26, [sp, #-16]!
+;   stp x23, x24, [sp, #-16]!
+;   stp x21, x22, [sp, #-16]!
+;   stp x19, x20, [sp, #-16]!
+;   stp d14, d15, [sp, #-16]!
+;   stp d12, d13, [sp, #-16]!
+;   stp d10, d11, [sp, #-16]!
+;   stp d8, d9, [sp, #-16]!
+;   sub sp, sp, #16
+; block0:
+;   fmov d1, #1
+;   str q1, [sp]
+;   load_ext_name x11, TestCase(%g)+0
+;   mov x2, x0
+;   blr x11; b MachLabel(1); catch [None: MachLabel(2)]
+; block1:
+;   movz w0, #1
+;   ldr q1, [sp]
+;   add sp, sp, #16
+;   ldp d8, d9, [sp], #16
+;   ldp d10, d11, [sp], #16
+;   ldp d12, d13, [sp], #16
+;   ldp d14, d15, [sp], #16
+;   ldp x19, x20, [sp], #16
+;   ldp x21, x22, [sp], #16
+;   ldp x23, x24, [sp], #16
+;   ldp x25, x26, [sp], #16
+;   ldp x27, x28, [sp], #16
+;   ldp fp, lr, [sp], #16
+;   ret
+; block2:
+;   ldr q1, [sp]
+;   add w0, w0, #1
+;   movi v0.2s, #0
+;   add sp, sp, #16
+;   ldp d8, d9, [sp], #16
+;   ldp d10, d11, [sp], #16
+;   ldp d12, d13, [sp], #16
+;   ldp d14, d15, [sp], #16
+;   ldp x19, x20, [sp], #16
+;   ldp x21, x22, [sp], #16
+;   ldp x23, x24, [sp], #16
+;   ldp x25, x26, [sp], #16
+;   ldp x27, x28, [sp], #16
+;   ldp fp, lr, [sp], #16
+;   ret
+;
+; Disassembled:
+; block0: ; offset 0x0
+;   stp x29, x30, [sp, #-0x10]!
+;   mov x29, sp
+;   stp x27, x28, [sp, #-0x10]!
+;   stp x25, x26, [sp, #-0x10]!
+;   stp x23, x24, [sp, #-0x10]!
+;   stp x21, x22, [sp, #-0x10]!
+;   stp x19, x20, [sp, #-0x10]!
+;   stp d14, d15, [sp, #-0x10]!
+;   stp d12, d13, [sp, #-0x10]!
+;   stp d10, d11, [sp, #-0x10]!
+;   stp d8, d9, [sp, #-0x10]!
+;   sub sp, sp, #0x10
+; block1: ; offset 0x30
+;   fmov d1, #1.00000000
+;   stur q1, [sp]
+;   ldr x11, #0x40
+;   b #0x48
+;   .byte 0x00, 0x00, 0x00, 0x00 ; reloc_external Abs8 %g 0
+;   .byte 0x00, 0x00, 0x00, 0x00
+;   mov x2, x0
+;   blr x11
+; block2: ; offset 0x50
+;   mov w0, #1
+;   ldur q1, [sp]
+;   add sp, sp, #0x10
+;   ldp d8, d9, [sp], #0x10
+;   ldp d10, d11, [sp], #0x10
+;   ldp d12, d13, [sp], #0x10
+;   ldp d14, d15, [sp], #0x10
+;   ldp x19, x20, [sp], #0x10
+;   ldp x21, x22, [sp], #0x10
+;   ldp x23, x24, [sp], #0x10
+;   ldp x25, x26, [sp], #0x10
+;   ldp x27, x28, [sp], #0x10
+;   ldp x29, x30, [sp], #0x10
+;   ret
+; block3: ; offset 0x88
+;   ldur q1, [sp]
+;   add w0, w0, #1
+;   movi v0.2s, #0
+;   add sp, sp, #0x10
+;   ldp d8, d9, [sp], #0x10
+;   ldp d10, d11, [sp], #0x10
+;   ldp d12, d13, [sp], #0x10
+;   ldp d14, d15, [sp], #0x10
+;   ldp x19, x20, [sp], #0x10
+;   ldp x21, x22, [sp], #0x10
+;   ldp x23, x24, [sp], #0x10
+;   ldp x25, x26, [sp], #0x10
+;   ldp x27, x28, [sp], #0x10
+;   ldp x29, x30, [sp], #0x10
+;   ret
+

cranelift/filetests/filetests/isa/pulley32/exceptions.clif

@@ -147,4 +147,3 @@ function %f0(i32) -> i32, f32, f64 {
 ; fload64le_o32 f31, sp, 16
 ; pop_frame_restore 272, x16, x17, x18, x19, x20, x21, x22, x23, x24, x25, x26, x27, x28, x29, sp, spilltmp0
 ; ret
-

cranelift/filetests/filetests/isa/pulley64/exceptions.clif

@@ -148,4 +148,3 @@ function %f0(i32) -> i32, f32, f64 {
 ; fload64le_o32 f31, sp, 16
 ; pop_frame_restore 272, x16, x17, x18, x19, x20, x21, x22, x23, x24, x25, x26, x27, x28, x29, sp, spilltmp0
 ; ret
-