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Improve AArch64 codegen
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  • cranelift/codegen/src/isa/aarch64/inst

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cranelift/codegen/src/isa/aarch64/inst/emit.rs

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -23,10 +23,10 @@ pub fn memlabel_finalize(_insn_off: CodeOffset, label: &MemLabel) -> i32 {
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/// is used when relative 26-bit call instructions won't cut it and a longer
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/// jump is needed.
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///
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/// This generats:
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/// This generates:
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///
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/// adr x16, 16
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/// ldur x16, [x17]
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/// ldr x16, 16
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/// adr x17, 12
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/// add x16, x16, x17
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/// br x16
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///
@@ -36,10 +36,10 @@ pub fn memlabel_finalize(_insn_off: CodeOffset, label: &MemLabel) -> i32 {
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/// Note that this is part of the `MachBackend::gen_jump_veneer` contract.
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pub fn gen_jump_veneer() -> (u32, u32, u32, u32) {
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(
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// ldr x16, 16
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enc_ldst_imm19(0b01011000, 16 / 4, xreg(16)),
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// adr x17, 16
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enc_adr(16, writable_xreg(17)),
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// ldr x16, [x17]
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enc_ldst_simm9(0b1111100001, SImm9::zero(), 0b00, xreg(17), xreg(16)),
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enc_adr(12, writable_xreg(17)),
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// add x16, x16, x17
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enc_arith_rrr(0b10001011_000, 0, writable_xreg(16), xreg(16), xreg(17)),
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// br x16

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