@@ -2538,28 +2538,28 @@ aot_compile_func(AOTCompContext *comp_ctx, uint32 func_index)
25382538    return  false;
25392539}
25402540
2541- /* Check whether does  the target support  hardware atomic instructions */ 
2541+ /* Check whether the target supports  hardware atomic instructions */ 
25422542static  bool 
2543- aot_has_atomics (AOTCompContext  * comp_ctx )
2543+ aot_require_lower_atomic_pass (AOTCompContext  * comp_ctx )
25442544{
2545-     bool  ret  =  true ;
2545+     bool  ret  =  false ;
25462546    if  (!strncmp (comp_ctx -> target_arch , "riscv" , 5 )) {
25472547        char  * feature  = 
25482548            LLVMGetTargetMachineFeatureString (comp_ctx -> target_machine );
25492549
25502550        if  (feature ) {
25512551            if  (!strstr (feature , "+a" )) {
2552-                 ret  =  false ;
2552+                 ret  =  true ;
25532553            }
25542554            LLVMDisposeMessage (feature );
25552555        }
25562556    }
25572557    return  ret ;
25582558}
25592559
2560- /* Check whether does  the target need  to expand switch to if/else */ 
2560+ /* Check whether the target needs  to expand switch to if/else */ 
25612561static  bool 
2562- aot_has_lower_switch (AOTCompContext  * comp_ctx )
2562+ aot_require_lower_switch_pass (AOTCompContext  * comp_ctx )
25632563{
25642564    bool  ret  =  false;
25652565
@@ -2668,10 +2668,10 @@ aot_compile_wasm(AOTCompContext *comp_ctx)
26682668
26692669        aot_add_expand_memory_op_pass (common_pass_mgr );
26702670
2671-         if  (! aot_has_atomics (comp_ctx ))
2671+         if  (aot_require_lower_atomic_pass (comp_ctx ))
26722672            LLVMAddLowerAtomicPass (common_pass_mgr );
26732673
2674-         if  (aot_has_lower_switch (comp_ctx ))
2674+         if  (aot_require_lower_switch_pass (comp_ctx ))
26752675            LLVMAddLowerSwitchPass (common_pass_mgr );
26762676
26772677        LLVMRunPassManager (common_pass_mgr , comp_ctx -> module );
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