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[CIR][ABI][AArch64][Lowering] Support structures with padding (llvm#1118)
The title describes the purpose of the PR. It adds initial support for structures with padding to the call convention lowering for AArch64. I have also _initial support_ for the missing feature [FinishLayout](https://github.com/llvm/clangir/blob/5c5d58402bebdb1e851fb055f746662d4e7eb586/clang/lib/AST/RecordLayoutBuilder.cpp#L786) for records, and the logic is gotten from the original codegen. Finally, I added a test for verification.
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clang/test/CIR/CallConvLowering/AArch64/aarch64-cc-structs.c

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@@ -230,3 +230,32 @@ void callS() {
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S s;
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passS(s);
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}
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typedef struct {
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uint8_t a;
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uint16_t b;
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uint8_t c;
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} S_PAD;
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// CHECK: cir.func {{.*@ret_s_pad}}() -> !u48i
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// CHECK: %[[#V0:]] = cir.alloca !ty_S_PAD, !cir.ptr<!ty_S_PAD>, ["__retval"] {alignment = 2 : i64}
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// CHECK: %[[#V1:]] = cir.load %[[#V0]] : !cir.ptr<!ty_S_PAD>, !ty_S_PAD
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// CHECK: %[[#V2:]] = cir.alloca !u48i, !cir.ptr<!u48i>, [""] {alignment = 2 : i64}
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// CHECK: %[[#V3:]] = cir.cast(bitcast, %[[#V0]] : !cir.ptr<!ty_S_PAD>)
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// CHECK: %[[#V4:]] = cir.cast(bitcast, %[[#V2:]] : !cir.ptr<!u48i>), !cir.ptr<!void>
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// CHECK: %[[#V5:]] = cir.const #cir.int<6> : !u64i
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// CHECK: cir.libc.memcpy %[[#V5]] bytes from %[[#V3]] to %[[#V4]] : !u64i, !cir.ptr<!void>
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// CHECK: %[[#V6:]] = cir.load %[[#V2]] : !cir.ptr<!u48i>
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// CHECK: cir.return %[[#V6]]
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// LLVM: i48 @ret_s_pad()
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// LLVM: %[[#V1:]] = alloca %struct.S_PAD, i64 1, align 2
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// LLVM: %[[#V2:]] = load %struct.S_PAD, ptr %[[#V1]], align 2
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// LLVM: %[[#V3:]] = alloca i48, i64 1, align 2
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// LLVM: call void @llvm.memcpy.p0.p0.i64(ptr %[[#V3]], ptr %[[#V1]], i64 6, i1 false)
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// LLVM: %[[#V4:]] = load i48, ptr %[[#V3]]
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// LLVM: ret i48 %[[#V4]]
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S_PAD ret_s_pad() {
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S_PAD s;
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return s;
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}

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