We've been holding a Twitter Space weekly on Mondays at 5p for about an hour. In addition to @bcantrill and @ahl, speakers included special guest Tom Lyon plus Joshua Clulow, Dan McDonald, Dan Cross, Tom Killalea, Theo Schlossnagle, Antranig Vartanian, and @perlhack.
We recorded the space; the recording is here.
Some of the topics we hit on, in the order that we hit them:
-
@2:06 SPARC 30th anniversary dinner
SPARC was an amazing achievement for its time, but there were some nasty trade-offs made.
-
@2:56 illumos announcement on the end of SPARC support
-
@4:37 "There is no photography allowed in the bring-up lab" story
- SPARCstation 1 (code-named Campus)
They bricked their first CPU..
-
@6:23 UltraSPARC-II E-cache parity error
-
Most people don't know, about that first SPARC, there was no integer multiply or divide..
It would trap on the instructions.I feel so decadent, I've just been sprinkling multiplications around my code for years.
-
@9:55 popc instruction (also called Hamming Weight)
- IBM Stretch 1961, and the one-of-a-kind IBM Harvest made for the NSA
- Henry Warren's 2002 Hacker's Delight Ch. 5 shows a ~20 instruction algorithm (no branches, only adds/shifts/masks by constants)
Warren: According to computer folklore, the population count function is important to the National Security Agency. No one (outside of NSA) seems to know just what they use it for, but it may be in cryptography work or in searching huge amounts of material.
- According to Agner Fog,
Ice Lake
performs
popcntwith a 3 cycle latency, and Zen 3 with just 1 cycle latency. - Phil Bagwell's 2001 Ideal Hash Trees depend on pop count
Bagwell: Note that the performance of the algorithm is seriously impacted by the poor execution speed of the POPCT emulation in Java, a problem the Java designers may wish to address.
- Persistent versions of Bagwell's trees are used for the built-in hash maps of Clojure, and in libraries for Scala etc.
-
@11:39 This was the debate between Roger Faulkner and Jeff Bonwick: register windows
- Roger Faulkner (RIP) thought they were horrific
-
@12:35 Register fishing: Bryan's version and Adam's version
When you want to know the state of some other process, you have to flush those register windows to memory to be able to recover the stack trace.
We sat around the lunch table talking about how crazy it would be to have a branch that executed right after a branch.
- DCTI couple (delayed control transfer instruction)
- @15:31 "Well, the instruction set doesn't allow that.." story
Bedlam. As far as Solaris kernel discussions go, bedlam.
-
@22:17 Praise for SPARC
When we were porting Solaris to x86, and deciding what fraction of the address space would belong to the kernel vs the user, it felt disgusting to me.
-
They just didn't have the room to cram a hardware page table walk into the chip.
- MIPS would give you a trap on a VAC conflict (virtual address cache)
-
@27:34 It was slow, it was late, and it had a lot of problems, it was wrong.
- UltraSPARC-III, code-named "Cheetah"
It's weird, I compile this thing over and over, and every 80th time when I compile and run it, it's 40x slower..
- UltraSPARC-IV+, code-named "Panther"
-
@32:17 Does the Viking I-cache bug ring a bell?
- SuperSPARC, code-named "Viking"
You'd have to DC balance the I-cache. If you had too many zeros, they'd start flipping to ones.
- E-cache parity error
It was due to everything but high energy particle strikes.
- Radioactive boron in our SRAM manufacturing process
-
@38:52 "Move it further from the tube" story
When you're going to have a customer do something, you have to remember there's a human being on the other end of that. You cannot have them chasing your theories. You need to be transparent and honest with them.
-
@44:38 High priced consultants and cosmic rays
They literally lined the roof with lead.. and it didn't change the error rate at all!
-
@46:47 And the SRAM manufacturer was..
- We're competing with HP Superdome and..
-
@48:11 Aftermarket
- TurboSPARC
- Ross Technology
- Ultra 1, code-named "Electron"
-
@51:34 What's that tapping sound?
Seeing how that particular sausage was made, very very slowly, was discouraging.
- Regatta On a Chip
- UltraSPARC-T1, code-named "Niagara"
- @57:15 The only thing we could get to run fast was benchmarks..
- "Balanced" computing
-
@59:18 Sun Fire V880, code-named "Daktari"
-
@1:04:14 RISC
- Stanford MIPS, Berkeley RISC, IBM 801, IBM POWER
- Oral History of David Patterson
A bunch of grad students at Stanford and Berkeley were able to make a CPU that was faster than the industry. RISC was a very big deal when it happened.
-
@1:06:04 Intel 432 "The only constants you need are 0 and 1"
- Revisiting the Intel 432
- Robert Colwell's "Performance Effects of Architectural Complexity in the Intel 432" paper
-
@1:09:12 Machine learning in the 80s?
- Bill Joy: Open Systems Imperative video ~53mins
- Bill Joy: The Future Doesn't Need Us, ca. 2000
-
@1:11:37 The best historical analog for Oxide?
I loved that it was deliberate hardware-software co-design.
- IBM AS/400
Bill is amazing. He's clearly the smartest person I've ever known. But you never know what time scale he's operating in, whether he's telling you to do something for tomorrow or for the next century.
- Optative voice
- @1:14:42
How early in Sun's history were people talking about doing their own CPU?
- Laura's blog entry on the LPC55 vulnerability
- Scout threads
- @1:17:11 Finding SPARC bugs
I had a little Sun 4c that I had cranked up to 26k hertz, and at 26k hertz it stopped at the banner message. And I came in the next morning and it was at the login prompt! This little poor machine had managed to boot! I hit enter and it immediately panicked.
- Processor state register (PSR), processor interrupt level (PIL)
- @1:20:35 OpenBoot, Forth
- @1:21:54 Long lived E10K, code-named "Starfire"
- @1:24:01 Invasive physical attacks
- Tom Lyon and Joseph Skudlarek's USENIX 1985 paper: All The Chips That Fit
- Sun keyboard photo
- @1:29:56
The real secret of Sun's success is that we built them to make ourselves happy.
Open source software in general, you develop it for yourself. That way there's at least one person who likes it.
(Did we miss anything? PRs always welcome!)
Our next Twitter Space will be on May 17th, 2021 at 5p Pacific! Join us; we always love to hear from new speakers!