Skip to content

Commit e7c8e0b

Browse files
committed
cpu/stm32f1: fixed pull selection in GPIO driver
1 parent d79a662 commit e7c8e0b

File tree

2 files changed

+16
-11
lines changed

2 files changed

+16
-11
lines changed

cpu/stm32f1/include/periph_cpu.h

+8-7
Original file line numberDiff line numberDiff line change
@@ -62,11 +62,12 @@ typedef uint32_t gpio_t;
6262
* @brief Generate GPIO mode bitfields
6363
*
6464
* We use 4 bit to determine the pin functions:
65+
* - bit 4: ODR value
6566
* - bit 2+3: in/out
6667
* - bit 1: PU enable
6768
* - bit 2: OD enable
6869
*/
69-
#define GPIO_MODE(mode, cnf) (mode | (cnf << 2))
70+
#define GPIO_MODE(mode, cnf, odr) (mode | (cnf << 2) | (odr << 4))
7071

7172
/**
7273
* @brief Override GPIO mode options
@@ -76,12 +77,12 @@ typedef uint32_t gpio_t;
7677
*/
7778
#define HAVE_GPIO_MODE_T
7879
typedef enum {
79-
GPIO_IN = GPIO_MODE(0, 1), /**< input w/o pull R */
80-
GPIO_IN_PD = GPIO_MODE(0, 2), /**< input with pull-down */
81-
GPIO_IN_PU = GPIO_MODE(0, 2), /**< input with pull-up */
82-
GPIO_OUT = GPIO_MODE(3, 0), /**< push-pull output */
83-
GPIO_OD = GPIO_MODE(3, 1), /**< open-drain w/o pull R */
84-
GPIO_OD_PU = (0xff) /**< not supported by HW */
80+
GPIO_IN = GPIO_MODE(0, 1, 0), /**< input w/o pull R */
81+
GPIO_IN_PD = GPIO_MODE(0, 2, 0), /**< input with pull-down */
82+
GPIO_IN_PU = GPIO_MODE(0, 2, 1), /**< input with pull-up */
83+
GPIO_OUT = GPIO_MODE(3, 0, 0), /**< push-pull output */
84+
GPIO_OD = GPIO_MODE(3, 1, 0), /**< open-drain w/o pull R */
85+
GPIO_OD_PU = (0xff) /**< not supported by HW */
8586
} gpio_mode_t;
8687
/** @} */
8788

cpu/stm32f1/periph/gpio.c

+8-4
Original file line numberDiff line numberDiff line change
@@ -35,6 +35,12 @@
3535
*/
3636
#define GPIO_ISR_CHAN_NUMOF (16U)
3737

38+
/**
39+
* @brief Extract information from mode parameter
40+
*/
41+
#define MODE_MASK (0x0f)
42+
#define ODR_POS (4U)
43+
3844
/**
3945
* @brief Allocate memory for one callback and argument per EXTI channel
4046
*/
@@ -83,12 +89,10 @@ int gpio_init(gpio_t pin, gpio_mode_t mode)
8389

8490
/* set pin mode */
8591
port->CR[pin_num >> 3] &= ~(0xf << ((pin_num & 0x7) * 4));
86-
port->CR[pin_num >> 3] |= (mode << ((pin_num & 0x7) * 4));
92+
port->CR[pin_num >> 3] |= ((mode & MODE_MASK) << ((pin_num & 0x7) * 4));
8793
/* set initial state of output register */
8894
port->BRR = (1 << pin_num);
89-
if (mode == GPIO_IN_PU) {
90-
port->BSRR = (1 << pin_num);
91-
}
95+
port->BSRR = ((mode >> ODR_POS) << pin_num);
9296

9397
return 0; /* all OK */
9498
}

0 commit comments

Comments
 (0)