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cpu/saml21: adapted GPIO driver
1 parent d3b21dd commit 9bd848f

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3 files changed

+54
-28
lines changed

3 files changed

+54
-28
lines changed

cpu/saml21/include/periph_cpu.h

+25
Original file line numberDiff line numberDiff line change
@@ -33,6 +33,31 @@ enum {
3333
PB = 1, /**< port B */
3434
};
3535

36+
/**
37+
* @brief Generate GPIO mode bitfields
38+
*
39+
* We use 3 bit to determine the pin functions:
40+
* - bit 0: PU or PU
41+
* - bit 1: input enable
42+
* - bit 2: pull enable
43+
*/
44+
#define GPIO_MODE(pr, ie, pe) (pr | (ie << 1) | (pe << 2))
45+
46+
/**
47+
* @brief Override GPIO modes
48+
* @{
49+
*/
50+
#define HAVE_GPIO_MODE_T
51+
typedef enum {
52+
GPIO_IN = GPIO_MODE(0, 1, 0), /**< IN */
53+
GPIO_IN_PD = GPIO_MODE(0, 1, 1), /**< IN with pull-down */
54+
GPIO_IN_PU = GPIO_MODE(1, 1, 1), /**< IN with pull-up */
55+
GPIO_OUT = GPIO_MODE(0, 0, 0), /**< OUT (push-pull) */
56+
GPIO_OD = 0xfe, /**< not supported by HW */
57+
GPIO_OD_PU = 0xff /**< not supported by HW */
58+
} gpio_mode_t;
59+
/** @} */
60+
3661
#ifdef __cplusplus
3762
}
3863
#endif

cpu/saml21/periph/gpio.c

+26-25
Original file line numberDiff line numberDiff line change
@@ -41,6 +41,11 @@
4141
*/
4242
#define NUMOF_IRQS (16U)
4343

44+
/**
45+
* @brief Mask to get PINCFG reg value from mode value
46+
*/
47+
#define MODE_PINCFG_MASK (0x06)
48+
4449
/**
4550
* @brief Mapping of pins to EXTI lines, -1 means not EXTI possible
4651
*/
@@ -89,42 +94,38 @@ void gpio_init_mux(gpio_t pin, gpio_mux_t mux)
8994
port->PMUX[pin_pos >> 1].reg |= (mux << (4 * (pin_pos & 0x1)));
9095
}
9196

92-
int gpio_init(gpio_t pin, gpio_dir_t dir, gpio_pp_t pushpull)
97+
int gpio_init(gpio_t pin, gpio_mode_t mode)
9398
{
9499
PortGroup* port = _port(pin);
95100
int pin_pos = _pin_pos(pin);
96101
int pin_mask = _pin_mask(pin);
97102

98-
/* configure the pin's pull resistor and reset all other configuration */
99-
switch (pushpull) {
100-
case GPIO_PULLDOWN:
101-
port->OUTCLR.reg = pin_mask;
102-
port->PINCFG[pin_pos].reg = PORT_PINCFG_PULLEN;
103-
break;
104-
case GPIO_PULLUP:
105-
port->OUTSET.reg = pin_mask;
106-
port->PINCFG[pin_pos].reg = PORT_PINCFG_PULLEN;
107-
break;
108-
case GPIO_NOPULL:
109-
port->PINCFG[pin_pos].reg = 0;
110-
break;
103+
/* make sure pin mode is applicable */
104+
if (mode > 0x7) {
105+
return -1;
111106
}
112-
/* set pin_pos direction */
113-
if (dir == GPIO_DIR_OUT) {
114-
if (pushpull == GPIO_PULLDOWN) {
115-
return -1;
116-
}
117-
port->DIRSET.reg = pin_mask; /* configure as output */
118-
port->OUTCLR.reg = pin_mask; /* set pin LOW on init */
107+
108+
/* set pin direction */
109+
if (mode & 0x2) {
110+
port->DIRCLR.reg = pin_mask;
119111
}
120112
else {
121-
port->DIRCLR.reg = pin_mask; /* configure as input */
122-
port->PINCFG[pin_pos].reg |= PORT_PINCFG_INEN;
113+
port->DIRSET.reg = pin_mask;
123114
}
115+
116+
/* configure the pin cfg and clear output register */
117+
port->PINCFG[pin_pos].reg = (mode & MODE_PINCFG_MASK);
118+
port->OUTCLR.reg = pin_mask;
119+
120+
/* and set pull-up/pull-down if applicable */
121+
if (mode == 0x7) {
122+
port->OUTSET.reg = pin_mask;
123+
}
124+
124125
return 0;
125126
}
126127

127-
int gpio_init_int(gpio_t pin, gpio_pp_t pullup, gpio_flank_t flank,
128+
int gpio_init_int(gpio_t pin, gpio_mode_t mode, gpio_flank_t flank,
128129
gpio_cb_t cb, void *arg)
129130
{
130131
int exti = _exti(pin);
@@ -138,7 +139,7 @@ int gpio_init_int(gpio_t pin, gpio_pp_t pullup, gpio_flank_t flank,
138139
gpio_config[exti].cb = cb;
139140
gpio_config[exti].arg = arg;
140141
/* configure pin as input and set MUX to peripheral function A */
141-
gpio_init(pin, GPIO_DIR_IN, pullup);
142+
gpio_init(pin, mode);
142143
gpio_init_mux(pin, GPIO_MUX_A);
143144
/* enable clocks for the EIC module */
144145
MCLK->APBAMASK.reg |= MCLK_APBAMASK_EIC;

cpu/saml21/periph/spi.c

+3-3
Original file line numberDiff line numberDiff line change
@@ -134,10 +134,10 @@ int spi_init_master(spi_t dev, spi_conf_t conf, spi_speed_t speed)
134134
while (!(GCLK->PCHCTRL[spi[dev].gclk_id].reg & GCLK_PCHCTRL_CHEN)) {}
135135

136136
/* SCLK+MOSI = output */
137-
gpio_init(spi[dev].sclk.pin, GPIO_DIR_OUT, GPIO_NOPULL);
138-
gpio_init(spi[dev].mosi.pin, GPIO_DIR_OUT, GPIO_NOPULL);
137+
gpio_init(spi[dev].sclk.pin, GPIO_OUT);
138+
gpio_init(spi[dev].mosi.pin, GPIO_OUT);
139139
/* MISO = input */
140-
gpio_init(spi[dev].miso.pin, GPIO_DIR_IN, GPIO_PULLUP);
140+
gpio_init(spi[dev].miso.pin, GPIO_IN);
141141

142142
/*
143143
* Set alternate funcion (PMUX) for our ports.

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