[spec] Fix v128.loadX_splat in instruction index (WebAssembly#1477)

Author: ictrobot

document/core/appendix/gen-index-instructions.py

@@ -331,14 +331,6 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat
     Instruction(r'\TABLEGROW~x', r'\hex{FC}~\hex{0F}', r'[t~\I32] \to [\I32]', r'valid-table.grow', r'exec-table.grow'),
     Instruction(r'\TABLESIZE~x', r'\hex{FC}~\hex{10}', r'[] \to [\I32]', r'valid-table.size', r'exec-table.size'),
     Instruction(r'\TABLEFILL~x', r'\hex{FC}~\hex{11}', r'[\I32~t~\I32] \to []', r'valid-table.fill', r'exec-table.fill'),
-    Instruction(r'\I32.\TRUNC\K{\_sat\_}\F32\K{\_s}', r'\hex{FC}~~0', r'[\F32] \to [\I32]', r'valid-cvtop', r'exec-cvtop', r'op-trunc_sat_s'),
-    Instruction(r'\I32.\TRUNC\K{\_sat\_}\F32\K{\_u}', r'\hex{FC}~~1', r'[\F32] \to [\I32]', r'valid-cvtop', r'exec-cvtop', r'op-trunc_sat_u'),
-    Instruction(r'\I32.\TRUNC\K{\_sat\_}\F64\K{\_s}', r'\hex{FC}~~2', r'[\F64] \to [\I32]', r'valid-cvtop', r'exec-cvtop', r'op-trunc_sat_s'),
-    Instruction(r'\I32.\TRUNC\K{\_sat\_}\F64\K{\_u}', r'\hex{FC}~~3', r'[\F64] \to [\I32]', r'valid-cvtop', r'exec-cvtop', r'op-trunc_sat_u'),
-    Instruction(r'\I64.\TRUNC\K{\_sat\_}\F32\K{\_s}', r'\hex{FC}~~4', r'[\F32] \to [\I64]', r'valid-cvtop', r'exec-cvtop', r'op-trunc_sat_s'),
-    Instruction(r'\I64.\TRUNC\K{\_sat\_}\F32\K{\_u}', r'\hex{FC}~~5', r'[\F32] \to [\I64]', r'valid-cvtop', r'exec-cvtop', r'op-trunc_sat_u'),
-    Instruction(r'\I64.\TRUNC\K{\_sat}\_\F64\K{\_s}', r'\hex{FC}~~6', r'[\F64] \to [\I64]', r'valid-cvtop', r'exec-cvtop', r'op-trunc_sat_s'),
-    Instruction(r'\I64.\TRUNC\K{\_sat\_}\F64\K{\_u}', r'\hex{FC}~~7', r'[\F64] \to [\I64]', r'valid-cvtop', r'exec-cvtop', r'op-trunc_sat_u'),
     Instruction(r'\V128.\LOAD~x~\memarg', r'\hex{FD}~~\hex{00}', r'[\I32] \to [\V128]', r'valid-load', r'exec-load'),
     Instruction(r'\I16X8.\LOAD\K{8x8\_s}~x~\memarg', r'\hex{FD}~~\hex{01}', r'[\I32] \to [\V128]', r'valid-load-extend', r'exec-load-extend'),
     Instruction(r'\I16X8.\LOAD\K{8x8\_u}~x~\memarg', r'\hex{FD}~~\hex{02}', r'[\I32] \to [\V128]', r'valid-load-extend', r'exec-load-extend'),

document/core/appendix/index-instructions.rst

@@ -286,10 +286,10 @@ Instruction                                        Binary Opcode
 :math:`\V128.\LOAD\K{16x4\_u}~\memarg`             :math:`\hex{FD}~~\hex{04}`            :math:`[\I32] \to [\V128]`                     :ref:`validation <valid-load-extend>`          :ref:`execution <exec-load-extend>`                               
 :math:`\V128.\LOAD\K{32x2\_s}~\memarg`             :math:`\hex{FD}~~\hex{05}`            :math:`[\I32] \to [\V128]`                     :ref:`validation <valid-load-extend>`          :ref:`execution <exec-load-extend>`                               
 :math:`\V128.\LOAD\K{32x2\_u}~\memarg`             :math:`\hex{FD}~~\hex{06}`            :math:`[\I32] \to [\V128]`                     :ref:`validation <valid-load-extend>`          :ref:`execution <exec-load-extend>`                               
-:math:`\V128.\LOAD\K{\_splat}~\memarg`             :math:`\hex{FD}~~\hex{07}`            :math:`[\I32] \to [\V128]`                     :ref:`validation <valid-load-splat>`           :ref:`execution <exec-load-splat>`                                
-:math:`\V128.\LOAD\K{\_splat}~\memarg`             :math:`\hex{FD}~~\hex{08}`            :math:`[\I32] \to [\V128]`                     :ref:`validation <valid-load-splat>`           :ref:`execution <exec-load-splat>`                                
-:math:`\V128.\LOAD\K{\_splat}~\memarg`             :math:`\hex{FD}~~\hex{09}`            :math:`[\I32] \to [\V128]`                     :ref:`validation <valid-load-splat>`           :ref:`execution <exec-load-splat>`                                
-:math:`\V128.\LOAD\K{\_splat}~\memarg`             :math:`\hex{FD}~~\hex{0A}`            :math:`[\I32] \to [\V128]`                     :ref:`validation <valid-load-splat>`           :ref:`execution <exec-load-splat>`                                
+:math:`\V128.\LOAD\K{8\_splat}~\memarg`            :math:`\hex{FD}~~\hex{07}`            :math:`[\I32] \to [\V128]`                     :ref:`validation <valid-load-splat>`           :ref:`execution <exec-load-splat>`                                
+:math:`\V128.\LOAD\K{16\_splat}~\memarg`           :math:`\hex{FD}~~\hex{08}`            :math:`[\I32] \to [\V128]`                     :ref:`validation <valid-load-splat>`           :ref:`execution <exec-load-splat>`                                
+:math:`\V128.\LOAD\K{32\_splat}~\memarg`           :math:`\hex{FD}~~\hex{09}`            :math:`[\I32] \to [\V128]`                     :ref:`validation <valid-load-splat>`           :ref:`execution <exec-load-splat>`                                
+:math:`\V128.\LOAD\K{64\_splat}~\memarg`           :math:`\hex{FD}~~\hex{0A}`            :math:`[\I32] \to [\V128]`                     :ref:`validation <valid-load-splat>`           :ref:`execution <exec-load-splat>`                                
 :math:`\V128.\STORE~\memarg`                       :math:`\hex{FD}~~\hex{0B}`            :math:`[\I32~\V128] \to []`                    :ref:`validation <valid-store>`                :ref:`execution <exec-store>`                                     
 :math:`\V128.\VCONST~\i128`                        :math:`\hex{FD}~~\hex{0C}`            :math:`[] \to [\V128]`                         :ref:`validation <valid-vconst>`               :ref:`execution <exec-vconst>`                                    
 :math:`\I8X16.\SHUFFLE~\laneidx^{16}`              :math:`\hex{FD}~~\hex{0D}`            :math:`[\V128~\V128] \to [\V128]`              :ref:`validation <valid-vec-shuffle>`          :ref:`execution <exec-vec-shuffle>`