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Format code according to conventions (#15193)
1 parent b06740c commit 2c5d669

35 files changed

+578
-518
lines changed

drivers/qwiic/micro_oled.c

+1-1
Original file line numberDiff line numberDiff line change
@@ -149,7 +149,7 @@ void micro_oled_init(void) {
149149
#endif
150150

151151
send_command(MEMORYMODE);
152-
send_command(0x02); // 0x02 = 10b, Page addressing mode
152+
send_command(0x02); // 0x02 = 10b, Page addressing mode
153153

154154
send_command(SETCOMPINS); // 0xDA
155155
if (LCDHEIGHT > 32) {

drivers/sensors/adns5050.c

+8-15
Original file line numberDiff line numberDiff line change
@@ -17,7 +17,6 @@
1717
* along with this program. If not, see <http://www.gnu.org/licenses/>.
1818
*/
1919

20-
2120
#include "adns5050.h"
2221
#include "wait.h"
2322
#include "debug.h"
@@ -61,13 +60,9 @@ void adns_sync(void) {
6160
writePinHigh(ADNS_CS_PIN);
6261
}
6362

64-
void adns_cs_select(void) {
65-
writePinLow(ADNS_CS_PIN);
66-
}
63+
void adns_cs_select(void) { writePinLow(ADNS_CS_PIN); }
6764

68-
void adns_cs_deselect(void) {
69-
writePinHigh(ADNS_CS_PIN);
70-
}
65+
void adns_cs_deselect(void) { writePinHigh(ADNS_CS_PIN); }
7166

7267
uint8_t adns_serial_read(void) {
7368
setPinInput(ADNS_SDIO_PIN);
@@ -121,7 +116,7 @@ uint8_t adns_read_reg(uint8_t reg_addr) {
121116
// We don't need a minimum tSRAD here. That's because a 4ms wait time is
122117
// already included in adns_serial_write(), so we're good.
123118
// See page 10 and 15 of the ADNS spec sheet.
124-
//wait_us(4);
119+
// wait_us(4);
125120

126121
uint8_t byte = adns_serial_read();
127122

@@ -138,7 +133,7 @@ uint8_t adns_read_reg(uint8_t reg_addr) {
138133

139134
void adns_write_reg(uint8_t reg_addr, uint8_t data) {
140135
adns_cs_select();
141-
adns_serial_write( 0b10000000 | reg_addr );
136+
adns_serial_write(0b10000000 | reg_addr);
142137
adns_serial_write(data);
143138
adns_cs_deselect();
144139
}
@@ -155,7 +150,7 @@ report_adns_t adns_read_burst(void) {
155150
// We don't need a minimum tSRAD here. That's because a 4ms wait time is
156151
// already included in adns_serial_write(), so we're good.
157152
// See page 10 and 15 of the ADNS spec sheet.
158-
//wait_us(4);
153+
// wait_us(4);
159154

160155
uint8_t x = adns_serial_read();
161156
uint8_t y = adns_serial_read();
@@ -180,13 +175,11 @@ int8_t convert_twoscomp(uint8_t data) {
180175
}
181176

182177
// Don't forget to use the definitions for CPI in the header file.
183-
void adns_set_cpi(uint8_t cpi) {
184-
adns_write_reg(REG_MOUSE_CONTROL2, cpi);
185-
}
178+
void adns_set_cpi(uint8_t cpi) { adns_write_reg(REG_MOUSE_CONTROL2, cpi); }
186179

187180
bool adns_check_signature(void) {
188-
uint8_t pid = adns_read_reg(REG_PRODUCT_ID);
189-
uint8_t rid = adns_read_reg(REG_REVISION_ID);
181+
uint8_t pid = adns_read_reg(REG_PRODUCT_ID);
182+
uint8_t rid = adns_read_reg(REG_REVISION_ID);
190183
uint8_t pid2 = adns_read_reg(REG_PRODUCT_ID2);
191184

192185
return (pid == 0x12 && rid == 0x01 && pid2 == 0x26);

drivers/sensors/adns5050.h

+9-9
Original file line numberDiff line numberDiff line change
@@ -67,13 +67,13 @@ typedef struct {
6767
// A bunch of functions to implement the ADNS5050-specific serial protocol.
6868
// Note that the "serial.h" driver is insufficient, because it does not
6969
// manually manipulate a serial clock signal.
70-
void adns_init(void);
71-
void adns_sync(void);
72-
uint8_t adns_serial_read(void);
73-
void adns_serial_write(uint8_t data);
74-
uint8_t adns_read_reg(uint8_t reg_addr);
75-
void adns_write_reg(uint8_t reg_addr, uint8_t data);
70+
void adns_init(void);
71+
void adns_sync(void);
72+
uint8_t adns_serial_read(void);
73+
void adns_serial_write(uint8_t data);
74+
uint8_t adns_read_reg(uint8_t reg_addr);
75+
void adns_write_reg(uint8_t reg_addr, uint8_t data);
7676
report_adns_t adns_read_burst(void);
77-
int8_t convert_twoscomp(uint8_t data);
78-
void adns_set_cpi(uint8_t cpi);
79-
bool adns_check_signature(void);
77+
int8_t convert_twoscomp(uint8_t data);
78+
void adns_set_cpi(uint8_t cpi);
79+
bool adns_check_signature(void);

drivers/sensors/adns9800.c

+55-64
Original file line numberDiff line numberDiff line change
@@ -20,57 +20,57 @@
2020
#include "adns9800.h"
2121

2222
// registers
23-
#define REG_Product_ID 0x00
24-
#define REG_Revision_ID 0x01
25-
#define REG_Motion 0x02
26-
#define REG_Delta_X_L 0x03
27-
#define REG_Delta_X_H 0x04
28-
#define REG_Delta_Y_L 0x05
29-
#define REG_Delta_Y_H 0x06
30-
#define REG_SQUAL 0x07
31-
#define REG_Pixel_Sum 0x08
32-
#define REG_Maximum_Pixel 0x09
33-
#define REG_Minimum_Pixel 0x0a
34-
#define REG_Shutter_Lower 0x0b
35-
#define REG_Shutter_Upper 0x0c
36-
#define REG_Frame_Period_Lower 0x0d
37-
#define REG_Frame_Period_Upper 0x0e
38-
#define REG_Configuration_I 0x0f
39-
#define REG_Configuration_II 0x10
40-
#define REG_Frame_Capture 0x12
41-
#define REG_SROM_Enable 0x13
42-
#define REG_Run_Downshift 0x14
43-
#define REG_Rest1_Rate 0x15
44-
#define REG_Rest1_Downshift 0x16
45-
#define REG_Rest2_Rate 0x17
46-
#define REG_Rest2_Downshift 0x18
47-
#define REG_Rest3_Rate 0x19
48-
#define REG_Frame_Period_Max_Bound_Lower 0x1a
49-
#define REG_Frame_Period_Max_Bound_Upper 0x1b
50-
#define REG_Frame_Period_Min_Bound_Lower 0x1c
51-
#define REG_Frame_Period_Min_Bound_Upper 0x1d
52-
#define REG_Shutter_Max_Bound_Lower 0x1e
53-
#define REG_Shutter_Max_Bound_Upper 0x1f
54-
#define REG_LASER_CTRL0 0x20
55-
#define REG_Observation 0x24
56-
#define REG_Data_Out_Lower 0x25
57-
#define REG_Data_Out_Upper 0x26
58-
#define REG_SROM_ID 0x2a
59-
#define REG_Lift_Detection_Thr 0x2e
60-
#define REG_Configuration_V 0x2f
61-
#define REG_Configuration_IV 0x39
62-
#define REG_Power_Up_Reset 0x3a
63-
#define REG_Shutdown 0x3b
64-
#define REG_Inverse_Product_ID 0x3f
65-
#define REG_Motion_Burst 0x50
66-
#define REG_SROM_Load_Burst 0x62
67-
#define REG_Pixel_Burst 0x64
23+
#define REG_Product_ID 0x00
24+
#define REG_Revision_ID 0x01
25+
#define REG_Motion 0x02
26+
#define REG_Delta_X_L 0x03
27+
#define REG_Delta_X_H 0x04
28+
#define REG_Delta_Y_L 0x05
29+
#define REG_Delta_Y_H 0x06
30+
#define REG_SQUAL 0x07
31+
#define REG_Pixel_Sum 0x08
32+
#define REG_Maximum_Pixel 0x09
33+
#define REG_Minimum_Pixel 0x0a
34+
#define REG_Shutter_Lower 0x0b
35+
#define REG_Shutter_Upper 0x0c
36+
#define REG_Frame_Period_Lower 0x0d
37+
#define REG_Frame_Period_Upper 0x0e
38+
#define REG_Configuration_I 0x0f
39+
#define REG_Configuration_II 0x10
40+
#define REG_Frame_Capture 0x12
41+
#define REG_SROM_Enable 0x13
42+
#define REG_Run_Downshift 0x14
43+
#define REG_Rest1_Rate 0x15
44+
#define REG_Rest1_Downshift 0x16
45+
#define REG_Rest2_Rate 0x17
46+
#define REG_Rest2_Downshift 0x18
47+
#define REG_Rest3_Rate 0x19
48+
#define REG_Frame_Period_Max_Bound_Lower 0x1a
49+
#define REG_Frame_Period_Max_Bound_Upper 0x1b
50+
#define REG_Frame_Period_Min_Bound_Lower 0x1c
51+
#define REG_Frame_Period_Min_Bound_Upper 0x1d
52+
#define REG_Shutter_Max_Bound_Lower 0x1e
53+
#define REG_Shutter_Max_Bound_Upper 0x1f
54+
#define REG_LASER_CTRL0 0x20
55+
#define REG_Observation 0x24
56+
#define REG_Data_Out_Lower 0x25
57+
#define REG_Data_Out_Upper 0x26
58+
#define REG_SROM_ID 0x2a
59+
#define REG_Lift_Detection_Thr 0x2e
60+
#define REG_Configuration_V 0x2f
61+
#define REG_Configuration_IV 0x39
62+
#define REG_Power_Up_Reset 0x3a
63+
#define REG_Shutdown 0x3b
64+
#define REG_Inverse_Product_ID 0x3f
65+
#define REG_Motion_Burst 0x50
66+
#define REG_SROM_Load_Burst 0x62
67+
#define REG_Pixel_Burst 0x64
6868

6969
#define ADNS_CLOCK_SPEED 2000000
7070
#define MIN_CPI 200
7171
#define MAX_CPI 8200
7272
#define CPI_STEP 200
73-
#define CLAMP_CPI(value) value < MIN_CPI ? MIN_CPI : value > MAX_CPI ? MAX_CPI : value
73+
#define CLAMP_CPI(value) value<MIN_CPI ? MIN_CPI : value> MAX_CPI ? MAX_CPI : value
7474
#define SPI_MODE 3
7575
#define SPI_DIVISOR (F_CPU / ADNS_CLOCK_SPEED)
7676
#define US_BETWEEN_WRITES 120
@@ -80,23 +80,19 @@
8080

8181
extern const uint8_t firmware_data[];
8282

83-
void adns_spi_start(void){
84-
spi_start(SPI_SS_PIN, false, SPI_MODE, SPI_DIVISOR);
85-
}
86-
87-
void adns_write(uint8_t reg_addr, uint8_t data){
83+
void adns_spi_start(void) { spi_start(SPI_SS_PIN, false, SPI_MODE, SPI_DIVISOR); }
8884

85+
void adns_write(uint8_t reg_addr, uint8_t data) {
8986
adns_spi_start();
9087
spi_write(reg_addr | MSB1);
9188
spi_write(data);
9289
spi_stop();
9390
wait_us(US_BETWEEN_WRITES);
9491
}
9592

96-
uint8_t adns_read(uint8_t reg_addr){
97-
93+
uint8_t adns_read(uint8_t reg_addr) {
9894
adns_spi_start();
99-
spi_write(reg_addr & 0x7f );
95+
spi_write(reg_addr & 0x7f);
10096
uint8_t data = spi_read();
10197
spi_stop();
10298
wait_us(US_BETWEEN_READS);
@@ -105,7 +101,6 @@ uint8_t adns_read(uint8_t reg_addr){
105101
}
106102

107103
void adns_init() {
108-
109104
setPinOutput(SPI_SS_PIN);
110105

111106
spi_init();
@@ -144,7 +139,7 @@ void adns_init() {
144139

145140
// send all bytes of the firmware
146141
unsigned char c;
147-
for(int i = 0; i < FIRMWARE_LENGTH; i++){
142+
for (int i = 0; i < FIRMWARE_LENGTH; i++) {
148143
c = (unsigned char)pgm_read_byte(firmware_data + i);
149144
spi_write(c);
150145
wait_us(15);
@@ -161,28 +156,25 @@ void adns_init() {
161156

162157
config_adns_t adns_get_config(void) {
163158
uint8_t config_1 = adns_read(REG_Configuration_I);
164-
return (config_adns_t){ (config_1 & 0xFF) * CPI_STEP };
159+
return (config_adns_t){(config_1 & 0xFF) * CPI_STEP};
165160
}
166161

167162
void adns_set_config(config_adns_t config) {
168163
uint8_t config_1 = (CLAMP_CPI(config.cpi) / CPI_STEP) & 0xFF;
169164
adns_write(REG_Configuration_I, config_1);
170165
}
171166

172-
static int16_t convertDeltaToInt(uint8_t high, uint8_t low){
173-
167+
static int16_t convertDeltaToInt(uint8_t high, uint8_t low) {
174168
// join bytes into twos compliment
175169
uint16_t twos_comp = (high << 8) | low;
176170

177171
// convert twos comp to int
178-
if (twos_comp & 0x8000)
179-
return -1 * (~twos_comp + 1);
172+
if (twos_comp & 0x8000) return -1 * (~twos_comp + 1);
180173

181174
return twos_comp;
182175
}
183176

184177
report_adns_t adns_get_report(void) {
185-
186178
report_adns_t report = {0, 0};
187179

188180
adns_spi_start();
@@ -194,8 +186,7 @@ report_adns_t adns_get_report(void) {
194186

195187
uint8_t motion = spi_read();
196188

197-
if(motion & 0x80) {
198-
189+
if (motion & 0x80) {
199190
// clear observation register
200191
spi_read();
201192

drivers/sensors/adns9800.h

+2-2
Original file line numberDiff line numberDiff line change
@@ -28,8 +28,8 @@ typedef struct {
2828
int16_t y;
2929
} report_adns_t;
3030

31-
void adns_init(void);
31+
void adns_init(void);
3232
config_adns_t adns_get_config(void);
33-
void adns_set_config(config_adns_t);
33+
void adns_set_config(config_adns_t);
3434
/* Reads and clears the current delta values on the ADNS sensor */
3535
report_adns_t adns_get_report(void);

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