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| 1 | +/* |
| 2 | + * Licensed to the Apache Software Foundation (ASF) under one |
| 3 | + * or more contributor license agreements. See the NOTICE file |
| 4 | + * distributed with this work for additional information |
| 5 | + * regarding copyright ownership. The ASF licenses this file |
| 6 | + * to you under the Apache License, Version 2.0 (the |
| 7 | + * "License"); you may not use this file except in compliance |
| 8 | + * with the License. You may obtain a copy of the License at |
| 9 | + * |
| 10 | + * http://www.apache.org/licenses/LICENSE-2.0 |
| 11 | + * |
| 12 | + * Unless required by applicable law or agreed to in writing, |
| 13 | + * software distributed under the License is distributed on an |
| 14 | + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY |
| 15 | + * KIND, either express or implied. See the License for the |
| 16 | + * specific language governing permissions and limitations |
| 17 | + * under the License. |
| 18 | + */ |
| 19 | + |
| 20 | +/*! |
| 21 | + * \file tvm/relax/vm/bytecode.h |
| 22 | + * \brief The bytecode for the virtual machine. |
| 23 | + */ |
| 24 | +#ifndef TVM_RELAX_VM_BYTECODE_H_ |
| 25 | +#define TVM_RELAX_VM_BYTECODE_H_ |
| 26 | + |
| 27 | +#include <tvm/runtime/data_type.h> |
| 28 | +#include <tvm/runtime/logging.h> |
| 29 | + |
| 30 | +#include <iostream> |
| 31 | +#include <vector> |
| 32 | + |
| 33 | +namespace tvm { |
| 34 | +namespace runtime { |
| 35 | +namespace relax_vm { |
| 36 | + |
| 37 | + |
| 38 | +/*! |
| 39 | + * \brief The storage type for the bytecode in the VM. |
| 40 | + */ |
| 41 | +using ExecWord = int64_t; |
| 42 | + |
| 43 | +/*! \brief A register name. */ |
| 44 | +using RegName = ExecWord; |
| 45 | + |
| 46 | +/*! |
| 47 | + * \brief An alias for the integer type used ubiquitously in the VM. |
| 48 | + */ |
| 49 | +using Index = ExecWord; |
| 50 | + |
| 51 | +/*! |
| 52 | + * \brief An enumeration of Relax's opcodes. |
| 53 | + * |
| 54 | + * The opcode is used to implement instruction |
| 55 | + * as a tagged union. |
| 56 | + */ |
| 57 | +enum class Opcode { |
| 58 | + Call = 1U, |
| 59 | + Ret = 2U, |
| 60 | +}; |
| 61 | + |
| 62 | + |
| 63 | +/*! \brief A single virtual machine instruction. |
| 64 | + * |
| 65 | + * The representation of the instruction is as |
| 66 | + * a tagged union. |
| 67 | + * |
| 68 | + * The first field represents which instruction, |
| 69 | + * and by extension which field of the union |
| 70 | + * is active. |
| 71 | + */ |
| 72 | +struct Instruction { |
| 73 | + /*! \brief Random magic number that represents void argument. */ |
| 74 | + static constexpr RegName kVoidArg = 0x00EC66FE0321975A; |
| 75 | + /*! \brief Random magic number that represents the VM state. */ |
| 76 | + static constexpr RegName kVMStateRegister = 0x008D14FA4379015C; |
| 77 | + /*! |
| 78 | + * \brief The kind of instruction's argument. |
| 79 | + */ |
| 80 | + enum ArgKind { |
| 81 | + kRegister = 0, |
| 82 | + kImmediate = 1, |
| 83 | + kConstIdx = 2, |
| 84 | + }; |
| 85 | + /*! |
| 86 | + * \brief The auxiliary data structure for instruction argument. |
| 87 | + */ |
| 88 | + struct Arg { |
| 89 | + /*! \brief The number of bit for storing value. */ |
| 90 | + static constexpr ExecWord kValueBit = sizeof(ExecWord) * 8 - 8; |
| 91 | + /*! \brief The bit mask of the value part. */ |
| 92 | + static constexpr ExecWord kValueMask = (static_cast<ExecWord>(1) << kValueBit) - 1; |
| 93 | + /*! \brief Construct a void argument. */ |
| 94 | + explicit Arg() : data(Instruction::kVoidArg) {} |
| 95 | + /*! \brief Construct from the data. */ |
| 96 | + explicit Arg(ExecWord data) : data(data) {} |
| 97 | + /*! \brief Construct from the kind and value. */ |
| 98 | + Arg(ArgKind kind, Index value) { |
| 99 | + // TODO(ziheng): check value? |
| 100 | + this->data = (static_cast<ExecWord>(kind) << kValueBit) | |
| 101 | + (value & kValueMask); |
| 102 | + } |
| 103 | + /*! |
| 104 | + * \brief Get the kind of argument.. |
| 105 | + * \return The kind of argument. |
| 106 | + */ |
| 107 | + ArgKind kind() const { |
| 108 | + uint8_t kind = (data >> kValueBit) & 0xFF; |
| 109 | + return Instruction::ArgKind(kind); |
| 110 | + } |
| 111 | + /*! |
| 112 | + * \brief Get the value of argument.. |
| 113 | + * \return The value of argument. |
| 114 | + */ |
| 115 | + ExecWord value() const { |
| 116 | + return data & ((static_cast<ExecWord>(1) << kValueBit) - 1); |
| 117 | + } |
| 118 | + /*! \brief The underlying stored data. */ |
| 119 | + ExecWord data; |
| 120 | + }; |
| 121 | + /*! \brief The instruction opcode. */ |
| 122 | + Opcode op; |
| 123 | + /*! \brief The destination register. */ |
| 124 | + RegName dst; |
| 125 | + union { |
| 126 | + struct /* Call */ { |
| 127 | + /*! \brief The index into the packed function table. */ |
| 128 | + Index func_idx; |
| 129 | + /*! \brief The number of arguments to the packed function. */ |
| 130 | + Index num_args; |
| 131 | + /*! \brief The arguments of the packed function. */ |
| 132 | + Arg* args; |
| 133 | + }; |
| 134 | + struct /* Ret */ { |
| 135 | + /*! \brief The return result. */ |
| 136 | + RegName result; |
| 137 | + }; |
| 138 | + }; |
| 139 | + /*! |
| 140 | + * \brief Construct a Call instruction. |
| 141 | + * \param func_idx The index of the function to call. |
| 142 | + * \param num_args The number of arguments. |
| 143 | + * \param args The input arguments. |
| 144 | + * \param dst The destination register. |
| 145 | + * \return The call instruction. |
| 146 | + */ |
| 147 | + static Instruction Call(Index func_idx, Index num_args, |
| 148 | + Arg* args, |
| 149 | + RegName dst); |
| 150 | + /*! |
| 151 | + * \brief Construct a return instruction. |
| 152 | + * \param result The register containing the return value. |
| 153 | + * \return The return instruction. |
| 154 | + */ |
| 155 | + static Instruction Ret(RegName result); |
| 156 | +}; |
| 157 | + |
| 158 | +} // namespace relax_vm |
| 159 | +} // namespace runtime |
| 160 | +} // namespace tvm |
| 161 | + |
| 162 | +#endif // TVM_RELAX_VM_BYTECODE_H_ |
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