@@ -77,45 +77,27 @@ SYS_INIT(camera_ext_clock_enable, POST_KERNEL, CONFIG_CLOCK_CONTROL_PWM_INIT_PRI
7777#include <zephyr/devicetree.h>
7878#include <zephyr/multi_heap/shared_multi_heap.h>
7979
80- struct memory_region_t {
81- uintptr_t dt_addr ;
82- size_t dt_size ;
83- const char * dt_name ;
84- };
85-
86- #define _BUILD_MEM_REGION (node_id ) \
87- { .dt_addr = DT_REG_ADDR(node_id), \
88- .dt_size = DT_REG_SIZE(node_id), \
89- .dt_name = DT_PROP(node_id, zephyr_memory_region) \
90- },
91-
92- int smh_init (void )
93- {
80+ __stm32_sdram1_section static uint8_t __aligned (32 ) smh_pool [4 * 1024 * 1024 ];
81+
82+ int smh_init (void ) {
9483 int ret = 0 ;
9584 ret = shared_multi_heap_pool_init ();
9685 if (ret != 0 ) {
9786 return ret ;
9887 }
9988
100- const struct memory_region_t regions [] = {
101- DT_FOREACH_STATUS_OKAY (zephyr_memory_region , _BUILD_MEM_REGION )
89+ struct shared_multi_heap_region smh_sdram = {
90+ .addr = (uintptr_t ) smh_pool ,
91+ .size = sizeof (smh_pool ),
92+ .attr = SMH_REG_ATTR_EXTERNAL ,
10293 };
10394
104- for (size_t i = 0 ; i < ARRAY_SIZE (regions ); i ++ ) {
105- if (!strncmp ("SDRAM" , regions [i ].dt_name , 5 )) {
106- struct shared_multi_heap_region smh_sdram = {
107- .addr = regions [i ].dt_addr ,
108- .size = regions [i ].dt_size ,
109- .attr = SMH_REG_ATTR_EXTERNAL ,
110- };
111- ret = shared_multi_heap_add (& smh_sdram , NULL );
112- if (ret != 0 ) {
113- return ret ;
114- }
115- }
95+ ret = shared_multi_heap_add (& smh_sdram , NULL );
96+ if (ret != 0 ) {
97+ return ret ;
11698 }
11799 return 0 ;
118100}
119101
120102SYS_INIT (smh_init , POST_KERNEL , CONFIG_CLOCK_CONTROL_PWM_INIT_PRIORITY );
121- #endif
103+ #endif
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