SPI library does not limit the maximum SPI clock frequency as per the datasheet

[joseangeljimenez]

While the current SPI.h tries to safe-limit the maximum SPI clock frequency of the SAMD core, it does so in a weird way, assuming F_CPU to be always 48000000L and only for the SAMD21G18A part.
https://github.com/arduino/ArduinoCore-samd/blob/master/libraries/SPI/SPI.h

This has two problems,

• Will fail for the SAMD21G18A if F_CPU takes a different value.
• Will fail for any other SAMD21 parts, as the code relaxes lowers in this case the value of SPI_MIN_CLOCK_DIVIDER to 2.

A comment in the code also states that the maximum SPI clock frequency is not specified in the datasheet. However, it is. According to the datasheet for the SAM D21E, D21G and SAM D21J ("Atmel-42181I-SAM L21_Datasheet_Complete-03/2016"), page 997,

• tSCK SCK period in master mode is typically 84ns, which roughly translates into 11.9MHz.
• According to Atmel, the value above is based on simulation. It is not tested in production.

I have prepared a patch for correcting SPI.h so that it effectively limits the max SPI clock frequency to 12000000L, for all F_CPU values and all SAMD21 parts. Is it OK if I submit a pull request?

[sandeepmistry]

Hi @joseangeljimenez,

Yes, please go ahead an submit a pull request for this change.

[cmaglie]

tSCK SCK period in master mode is typically 84ns, which roughly translates into 11.9MHz.

I missed this part of the datasheet when I implemented the SPI lib the first time (anyway the datasheet provides the Typ value for tSCK but not the Max... probably 84ns should be intended as max?).

@joseangeljimenez
If you're are going to produce a PR, please add a note in the comments that refers to this part of the datasheet, thanks!

[joseangeljimenez]

I created pull request #292
Thank you!

[dhalbert]

Based on testing, a 24 MHz SPI can work, though it may be out of spec. Should Arduino limit the value to 12 Mhz, per #292, or should it simply be documented as "may not work"? Some discussion with further URL's in adafruit/circuitpython#560.

[joseangeljimenez]

Hi @dhalbert et al, let me clarify this a little bit more,

• 24 MHz can work absolutely fine (at least inside the MCU) and should not be considered overclocking. The SAMD21 datasheet specifies a typical SPI SCK period (tSCK) of 42 ns, which translates into a typical SPI clock of 23.8 MHz. Hence, a 24 MHz clock is within a 1 % tolerance with respect to the typical value given in the datasheet.

• Despite the previous, in my pull request Fix calculation of SPI_MIN_CLOCK_DIVIDER in SPI.h #292, I conservatively kept 12 MHz as the maximum clock for the SPI as this was the historical behavior of this code in the ArduinoCore repo.

• I guess the historical 12 MHz top is due to the potential issue that enthusiasts prototyping with "air wires" and breadboards, without a proper PCB and layout, will get a malfunctioning SPI bus at higher frequencies. But that is due to quick & dirty prototyping techniques not due to an issue with the SAMD chips.

• My main goal for the above pull request is that the SPI divider is calculated in the same way no matter which exact SAMD variant is used.

I hope this helps to clarify the issue and my motivations behind the pull request.