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[TableGen][NFC] Refactor/deduplicate emitAction. (llvm#137434)
Currently there is a fair amount of code duplication in various parts of emitAction. This patch factors out commonality among CCAssignToReg, CCAssignToRegAndStack, CCAssignToRegWithShadow, and CCAssignToStack. `XXXGenCallingConv.inc` are identical before and after this patch for all targets.
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llvm/utils/TableGen/CallingConvEmitter.cpp

Lines changed: 63 additions & 105 deletions
Original file line numberDiff line numberDiff line change
@@ -12,6 +12,7 @@
1212
//===----------------------------------------------------------------------===//
1313

1414
#include "Common/CodeGenTarget.h"
15+
#include "llvm/Support/FormatVariadic.h"
1516
#include "llvm/Support/InterleavedRange.h"
1617
#include "llvm/TableGen/Error.h"
1718
#include "llvm/TableGen/Record.h"
@@ -126,6 +127,56 @@ void CallingConvEmitter::emitCallingConv(const Record *CC, raw_ostream &O) {
126127

127128
void CallingConvEmitter::emitAction(const Record *Action, indent Indent,
128129
raw_ostream &O) {
130+
131+
auto EmitRegList = [&](const ListInit *RL, const StringRef RLName) {
132+
O << Indent << "static const MCPhysReg " << RLName << "[] = {\n";
133+
O << Indent << " ";
134+
ListSeparator LS;
135+
for (const Init *V : RL->getValues())
136+
O << LS << getQualifiedName(cast<DefInit>(V)->getDef());
137+
O << "\n" << Indent << "};\n";
138+
};
139+
140+
auto EmitAllocateReg = [&](ArrayRef<const ListInit *> RegLists,
141+
ArrayRef<std::string> RLNames) {
142+
SmallVector<std::string> Parms;
143+
if (RegLists[0]->size() == 1) {
144+
for (const ListInit *LI : RegLists)
145+
Parms.push_back(getQualifiedName(LI->getElementAsRecord(0)));
146+
} else {
147+
for (const std::string &S : RLNames)
148+
Parms.push_back(S + utostr(++Counter));
149+
for (const auto [Idx, LI] : enumerate(RegLists))
150+
EmitRegList(LI, Parms[Idx]);
151+
}
152+
O << formatv("{0}if (MCRegister Reg = State.AllocateReg({1})) {{\n", Indent,
153+
make_range(Parms.begin(), Parms.end()));
154+
O << Indent << " State.addLoc(CCValAssign::getReg(ValNo, ValVT, "
155+
<< "Reg, LocVT, LocInfo));\n";
156+
};
157+
158+
auto EmitAllocateStack = [&](bool EmitOffset = false) {
159+
int Size = Action->getValueAsInt("Size");
160+
int Align = Action->getValueAsInt("Align");
161+
if (EmitOffset)
162+
O << Indent << "int64_t Offset" << ++Counter << " = ";
163+
else
164+
O << Indent << " (void)";
165+
O << "State.AllocateStack(";
166+
167+
const char *Fmt = " State.getMachineFunction().getDataLayout()."
168+
"{0}(EVT(LocVT).getTypeForEVT(State.getContext()))";
169+
if (Size)
170+
O << Size << ", ";
171+
else
172+
O << "\n" << Indent << formatv(Fmt, "getTypeAllocSize") << ", ";
173+
if (Align)
174+
O << "Align(" << Align << ")";
175+
else
176+
O << "\n" << Indent << formatv(Fmt, "getABITypeAlign");
177+
O << ");\n";
178+
};
179+
129180
if (Action->isSubClassOf("CCPredicateAction")) {
130181
O << Indent << "if (";
131182

@@ -158,55 +209,18 @@ void CallingConvEmitter::emitAction(const Record *Action, indent Indent,
158209
} else if (Action->isSubClassOf("CCAssignToReg") ||
159210
Action->isSubClassOf("CCAssignToRegAndStack")) {
160211
const ListInit *RegList = Action->getValueAsListInit("RegList");
161-
if (RegList->size() == 1) {
162-
std::string Name = getQualifiedName(RegList->getElementAsRecord(0));
163-
O << Indent << "if (MCRegister Reg = State.AllocateReg(" << Name
164-
<< ")) {\n";
212+
for (unsigned I = 0, E = RegList->size(); I != E; ++I) {
213+
std::string Name = getQualifiedName(RegList->getElementAsRecord(I));
165214
if (SwiftAction)
166215
AssignedSwiftRegsMap[CurrentAction].insert(std::move(Name));
167216
else
168217
AssignedRegsMap[CurrentAction].insert(std::move(Name));
169-
} else {
170-
O << Indent << "static const MCPhysReg RegList" << ++Counter
171-
<< "[] = {\n";
172-
O << Indent << " ";
173-
ListSeparator LS;
174-
for (unsigned I = 0, E = RegList->size(); I != E; ++I) {
175-
std::string Name = getQualifiedName(RegList->getElementAsRecord(I));
176-
if (SwiftAction)
177-
AssignedSwiftRegsMap[CurrentAction].insert(Name);
178-
else
179-
AssignedRegsMap[CurrentAction].insert(Name);
180-
O << LS << Name;
181-
}
182-
O << "\n" << Indent << "};\n";
183-
O << Indent << "if (MCRegister Reg = State.AllocateReg(RegList"
184-
<< Counter << ")) {\n";
185-
}
186-
O << Indent << " State.addLoc(CCValAssign::getReg(ValNo, ValVT, "
187-
<< "Reg, LocVT, LocInfo));\n";
188-
if (Action->isSubClassOf("CCAssignToRegAndStack")) {
189-
int Size = Action->getValueAsInt("Size");
190-
int Align = Action->getValueAsInt("Align");
191-
O << Indent << " (void)State.AllocateStack(";
192-
if (Size)
193-
O << Size << ", ";
194-
else
195-
O << "\n"
196-
<< Indent
197-
<< " State.getMachineFunction().getDataLayout()."
198-
"getTypeAllocSize(EVT(LocVT).getTypeForEVT(State.getContext())),"
199-
" ";
200-
if (Align)
201-
O << "Align(" << Align << ")";
202-
else
203-
O << "\n"
204-
<< Indent
205-
<< " State.getMachineFunction().getDataLayout()."
206-
"getABITypeAlign(EVT(LocVT).getTypeForEVT(State.getContext()"
207-
"))";
208-
O << ");\n";
209218
}
219+
EmitAllocateReg({RegList}, {"RegList"});
220+
221+
if (Action->isSubClassOf("CCAssignToRegAndStack"))
222+
EmitAllocateStack();
223+
210224
O << Indent << " return false;\n";
211225
O << Indent << "}\n";
212226
} else if (Action->isSubClassOf("CCAssignToRegWithShadow")) {
@@ -217,62 +231,13 @@ void CallingConvEmitter::emitAction(const Record *Action, indent Indent,
217231
PrintFatalError(Action->getLoc(),
218232
"Invalid length of list of shadowed registers");
219233

220-
if (RegList->size() == 1) {
221-
O << Indent << "if (MCRegister Reg = State.AllocateReg(";
222-
O << getQualifiedName(RegList->getElementAsRecord(0));
223-
O << ", " << getQualifiedName(ShadowRegList->getElementAsRecord(0));
224-
O << ")) {\n";
225-
} else {
226-
unsigned RegListNumber = ++Counter;
227-
unsigned ShadowRegListNumber = ++Counter;
228-
229-
O << Indent << "static const MCPhysReg RegList" << RegListNumber
230-
<< "[] = {\n";
231-
O << Indent << " ";
232-
ListSeparator LS;
233-
for (unsigned I = 0, E = RegList->size(); I != E; ++I)
234-
O << LS << getQualifiedName(RegList->getElementAsRecord(I));
235-
O << "\n" << Indent << "};\n";
236-
237-
O << Indent << "static const MCPhysReg RegList" << ShadowRegListNumber
238-
<< "[] = {\n";
239-
O << Indent << " ";
240-
ListSeparator LSS;
241-
for (unsigned I = 0, E = ShadowRegList->size(); I != E; ++I)
242-
O << LSS << getQualifiedName(ShadowRegList->getElementAsRecord(I));
243-
O << "\n" << Indent << "};\n";
244-
245-
O << Indent << "if (MCRegister Reg = State.AllocateReg(RegList"
246-
<< RegListNumber << ", "
247-
<< "RegList" << ShadowRegListNumber << ")) {\n";
248-
}
249-
O << Indent << " State.addLoc(CCValAssign::getReg(ValNo, ValVT, "
250-
<< "Reg, LocVT, LocInfo));\n";
234+
EmitAllocateReg({RegList, ShadowRegList}, {"RegList", "RegList"});
235+
251236
O << Indent << " return false;\n";
252237
O << Indent << "}\n";
253238
} else if (Action->isSubClassOf("CCAssignToStack")) {
254-
int Size = Action->getValueAsInt("Size");
255-
int Align = Action->getValueAsInt("Align");
256-
257-
O << Indent << "int64_t Offset" << ++Counter << " = State.AllocateStack(";
258-
if (Size)
259-
O << Size << ", ";
260-
else
261-
O << "\n"
262-
<< Indent
263-
<< " State.getMachineFunction().getDataLayout()."
264-
"getTypeAllocSize(EVT(LocVT).getTypeForEVT(State.getContext())),"
265-
" ";
266-
if (Align)
267-
O << "Align(" << Align << ")";
268-
else
269-
O << "\n"
270-
<< Indent
271-
<< " State.getMachineFunction().getDataLayout()."
272-
"getABITypeAlign(EVT(LocVT).getTypeForEVT(State.getContext()"
273-
"))";
274-
O << ");\n"
275-
<< Indent << "State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset"
239+
EmitAllocateStack(/*EmitOffset=*/true);
240+
O << Indent << "State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset"
276241
<< Counter << ", LocVT, LocInfo));\n";
277242
O << Indent << "return false;\n";
278243
} else if (Action->isSubClassOf("CCAssignToStackWithShadow")) {
@@ -282,14 +247,7 @@ void CallingConvEmitter::emitAction(const Record *Action, indent Indent,
282247
Action->getValueAsListInit("ShadowRegList");
283248

284249
unsigned ShadowRegListNumber = ++Counter;
285-
286-
O << Indent << "static const MCPhysReg ShadowRegList"
287-
<< ShadowRegListNumber << "[] = {\n";
288-
O << Indent << " ";
289-
ListSeparator LS;
290-
for (unsigned I = 0, E = ShadowRegList->size(); I != E; ++I)
291-
O << LS << getQualifiedName(ShadowRegList->getElementAsRecord(I));
292-
O << "\n" << Indent << "};\n";
250+
EmitRegList(ShadowRegList, "ShadowRegList" + utostr(ShadowRegListNumber));
293251

294252
O << Indent << "int64_t Offset" << ++Counter << " = State.AllocateStack("
295253
<< Size << ", Align(" << Align << "), "

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