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Thomas Martensbuserror
Thomas Martens
authored and
buserror
committed
changed EEARL to EEAR inside AVR_EEPROM_DECLARE_8BIT
(some iotnxx.h files have only a EEAR declaration) added corefiles for attiny2313a and attiny4313
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‎simavr/cores/sim_tiny2313a.c

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/*
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sim_tiny2313a.c
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Copyright 2008, 2009 Michel Pollet <buserror@gmail.com>
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This file is part of simavr.
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simavr is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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simavr is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with simavr. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "sim_core_declare.h"
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#include "avr_eeprom.h"
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#include "avr_watchdog.h"
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#include "avr_extint.h"
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#include "avr_ioport.h"
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#include "avr_uart.h"
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#include "avr_timer.h"
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#include "avr_acomp.h"
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static void init(struct avr_t * avr);
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static void reset(struct avr_t * avr);
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#define _AVR_IO_H_
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#define __ASSEMBLER__
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#include "avr/iotn2313a.h"
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/*
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* This is a template for all of the tinyx5 devices, hopefully
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*/
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static const struct mcu_t {
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avr_t core;
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avr_eeprom_t eeprom;
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avr_watchdog_t watchdog;
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avr_extint_t extint;
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avr_ioport_t porta, portb, portd;
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avr_uart_t uart;
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avr_timer_t timer0,timer1;
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avr_acomp_t acomp;
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} mcu = {
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.core = {
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.mmcu = "attiny2313a",
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DEFAULT_CORE(2),
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.init = init,
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.reset = reset,
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},
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AVR_EEPROM_DECLARE_8BIT(EEPROM_Ready_vect),
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AVR_WATCHDOG_DECLARE(WDTCR, WDT_OVERFLOW_vect),
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.extint = {
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AVR_EXTINT_TINY_DECLARE(0, 'D', 2, GIFR),
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AVR_EXTINT_TINY_DECLARE(1, 'D', 3, GIFR),
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},
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.porta = {
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.name = 'A', .r_port = PORTA, .r_ddr = DDRA, .r_pin = PINA,
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.pcint = {
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.enable = AVR_IO_REGBIT(GIMSK, PCIE1),
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.raised = AVR_IO_REGBIT(GIFR, PCIF1),
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.vector = PCINT1_vect,
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},
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.r_pcint = PCMSK1,
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},
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.portb = {
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.name = 'B', .r_port = PORTB, .r_ddr = DDRB, .r_pin = PINB,
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.pcint = {
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.enable = AVR_IO_REGBIT(GIMSK, PCIE0),
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.raised = AVR_IO_REGBIT(GIFR, PCIF0),
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.vector = PCINT0_vect,
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},
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.r_pcint = PCMSK0,
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},
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.portd = {
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.name = 'D', .r_port = PORTD, .r_ddr = DDRD, .r_pin = PIND,
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.pcint = {
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.enable = AVR_IO_REGBIT(GIMSK, PCIE2),
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.raised = AVR_IO_REGBIT(GIFR, PCIF2),
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.vector = PCINT2_vect,
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},
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.r_pcint = PCMSK2,
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},
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//PRUSART, upe=UPE, no reg/bit name index, no 'C' in RX/TX vector names
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AVR_UART_DECLARE(PRR, PRUSART, UPE, , ),
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.timer0 = {
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.name = '0',
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.disabled = AVR_IO_REGBIT(PRR,PRTIM0),
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.wgm = { AVR_IO_REGBIT(TCCR0A, WGM00), AVR_IO_REGBIT(TCCR0A, WGM01), AVR_IO_REGBIT(TCCR0B, WGM02) },
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.wgm_op = {
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[0] = AVR_TIMER_WGM_NORMAL8(),
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[2] = AVR_TIMER_WGM_CTC(),
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[3] = AVR_TIMER_WGM_FASTPWM8(),
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[7] = AVR_TIMER_WGM_OCPWM(),
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},
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.cs = { AVR_IO_REGBIT(TCCR0B, CS00), AVR_IO_REGBIT(TCCR0B, CS01), AVR_IO_REGBIT(TCCR0B, CS02) },
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.cs_div = { 0, 0, 3 /* 8 */, 6 /* 64 */, 8 /* 256 */, 10 /* 1024 */, AVR_TIMER_EXTCLK_CHOOSE, AVR_TIMER_EXTCLK_CHOOSE },
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.ext_clock_pin = AVR_IO_REGBIT(PORTD, 4), /* External clock pin */
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.r_tcnt = TCNT0,
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.overflow = {
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.enable = AVR_IO_REGBIT(TIMSK, TOIE0),
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.raised = AVR_IO_REGBIT(TIFR, TOV0),
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.vector = TIMER0_OVF_vect,
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},
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.comp = {
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[AVR_TIMER_COMPA] = {
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.r_ocr = OCR0A,
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.com = AVR_IO_REGBITS(TCCR0A, COM0A0, 0x3),
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.com_pin = AVR_IO_REGBIT(PORTB, 2),
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.interrupt = {
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.enable = AVR_IO_REGBIT(TIMSK, OCIE0A),
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.raised = AVR_IO_REGBIT(TIFR, OCF0A),
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.vector = TIMER0_COMPA_vect,
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},
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},
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[AVR_TIMER_COMPB] = {
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.r_ocr = OCR0B,
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.com = AVR_IO_REGBITS(TCCR0A, COM0B0, 0x3),
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.com_pin = AVR_IO_REGBIT(PORTD, 5),
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.interrupt = {
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.enable = AVR_IO_REGBIT(TIMSK, OCIE0B),
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.raised = AVR_IO_REGBIT(TIFR, OCF0B),
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.vector = TIMER0_COMPB_vect,
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}
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}
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},
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},
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.timer1 = {
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.name = '1',
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.disabled = AVR_IO_REGBIT(PRR,PRTIM1),
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.wgm = { AVR_IO_REGBIT(TCCR1A, WGM10), AVR_IO_REGBIT(TCCR1A, WGM11),
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AVR_IO_REGBIT(TCCR1B, WGM12), AVR_IO_REGBIT(TCCR1B, WGM13) },
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.wgm_op = {
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[0] = AVR_TIMER_WGM_NORMAL16(),
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[4] = AVR_TIMER_WGM_CTC(),
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[5] = AVR_TIMER_WGM_FASTPWM8(),
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[6] = AVR_TIMER_WGM_FASTPWM9(),
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[7] = AVR_TIMER_WGM_FASTPWM10(),
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[12] = AVR_TIMER_WGM_ICCTC(),
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[14] = AVR_TIMER_WGM_ICPWM(),
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[15] = AVR_TIMER_WGM_OCPWM(),
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},
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.cs = { AVR_IO_REGBIT(TCCR1B, CS10), AVR_IO_REGBIT(TCCR1B, CS11), AVR_IO_REGBIT(TCCR1B, CS12) },
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.cs_div = { 0, 0, 3 /* 8 */, 6 /* 64 */, 8 /* 256 */, 10 /* 1024 */, AVR_TIMER_EXTCLK_CHOOSE, AVR_TIMER_EXTCLK_CHOOSE },
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.ext_clock_pin = AVR_IO_REGBIT(PORTD, 5), /* External clock pin */
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.r_tcnt = TCNT1L,
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.r_icr = ICR1L,
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.r_icrh = ICR1H,
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.r_tcnth = TCNT1H,
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.ices = AVR_IO_REGBIT(TCCR1B, ICES1),
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.icp = AVR_IO_REGBIT(PORTD, 6),
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.overflow = {
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.enable = AVR_IO_REGBIT(TIMSK, TOIE1),
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.raised = AVR_IO_REGBIT(TIFR, TOV1),
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.vector = TIMER1_OVF_vect,
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},
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.icr = {
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.enable = AVR_IO_REGBIT(TIMSK, ICIE1),
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.raised = AVR_IO_REGBIT(TIFR, ICF1),
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.vector = TIMER1_CAPT_vect,
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},
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.comp = {
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[AVR_TIMER_COMPA] = {
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.r_ocr = OCR1AL,
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.r_ocrh = OCR1AH, // 16 bits timers have two bytes of it
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.com = AVR_IO_REGBITS(TCCR1A, COM1A0, 0x3),
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.com_pin = AVR_IO_REGBIT(PORTB, 3),
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.interrupt = {
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.enable = AVR_IO_REGBIT(TIMSK, OCIE1A),
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.raised = AVR_IO_REGBIT(TIFR, OCF1A),
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.vector = TIMER1_COMPA_vect,
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},
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},
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[AVR_TIMER_COMPB] = {
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.r_ocr = OCR1BL,
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.r_ocrh = OCR1BH,
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.com = AVR_IO_REGBITS(TCCR1A, COM1A0, 0x3),
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.com_pin = AVR_IO_REGBIT(PORTB, 4),
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.interrupt = {
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.enable = AVR_IO_REGBIT(TIMSK, OCIE1B),
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.raised = AVR_IO_REGBIT(TIFR, OCF1B),
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.vector = TIMER1_COMPB_vect,
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}
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}
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}
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},
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.acomp = {
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.r_acsr = ACSR,
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.acis = { AVR_IO_REGBIT(ACSR, ACIS0), AVR_IO_REGBIT(ACSR, ACIS1) },
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.acic = AVR_IO_REGBIT(ACSR, ACIC),
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.aco = AVR_IO_REGBIT(ACSR, ACO),
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.acbg = AVR_IO_REGBIT(ACSR, ACBG),
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.disabled = AVR_IO_REGBIT(ACSR, ACD),
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.timer_name = '1',
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.ac = {
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.enable = AVR_IO_REGBIT(ACSR, ACIE),
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.raised = AVR_IO_REGBIT(ACSR, ACI),
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.vector = ANA_COMP_vect,
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}
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},
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};
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static avr_t * make()
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{
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return avr_core_allocate(&mcu.core, sizeof(struct mcu_t));
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}
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avr_kind_t tiny2313a = {
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.names = { "attiny2313a" },
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.make = make
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};
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static void init(struct avr_t * avr)
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{
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struct mcu_t * mcu = (struct mcu_t*)avr;
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avr_eeprom_init(avr, &mcu->eeprom);
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avr_watchdog_init(avr, &mcu->watchdog);
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avr_extint_init(avr, &mcu->extint);
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avr_ioport_init(avr, &mcu->porta);
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avr_ioport_init(avr, &mcu->portb);
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avr_ioport_init(avr, &mcu->portd);
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avr_uart_init(avr, &mcu->uart);
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avr_timer_init(avr, &mcu->timer0);
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avr_timer_init(avr, &mcu->timer1);
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avr_acomp_init(avr, &mcu->acomp);
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}
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static void reset(struct avr_t * avr)
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{
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// struct mcu_t * mcu = (struct mcu_t*)avr;
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}
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