riscv: dts: andes: Change default baud rate to 115200 (torvalds#234)

cnoizeandes · CharlesWu465 · commit e78d0d123ae6 · 2024-12-19T17:27:16.000+08:00
Update the Device Tree Source (DTS) to change the default baud rate from 38400 to 115200. Signed-off-by: Che-Wei Chuang cnoize@andestech.com Reviewed-on: https://gitea.andestech.com/RD-SW/linux/pulls/234 Reviewed-by: randolph <randolph@andestech.com> Reviewed-by: Charles Ci-Jyun Wu <dminus@andestech.com> Co-authored-by: Che-Wei Chuang <cnoize@andestech.com> Co-committed-by: Che-Wei Chuang <cnoize@andestech.com>
diff --git a/arch/riscv/boot/dts/andes/a25_c1_d_dsp_noncoherent_ae350.dts b/arch/riscv/boot/dts/andes/a25_c1_d_dsp_noncoherent_ae350.dts
@@ -12,8 +12,8 @@
 	};
 
 	chosen {
-		bootargs = "console=ttyS0,38400n8 debug loglevel=7 earlycon=sbi";
-		stdout-path = "uart0:38400n8";
+		bootargs = "console=ttyS0,115200n8 debug loglevel=7 earlycon=sbi";
+		stdout-path = "uart0:115200n8";
 	};
 
 	cpus {
diff --git a/arch/riscv/boot/dts/andes/a25mp_c4_d_dsp_ae350.dts b/arch/riscv/boot/dts/andes/a25mp_c4_d_dsp_ae350.dts
@@ -12,8 +12,8 @@
 	};
 
 	chosen {
-		bootargs = "console=ttyS0,38400n8 debug loglevel=7 earlycon=sbi";
-		stdout-path = "uart0:38400n8";
+		bootargs = "console=ttyS0,115200n8 debug loglevel=7 earlycon=sbi";
+		stdout-path = "uart0:115200n8";
 	};
 
 	cpus {
@@ -225,7 +225,7 @@
 			interrupts = <0x09 0x04>;
 			interrupt-parent = <0x06>;
 			clock-frequency = <0x12c0000>;
-			current-speed = <0x9600>;
+			current-speed = <115200>;
 			reg-shift = <0x02>;
 			reg-offset = <0x20>;
 			reg-io-width = <0x04>;
diff --git a/arch/riscv/boot/dts/andes/a27l2_c1_d_dsp_noncoherent_ae350.dts b/arch/riscv/boot/dts/andes/a27l2_c1_d_dsp_noncoherent_ae350.dts
@@ -12,8 +12,8 @@
 	};
 
 	chosen {
-		bootargs = "console=ttyS0,38400n8 debug loglevel=7 earlycon=sbi";
-		stdout-path = "uart0:38400n8";
+		bootargs = "console=ttyS0,115200n8 debug loglevel=7 earlycon=sbi";
+		stdout-path = "uart0:115200n8";
 	};
 
 	cpus {
diff --git a/arch/riscv/boot/dts/andes/a45_c1_d_dsp_noncoherent_ae350.dts b/arch/riscv/boot/dts/andes/a45_c1_d_dsp_noncoherent_ae350.dts
@@ -12,8 +12,8 @@
 	};
 
 	chosen {
-		bootargs = "console=ttyS0,38400n8 debug loglevel=7 earlycon=sbi";
-		stdout-path = "uart0:38400n8";
+		bootargs = "console=ttyS0,115200n8 debug loglevel=7 earlycon=sbi";
+		stdout-path = "uart0:115200n8";
 	};
 
 	cpus {
@@ -145,7 +145,7 @@
 			reg-shift = <0x02>;
 			reg-offset = <0x20>;
 			no-loopback-test = <0x01>;
-			current-speed = <0x9600>;
+			current-speed = <115200>;
 			reg-io-width = <0x04>;
 		};
 
diff --git a/arch/riscv/boot/dts/andes/a45mp_c4_d_dsp_ae350.dts b/arch/riscv/boot/dts/andes/a45mp_c4_d_dsp_ae350.dts
@@ -12,8 +12,8 @@
 	};
 
 	chosen {
-		bootargs = "console=ttyS0,38400n8 debug loglevel=7 earlycon=sbi";
-		stdout-path = "uart0:38400n8";
+		bootargs = "console=ttyS0,115200n8 debug loglevel=7 earlycon=sbi";
+		stdout-path = "uart0:115200n8";
 	};
 
 	cpus {
@@ -225,7 +225,7 @@
 			interrupts = <0x09 0x04>;
 			interrupt-parent = <0x06>;
 			clock-frequency = <0x12c0000>;
-			current-speed = <0x9600>;
+			current-speed = <115200>;
 			reg-shift = <0x02>;
 			reg-offset = <0x20>;
 			reg-io-width = <0x04>;
diff --git a/arch/riscv/boot/dts/andes/ax25_c1_d_dsp_noncoherent_ae350.dts b/arch/riscv/boot/dts/andes/ax25_c1_d_dsp_noncoherent_ae350.dts
@@ -12,8 +12,8 @@
 	};
 
 	chosen {
-		bootargs = "console=ttyS0,38400n8 debug loglevel=7 earlycon=sbi";
-		stdout-path = "uart0:38400n8";
+		bootargs = "console=ttyS0,115200n8 debug loglevel=7 earlycon=sbi";
+		stdout-path = "uart0:115200n8";
 	};
 
 	cpus {
diff --git a/arch/riscv/boot/dts/andes/ax25mp_amp_c2_64_d_ae350.dts b/arch/riscv/boot/dts/andes/ax25mp_amp_c2_64_d_ae350.dts
@@ -332,7 +332,7 @@
 	};
 
 	chosen {
-		bootargs = "console=ttyS0,38400n8 debug loglevel=7 earlycon=sbi";
-		stdout-path = "uart0:38400n8";
+		bootargs = "console=ttyS0,115200n8 debug loglevel=7 earlycon=sbi";
+		stdout-path = "uart0:115200n8";
 	};
 };
diff --git a/arch/riscv/boot/dts/andes/ax25mp_c4_d_dsp_ae350.dts b/arch/riscv/boot/dts/andes/ax25mp_c4_d_dsp_ae350.dts
@@ -12,8 +12,8 @@
 	};
 
 	chosen {
-		bootargs = "console=ttyS0,38400n8 debug loglevel=7 earlycon=sbi";
-		stdout-path = "uart0:38400n8";
+		bootargs = "console=ttyS0,115200n8 debug loglevel=7 earlycon=sbi";
+		stdout-path = "uart0:115200n8";
 	};
 
 	cpus {
@@ -225,7 +225,7 @@
 			interrupts = <0x09 0x04>;
 			interrupt-parent = <0x06>;
 			clock-frequency = <0x12c0000>;
-			current-speed = <0x9600>;
+			current-speed = <115200>;
 			reg-shift = <0x02>;
 			reg-offset = <0x20>;
 			reg-io-width = <0x04>;
diff --git a/arch/riscv/boot/dts/andes/ax27l2_c1_d_dsp_noncoherent_ae350.dts b/arch/riscv/boot/dts/andes/ax27l2_c1_d_dsp_noncoherent_ae350.dts
@@ -12,8 +12,8 @@
 	};
 
 	chosen {
-		bootargs = "console=ttyS0,38400n8 debug loglevel=7 earlycon=sbi";
-		stdout-path = "uart0:38400n8";
+		bootargs = "console=ttyS0,115200n8 debug loglevel=7 earlycon=sbi";
+		stdout-path = "uart0:115200n8";
 	};
 
 	cpus {
diff --git a/arch/riscv/boot/dts/andes/ax45_c1_d_dsp_noncoherent_ae350.dts b/arch/riscv/boot/dts/andes/ax45_c1_d_dsp_noncoherent_ae350.dts
@@ -12,8 +12,8 @@
 	};
 
 	chosen {
-		bootargs = "console=ttyS0,38400n8 debug loglevel=7 earlycon=sbi";
-		stdout-path = "uart0:38400n8";
+		bootargs = "console=ttyS0,115200n8 debug loglevel=7 earlycon=sbi";
+		stdout-path = "uart0:115200n8";
 	};
 
 	cpus {
@@ -145,7 +145,7 @@
 			reg-shift = <0x02>;
 			reg-offset = <0x20>;
 			no-loopback-test = <0x01>;
-			current-speed = <0x9600>;
+			current-speed = <115200>;
 			reg-io-width = <0x04>;
 		};
 
diff --git a/arch/riscv/boot/dts/andes/ax45mp_c4_d_dsp_ae350.dts b/arch/riscv/boot/dts/andes/ax45mp_c4_d_dsp_ae350.dts
@@ -12,8 +12,8 @@
 	};
 
 	chosen {
-		bootargs = "console=ttyS0,38400n8 debug loglevel=7 earlycon=sbi";
-		stdout-path = "uart0:38400n8";
+		bootargs = "console=ttyS0,115200n8 debug loglevel=7 earlycon=sbi";
+		stdout-path = "uart0:115200n8";
 	};
 
 	cpus {
@@ -225,7 +225,7 @@
 			interrupts = <0x09 0x04>;
 			interrupt-parent = <0x06>;
 			clock-frequency = <0x12c0000>;
-			current-speed = <0x9600>;
+			current-speed = <115200>;
 			reg-shift = <0x02>;
 			reg-offset = <0x20>;
 			reg-io-width = <0x04>;
diff --git a/arch/riscv/boot/dts/andes/ax45mp_c8_ae350.dts b/arch/riscv/boot/dts/andes/ax45mp_c8_ae350.dts
@@ -12,8 +12,8 @@
 	};
 
 	chosen {
-		bootargs = "console=ttyS0,38400n8 debug loglevel=7 earlycon=sbi";
-		stdout-path = "uart0:38400n8";
+		bootargs = "console=ttyS0,115200n8 debug loglevel=7 earlycon=sbi";
+		stdout-path = "uart0:115200n8";
 	};
 
 	cpus {
@@ -329,7 +329,7 @@
 			interrupts = <0x09 0x04>;
 			interrupt-parent = <0x0a>;
 			clock-frequency = <0x12c0000>;
-			current-speed = <0x9600>;
+			current-speed = <115200>;
 			reg-shift = <0x02>;
 			reg-offset = <0x20>;
 			reg-io-width = <0x04>;
diff --git a/arch/riscv/boot/dts/andes/ax45mpv_c1_d_hvm_ae350.dts b/arch/riscv/boot/dts/andes/ax45mpv_c1_d_hvm_ae350.dts
@@ -11,8 +11,8 @@
 	};
 
 	chosen {
-		bootargs = "console=ttyS0,38400n8 debug loglevel=7 earlycon=sbi";
-		stdout-path = "uart0:38400n8";
+		bootargs = "console=ttyS0,115200n8 debug loglevel=7 earlycon=sbi";
+		stdout-path = "uart0:115200n8";
 	};
 	cpus {
 		#address-cells = <1>;
@@ -134,7 +134,7 @@
 			interrupts = <9 4>;
 			interrupt-parent = <&plic0>;
 			clock-frequency = <19660800>;
-			current-speed = <38400>;
+			current-speed = <115200>;
 			reg-shift = <2>;
 			reg-offset = <32>;
 			reg-io-width = <4>;
diff --git a/arch/riscv/boot/dts/andes/ax45mpv_c2_d_dsp_hvm_ae350.dts b/arch/riscv/boot/dts/andes/ax45mpv_c2_d_dsp_hvm_ae350.dts
@@ -11,8 +11,8 @@
 	};
 
 	chosen {
-		bootargs = "console=ttyS0,38400n8 debug loglevel=7 earlycon=sbi";
-		stdout-path = "uart0:38400n8";
+		bootargs = "console=ttyS0,115200n8 debug loglevel=7 earlycon=sbi";
+		stdout-path = "uart0:115200n8";
 	};
 	cpus {
 		#address-cells = <1>;
@@ -160,7 +160,7 @@
 			interrupts = <9 4>;
 			interrupt-parent = <&plic0>;
 			clock-frequency = <19660800>;
-			current-speed = <38400>;
+			current-speed = <115200>;
 			reg-shift = <2>;
 			reg-offset = <32>;
 			reg-io-width = <4>;
diff --git a/arch/riscv/boot/dts/andes/ax45mpv_c4_d_dsp_ae350.dts b/arch/riscv/boot/dts/andes/ax45mpv_c4_d_dsp_ae350.dts
@@ -12,8 +12,8 @@
 	};
 
 	chosen {
-		bootargs = "console=ttyS0,38400n8 debug loglevel=7 earlycon=sbi";
-		stdout-path = "uart0:38400n8";
+		bootargs = "console=ttyS0,115200n8 debug loglevel=7 earlycon=sbi";
+		stdout-path = "uart0:115200n8";
 	};
 
 	cpus {
@@ -225,7 +225,7 @@
 			interrupts = <0x09 0x04>;
 			interrupt-parent = <0x06>;
 			clock-frequency = <0x12c0000>;
-			current-speed = <0x9600>;
+			current-speed = <115200>;
 			reg-shift = <0x02>;
 			reg-offset = <0x20>;
 			reg-io-width = <0x04>;
diff --git a/arch/riscv/boot/dts/andes/ax65mp_c2_d_ae350.dts b/arch/riscv/boot/dts/andes/ax65mp_c2_d_ae350.dts
@@ -13,8 +13,8 @@
 	};
 
 	chosen {
-		bootargs = "console=ttyS0,38400n8 debug loglevel=7 earlycon=sbi";
-		stdout-path = "uart0:38400n8";
+		bootargs = "console=ttyS0,115200n8 debug loglevel=7 earlycon=sbi";
+		stdout-path = "uart0:115200n8";
 	};
 
 	cpus {
@@ -176,7 +176,7 @@
 			interrupts = <0x09 0x04>;
 			interrupt-parent = <0x04>;
 			clock-frequency = <0x12c0000>;
-			current-speed = <0x9600>;
+			current-speed = <115200>;
 			reg-shift = <0x02>;
 			reg-offset = <0x20>;
 			reg-io-width = <0x04>;
