forked from lwfinger/rtw89
-
Notifications
You must be signed in to change notification settings - Fork 0
/
phy.c
3549 lines (3101 loc) · 101 KB
/
phy.c
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
/* Copyright(c) 2019-2020 Realtek Corporation
*/
#include "debug.h"
#include "fw.h"
#include "mac.h"
#include "phy.h"
#include "ps.h"
#include "reg.h"
#include "sar.h"
#include "coex.h"
static u16 get_max_amsdu_len(struct rtw89_dev *rtwdev,
const struct rtw89_ra_report *report)
{
const struct rate_info *txrate = &report->txrate;
u32 bit_rate = report->bit_rate;
u8 mcs;
/* lower than ofdm, do not aggregate */
if (bit_rate < 550)
return 1;
/* prevent hardware rate fallback to G mode rate */
if (txrate->flags & RATE_INFO_FLAGS_MCS)
mcs = txrate->mcs & 0x07;
else if (txrate->flags & (RATE_INFO_FLAGS_VHT_MCS | RATE_INFO_FLAGS_HE_MCS))
mcs = txrate->mcs;
else
mcs = 0;
if (mcs <= 2)
return 1;
/* lower than 20M vht 2ss mcs8, make it small */
if (bit_rate < 1800)
return 1200;
/* lower than 40M vht 2ss mcs9, make it medium */
if (bit_rate < 4000)
return 2600;
/* not yet 80M vht 2ss mcs8/9, make it twice regular packet size */
if (bit_rate < 7000)
return 3500;
return rtwdev->chip->max_amsdu_limit;
}
static u64 get_mcs_ra_mask(u16 mcs_map, u8 highest_mcs, u8 gap)
{
u64 ra_mask = 0;
u8 mcs_cap;
int i, nss;
for (i = 0, nss = 12; i < 4; i++, mcs_map >>= 2, nss += 12) {
mcs_cap = mcs_map & 0x3;
switch (mcs_cap) {
case 2:
ra_mask |= GENMASK_ULL(highest_mcs, 0) << nss;
break;
case 1:
ra_mask |= GENMASK_ULL(highest_mcs - gap, 0) << nss;
break;
case 0:
ra_mask |= GENMASK_ULL(highest_mcs - gap * 2, 0) << nss;
break;
default:
break;
}
}
return ra_mask;
}
static u64 get_he_ra_mask(struct ieee80211_sta *sta)
{
#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 19, 0)
struct ieee80211_sta_he_cap cap = sta->he_cap;
#else
struct ieee80211_sta_he_cap cap = sta->deflink.he_cap;
#endif
u16 mcs_map;
#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 19, 0)
switch (sta->bandwidth) {
#else
switch (sta->deflink.bandwidth) {
#endif
case IEEE80211_STA_RX_BW_160:
if (cap.he_cap_elem.phy_cap_info[0] &
IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G)
mcs_map = le16_to_cpu(cap.he_mcs_nss_supp.rx_mcs_80p80);
else
mcs_map = le16_to_cpu(cap.he_mcs_nss_supp.rx_mcs_160);
break;
default:
mcs_map = le16_to_cpu(cap.he_mcs_nss_supp.rx_mcs_80);
}
/* MCS11, MCS9, MCS7 */
return get_mcs_ra_mask(mcs_map, 11, 2);
}
#define RA_FLOOR_TABLE_SIZE 7
#define RA_FLOOR_UP_GAP 3
static u64 rtw89_phy_ra_mask_rssi(struct rtw89_dev *rtwdev, u8 rssi,
u8 ratr_state)
{
u8 rssi_lv_t[RA_FLOOR_TABLE_SIZE] = {30, 44, 48, 52, 56, 60, 100};
u8 rssi_lv = 0;
u8 i;
rssi >>= 1;
for (i = 0; i < RA_FLOOR_TABLE_SIZE; i++) {
if (i >= ratr_state)
rssi_lv_t[i] += RA_FLOOR_UP_GAP;
if (rssi < rssi_lv_t[i]) {
rssi_lv = i;
break;
}
}
if (rssi_lv == 0)
return 0xffffffffffffffffULL;
else if (rssi_lv == 1)
return 0xfffffffffffffff0ULL;
else if (rssi_lv == 2)
return 0xffffffffffffefe0ULL;
else if (rssi_lv == 3)
return 0xffffffffffffcfc0ULL;
else if (rssi_lv == 4)
return 0xffffffffffff8f80ULL;
else if (rssi_lv >= 5)
return 0xffffffffffff0f00ULL;
return 0xffffffffffffffffULL;
}
static u64 rtw89_phy_ra_mask_recover(u64 ra_mask, u64 ra_mask_bak)
{
if ((ra_mask & ~(RA_MASK_CCK_RATES | RA_MASK_OFDM_RATES)) == 0)
ra_mask |= (ra_mask_bak & ~(RA_MASK_CCK_RATES | RA_MASK_OFDM_RATES));
if (ra_mask == 0)
ra_mask |= (ra_mask_bak & (RA_MASK_CCK_RATES | RA_MASK_OFDM_RATES));
return ra_mask;
}
static u64 rtw89_phy_ra_mask_cfg(struct rtw89_dev *rtwdev, struct rtw89_sta *rtwsta)
{
struct rtw89_hal *hal = &rtwdev->hal;
struct ieee80211_sta *sta = rtwsta_to_sta(rtwsta);
struct cfg80211_bitrate_mask *mask = &rtwsta->mask;
enum nl80211_band band;
u64 cfg_mask;
if (!rtwsta->use_cfg_mask)
return -1;
switch (hal->current_band_type) {
case RTW89_BAND_2G:
band = NL80211_BAND_2GHZ;
cfg_mask = u64_encode_bits(mask->control[NL80211_BAND_2GHZ].legacy,
RA_MASK_CCK_RATES | RA_MASK_OFDM_RATES);
break;
case RTW89_BAND_5G:
band = NL80211_BAND_5GHZ;
cfg_mask = u64_encode_bits(mask->control[NL80211_BAND_5GHZ].legacy,
RA_MASK_OFDM_RATES);
break;
#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 4, 0)
case RTW89_BAND_6G:
band = NL80211_BAND_6GHZ;
cfg_mask = u64_encode_bits(mask->control[NL80211_BAND_6GHZ].legacy,
RA_MASK_OFDM_RATES);
break;
#endif
default:
rtw89_warn(rtwdev, "unhandled band type %d\n", hal->current_band_type);
return -1;
}
#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 19, 0)
if (sta->he_cap.has_he) {
#else
if (sta->deflink.he_cap.has_he) {
#endif
#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 10, 0)
cfg_mask |= u64_encode_bits(mask->control[band].he_mcs[0],
RA_MASK_HE_1SS_RATES);
cfg_mask |= u64_encode_bits(mask->control[band].he_mcs[1],
RA_MASK_HE_2SS_RATES);
#endif
#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 19, 0)
} else if (sta->vht_cap.vht_supported) {
#else
} else if (sta->deflink.vht_cap.vht_supported) {
#endif
cfg_mask |= u64_encode_bits(mask->control[band].vht_mcs[0],
RA_MASK_VHT_1SS_RATES);
cfg_mask |= u64_encode_bits(mask->control[band].vht_mcs[1],
RA_MASK_VHT_2SS_RATES);
#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 19, 0)
} else if (sta->ht_cap.ht_supported) {
#else
} else if (sta->deflink.ht_cap.ht_supported) {
#endif
cfg_mask |= u64_encode_bits(mask->control[band].ht_mcs[0],
RA_MASK_HT_1SS_RATES);
cfg_mask |= u64_encode_bits(mask->control[band].ht_mcs[1],
RA_MASK_HT_2SS_RATES);
}
return cfg_mask;
}
static const u64
rtw89_ra_mask_ht_rates[4] = {RA_MASK_HT_1SS_RATES, RA_MASK_HT_2SS_RATES,
RA_MASK_HT_3SS_RATES, RA_MASK_HT_4SS_RATES};
static const u64
rtw89_ra_mask_vht_rates[4] = {RA_MASK_VHT_1SS_RATES, RA_MASK_VHT_2SS_RATES,
RA_MASK_VHT_3SS_RATES, RA_MASK_VHT_4SS_RATES};
static const u64
rtw89_ra_mask_he_rates[4] = {RA_MASK_HE_1SS_RATES, RA_MASK_HE_2SS_RATES,
RA_MASK_HE_3SS_RATES, RA_MASK_HE_4SS_RATES};
static void rtw89_phy_ra_sta_update(struct rtw89_dev *rtwdev,
struct ieee80211_sta *sta, bool csi)
{
struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
struct rtw89_vif *rtwvif = rtwsta->rtwvif;
struct rtw89_phy_rate_pattern *rate_pattern = &rtwvif->rate_pattern;
struct rtw89_ra_info *ra = &rtwsta->ra;
const u64 *high_rate_masks = rtw89_ra_mask_ht_rates;
u8 rssi = ewma_rssi_read(&rtwsta->avg_rssi);
u64 ra_mask = 0;
u64 ra_mask_bak;
u8 mode = 0;
u8 csi_mode = RTW89_RA_RPT_MODE_LEGACY;
u8 bw_mode = 0;
u8 stbc_en = 0;
u8 ldpc_en = 0;
u8 i;
bool sgi = false;
memset(ra, 0, sizeof(*ra));
/* Set the ra mask from sta's capability */
#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 19, 0)
if (sta->he_cap.has_he) {
#else
if (sta->deflink.he_cap.has_he) {
#endif
mode |= RTW89_RA_MODE_HE;
csi_mode = RTW89_RA_RPT_MODE_HE;
ra_mask |= get_he_ra_mask(sta);
high_rate_masks = rtw89_ra_mask_he_rates;
#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 19, 0)
if (sta->he_cap.he_cap_elem.phy_cap_info[2] &
#else
if (sta->deflink.he_cap.he_cap_elem.phy_cap_info[2] &
#endif
IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ)
stbc_en = 1;
#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 19, 0)
if (sta->he_cap.he_cap_elem.phy_cap_info[1] &
#else
if (sta->deflink.he_cap.he_cap_elem.phy_cap_info[1] &
#endif
IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD)
ldpc_en = 1;
#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 19, 0)
} else if (sta->vht_cap.vht_supported) {
u16 mcs_map = le16_to_cpu(sta->vht_cap.vht_mcs.rx_mcs_map);
#else
} else if (sta->deflink.vht_cap.vht_supported) {
u16 mcs_map = le16_to_cpu(sta->deflink.vht_cap.vht_mcs.rx_mcs_map);
#endif
mode |= RTW89_RA_MODE_VHT;
csi_mode = RTW89_RA_RPT_MODE_VHT;
/* MCS9, MCS8, MCS7 */
ra_mask |= get_mcs_ra_mask(mcs_map, 9, 1);
high_rate_masks = rtw89_ra_mask_vht_rates;
#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 19, 0)
if (sta->vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_MASK)
#else
if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_MASK)
#endif
stbc_en = 1;
#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 19, 0)
if (sta->vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC)
#else
if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC)
#endif
ldpc_en = 1;
#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 19, 0)
} else if (sta->ht_cap.ht_supported) {
#else
} else if (sta->deflink.ht_cap.ht_supported) {
#endif
mode |= RTW89_RA_MODE_HT;
csi_mode = RTW89_RA_RPT_MODE_HT;
#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 19, 0)
ra_mask |= ((u64)sta->ht_cap.mcs.rx_mask[3] << 48) |
((u64)sta->ht_cap.mcs.rx_mask[2] << 36) |
(sta->ht_cap.mcs.rx_mask[1] << 24) |
(sta->ht_cap.mcs.rx_mask[0] << 12);
#else
ra_mask |= ((u64)sta->deflink.ht_cap.mcs.rx_mask[3] << 48) |
((u64)sta->deflink.ht_cap.mcs.rx_mask[2] << 36) |
(sta->deflink.ht_cap.mcs.rx_mask[1] << 24) |
(sta->deflink.ht_cap.mcs.rx_mask[0] << 12);
#endif
high_rate_masks = rtw89_ra_mask_ht_rates;
#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 19, 0)
if (sta->ht_cap.cap & IEEE80211_HT_CAP_RX_STBC)
#else
if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_RX_STBC)
#endif
stbc_en = 1;
#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 19, 0)
if (sta->ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING)
#else
if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING)
#endif
ldpc_en = 1;
}
switch (rtwdev->hal.current_band_type) {
case RTW89_BAND_2G:
#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 19, 0)
ra_mask |= sta->supp_rates[NL80211_BAND_2GHZ];
if (sta->supp_rates[NL80211_BAND_2GHZ] <= 0xf)
#else
ra_mask |= sta->deflink.supp_rates[NL80211_BAND_2GHZ];
if (sta->deflink.supp_rates[NL80211_BAND_2GHZ] <= 0xf)
#endif
mode |= RTW89_RA_MODE_CCK;
else
mode |= RTW89_RA_MODE_CCK | RTW89_RA_MODE_OFDM;
break;
case RTW89_BAND_5G:
#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 19, 0)
ra_mask |= (u64)sta->supp_rates[NL80211_BAND_5GHZ] << 4;
#else
ra_mask |= (u64)sta->deflink.supp_rates[NL80211_BAND_5GHZ] << 4;
#endif
mode |= RTW89_RA_MODE_OFDM;
break;
#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 4, 0)
case RTW89_BAND_6G:
#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 19, 0)
ra_mask |= (u64)sta->supp_rates[NL80211_BAND_6GHZ] << 4;
#else
ra_mask |= (u64)sta->deflink.supp_rates[NL80211_BAND_6GHZ] << 4;
#endif
mode |= RTW89_RA_MODE_OFDM;
break;
#endif
default:
rtw89_err(rtwdev, "Unknown band type\n");
break;
}
ra_mask_bak = ra_mask;
if (mode >= RTW89_RA_MODE_HT) {
u64 mask = 0;
for (i = 0; i < rtwdev->hal.tx_nss; i++)
mask |= high_rate_masks[i];
if (mode & RTW89_RA_MODE_OFDM)
mask |= RA_MASK_SUBOFDM_RATES;
if (mode & RTW89_RA_MODE_CCK)
mask |= RA_MASK_SUBCCK_RATES;
ra_mask &= mask;
} else if (mode & RTW89_RA_MODE_OFDM) {
ra_mask &= (RA_MASK_OFDM_RATES | RA_MASK_SUBCCK_RATES);
}
if (mode != RTW89_RA_MODE_CCK)
ra_mask &= rtw89_phy_ra_mask_rssi(rtwdev, rssi, 0);
ra_mask = rtw89_phy_ra_mask_recover(ra_mask, ra_mask_bak);
ra_mask &= rtw89_phy_ra_mask_cfg(rtwdev, rtwsta);
#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 19, 0)
switch (sta->bandwidth) {
#else
switch (sta->deflink.bandwidth) {
#endif
case IEEE80211_STA_RX_BW_160:
bw_mode = RTW89_CHANNEL_WIDTH_160;
#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 19, 0)
sgi = sta->vht_cap.vht_supported &&
(sta->vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_160);
#else
sgi = sta->deflink.vht_cap.vht_supported &&
(sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_160);
#endif
break;
case IEEE80211_STA_RX_BW_80:
bw_mode = RTW89_CHANNEL_WIDTH_80;
#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 19, 0)
sgi = sta->vht_cap.vht_supported &&
(sta->vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80);
#else
sgi = sta->deflink.vht_cap.vht_supported &&
(sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80);
#endif
break;
case IEEE80211_STA_RX_BW_40:
bw_mode = RTW89_CHANNEL_WIDTH_40;
#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 19, 0)
sgi = sta->ht_cap.ht_supported &&
(sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_40);
#else
sgi = sta->deflink.ht_cap.ht_supported &&
(sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_40);
#endif
break;
default:
bw_mode = RTW89_CHANNEL_WIDTH_20;
#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 19, 0)
sgi = sta->ht_cap.ht_supported &&
(sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_20);
#else
sgi = sta->deflink.ht_cap.ht_supported &&
(sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_20);
#endif
break;
}
#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 19, 0)
if (sta->he_cap.he_cap_elem.phy_cap_info[3] &
IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_16_QAM)
#else
if (sta->deflink.he_cap.he_cap_elem.phy_cap_info[3] &
IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_16_QAM)
#endif
ra->dcm_cap = 1;
if (rate_pattern->enable) {
ra_mask = rtw89_phy_ra_mask_cfg(rtwdev, rtwsta);
ra_mask &= rate_pattern->ra_mask;
mode = rate_pattern->ra_mode;
}
ra->bw_cap = bw_mode;
ra->mode_ctrl = mode;
ra->macid = rtwsta->mac_id;
ra->stbc_cap = stbc_en;
ra->ldpc_cap = ldpc_en;
#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 19, 0)
ra->ss_num = min(sta->rx_nss, rtwdev->hal.tx_nss) - 1;
#else
ra->ss_num = min(sta->deflink.rx_nss, rtwdev->hal.tx_nss) - 1;
#endif
ra->en_sgi = sgi;
ra->ra_mask = ra_mask;
if (!csi)
return;
ra->fixed_csi_rate_en = false;
ra->ra_csi_rate_en = true;
ra->cr_tbl_sel = false;
ra->band_num = rtwvif->phy_idx;
ra->csi_bw = bw_mode;
ra->csi_gi_ltf = RTW89_GILTF_LGI_4XHE32;
ra->csi_mcs_ss_idx = 5;
ra->csi_mode = csi_mode;
}
void rtw89_phy_ra_updata_sta(struct rtw89_dev *rtwdev, struct ieee80211_sta *sta)
{
struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
struct rtw89_ra_info *ra = &rtwsta->ra;
rtw89_phy_ra_sta_update(rtwdev, sta, false);
ra->upd_mask = 1;
rtw89_debug(rtwdev, RTW89_DBG_RA,
"ra updat: macid = %d, bw = %d, nss = %d, gi = %d %d",
ra->macid,
ra->bw_cap,
ra->ss_num,
ra->en_sgi,
ra->giltf);
rtw89_fw_h2c_ra(rtwdev, ra, false);
}
static bool __check_rate_pattern(struct rtw89_phy_rate_pattern *next,
u16 rate_base, u64 ra_mask, u8 ra_mode,
u32 rate_ctrl, u32 ctrl_skip, bool force)
{
u8 n, c;
if (rate_ctrl == ctrl_skip)
return true;
n = hweight32(rate_ctrl);
if (n == 0)
return true;
if (force && n != 1)
return false;
if (next->enable)
return false;
c = __fls(rate_ctrl);
next->rate = rate_base + c;
next->ra_mode = ra_mode;
next->ra_mask = ra_mask;
next->enable = true;
return true;
}
void rtw89_phy_rate_pattern_vif(struct rtw89_dev *rtwdev,
struct ieee80211_vif *vif,
const struct cfg80211_bitrate_mask *mask)
{
struct ieee80211_supported_band *sband;
struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
struct rtw89_phy_rate_pattern next_pattern = {0};
#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 10, 0)
static const u16 hw_rate_he[] = {RTW89_HW_RATE_HE_NSS1_MCS0,
RTW89_HW_RATE_HE_NSS2_MCS0,
RTW89_HW_RATE_HE_NSS3_MCS0,
RTW89_HW_RATE_HE_NSS4_MCS0};
#endif
static const u16 hw_rate_vht[] = {RTW89_HW_RATE_VHT_NSS1_MCS0,
RTW89_HW_RATE_VHT_NSS2_MCS0,
RTW89_HW_RATE_VHT_NSS3_MCS0,
RTW89_HW_RATE_VHT_NSS4_MCS0};
static const u16 hw_rate_ht[] = {RTW89_HW_RATE_MCS0,
RTW89_HW_RATE_MCS8,
RTW89_HW_RATE_MCS16,
RTW89_HW_RATE_MCS24};
u8 band = rtwdev->hal.current_band_type;
u8 tx_nss = rtwdev->hal.tx_nss;
u8 i;
#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 10, 0)
for (i = 0; i < tx_nss; i++)
if (!__check_rate_pattern(&next_pattern, hw_rate_he[i],
RA_MASK_HE_RATES, RTW89_RA_MODE_HE,
mask->control[band].he_mcs[i],
0, true))
goto out;
#endif
for (i = 0; i < tx_nss; i++)
if (!__check_rate_pattern(&next_pattern, hw_rate_vht[i],
RA_MASK_VHT_RATES, RTW89_RA_MODE_VHT,
mask->control[band].vht_mcs[i],
0, true))
goto out;
for (i = 0; i < tx_nss; i++)
if (!__check_rate_pattern(&next_pattern, hw_rate_ht[i],
RA_MASK_HT_RATES, RTW89_RA_MODE_HT,
mask->control[band].ht_mcs[i],
0, true))
goto out;
/* lagacy cannot be empty for nl80211_parse_tx_bitrate_mask, and
* require at least one basic rate for ieee80211_set_bitrate_mask,
* so the decision just depends on if all bitrates are set or not.
*/
sband = rtwdev->hw->wiphy->bands[band];
if (band == RTW89_BAND_2G) {
if (!__check_rate_pattern(&next_pattern, RTW89_HW_RATE_CCK1,
RA_MASK_CCK_RATES | RA_MASK_OFDM_RATES,
RTW89_RA_MODE_CCK | RTW89_RA_MODE_OFDM,
mask->control[band].legacy,
BIT(sband->n_bitrates) - 1, false))
goto out;
} else {
if (!__check_rate_pattern(&next_pattern, RTW89_HW_RATE_OFDM6,
RA_MASK_OFDM_RATES, RTW89_RA_MODE_OFDM,
mask->control[band].legacy,
BIT(sband->n_bitrates) - 1, false))
goto out;
}
if (!next_pattern.enable)
goto out;
rtwvif->rate_pattern = next_pattern;
rtw89_debug(rtwdev, RTW89_DBG_RA,
"configure pattern: rate 0x%x, mask 0x%llx, mode 0x%x\n",
next_pattern.rate,
next_pattern.ra_mask,
next_pattern.ra_mode);
return;
out:
rtwvif->rate_pattern.enable = false;
rtw89_debug(rtwdev, RTW89_DBG_RA, "unset rate pattern\n");
}
static void rtw89_phy_ra_updata_sta_iter(void *data, struct ieee80211_sta *sta)
{
struct rtw89_dev *rtwdev = (struct rtw89_dev *)data;
rtw89_phy_ra_updata_sta(rtwdev, sta);
}
void rtw89_phy_ra_update(struct rtw89_dev *rtwdev)
{
ieee80211_iterate_stations_atomic(rtwdev->hw,
rtw89_phy_ra_updata_sta_iter,
rtwdev);
}
void rtw89_phy_ra_assoc(struct rtw89_dev *rtwdev, struct ieee80211_sta *sta)
{
struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
struct rtw89_ra_info *ra = &rtwsta->ra;
u8 rssi = ewma_rssi_read(&rtwsta->avg_rssi) >> RSSI_FACTOR;
bool csi = rtw89_sta_has_beamformer_cap(sta);
rtw89_phy_ra_sta_update(rtwdev, sta, csi);
if (rssi > 40)
ra->init_rate_lv = 1;
else if (rssi > 20)
ra->init_rate_lv = 2;
else if (rssi > 1)
ra->init_rate_lv = 3;
else
ra->init_rate_lv = 0;
ra->upd_all = 1;
rtw89_debug(rtwdev, RTW89_DBG_RA,
"ra assoc: macid = %d, mode = %d, bw = %d, nss = %d, lv = %d",
ra->macid,
ra->mode_ctrl,
ra->bw_cap,
ra->ss_num,
ra->init_rate_lv);
rtw89_debug(rtwdev, RTW89_DBG_RA,
"ra assoc: dcm = %d, er = %d, ldpc = %d, stbc = %d, gi = %d %d",
ra->dcm_cap,
ra->er_cap,
ra->ldpc_cap,
ra->stbc_cap,
ra->en_sgi,
ra->giltf);
rtw89_fw_h2c_ra(rtwdev, ra, csi);
}
u8 rtw89_phy_get_txsc(struct rtw89_dev *rtwdev,
struct rtw89_channel_params *param,
enum rtw89_bandwidth dbw)
{
enum rtw89_bandwidth cbw = param->bandwidth;
u8 pri_ch = param->primary_chan;
u8 central_ch = param->center_chan;
u8 txsc_idx = 0;
u8 tmp = 0;
if (cbw == dbw || cbw == RTW89_CHANNEL_WIDTH_20)
return txsc_idx;
switch (cbw) {
case RTW89_CHANNEL_WIDTH_40:
txsc_idx = pri_ch > central_ch ? 1 : 2;
break;
case RTW89_CHANNEL_WIDTH_80:
if (dbw == RTW89_CHANNEL_WIDTH_20) {
if (pri_ch > central_ch)
txsc_idx = (pri_ch - central_ch) >> 1;
else
txsc_idx = ((central_ch - pri_ch) >> 1) + 1;
} else {
txsc_idx = pri_ch > central_ch ? 9 : 10;
}
break;
case RTW89_CHANNEL_WIDTH_160:
if (pri_ch > central_ch)
tmp = (pri_ch - central_ch) >> 1;
else
tmp = ((central_ch - pri_ch) >> 1) + 1;
if (dbw == RTW89_CHANNEL_WIDTH_20) {
txsc_idx = tmp;
} else if (dbw == RTW89_CHANNEL_WIDTH_40) {
if (tmp == 1 || tmp == 3)
txsc_idx = 9;
else if (tmp == 5 || tmp == 7)
txsc_idx = 11;
else if (tmp == 2 || tmp == 4)
txsc_idx = 10;
else if (tmp == 6 || tmp == 8)
txsc_idx = 12;
else
return 0xff;
} else {
txsc_idx = pri_ch > central_ch ? 13 : 14;
}
break;
case RTW89_CHANNEL_WIDTH_80_80:
if (dbw == RTW89_CHANNEL_WIDTH_20) {
if (pri_ch > central_ch)
txsc_idx = (10 - (pri_ch - central_ch)) >> 1;
else
txsc_idx = ((central_ch - pri_ch) >> 1) + 5;
} else if (dbw == RTW89_CHANNEL_WIDTH_40) {
txsc_idx = pri_ch > central_ch ? 10 : 12;
} else {
txsc_idx = 14;
}
break;
default:
break;
}
return txsc_idx;
}
EXPORT_SYMBOL(rtw89_phy_get_txsc);
static bool rtw89_phy_check_swsi_busy(struct rtw89_dev *rtwdev)
{
return !!rtw89_phy_read32_mask(rtwdev, R_SWSI_V1, B_SWSI_W_BUSY_V1) ||
!!rtw89_phy_read32_mask(rtwdev, R_SWSI_V1, B_SWSI_R_BUSY_V1);
}
u32 rtw89_phy_read_rf(struct rtw89_dev *rtwdev, enum rtw89_rf_path rf_path,
u32 addr, u32 mask)
{
const struct rtw89_chip_info *chip = rtwdev->chip;
const u32 *base_addr = chip->rf_base_addr;
u32 val, direct_addr;
if (rf_path >= rtwdev->chip->rf_path_num) {
rtw89_err(rtwdev, "unsupported rf path (%d)\n", rf_path);
return INV_RF_DATA;
}
addr &= 0xff;
direct_addr = base_addr[rf_path] + (addr << 2);
mask &= RFREG_MASK;
val = rtw89_phy_read32_mask(rtwdev, direct_addr, mask);
return val;
}
EXPORT_SYMBOL(rtw89_phy_read_rf);
static u32 rtw89_phy_read_rf_a(struct rtw89_dev *rtwdev,
enum rtw89_rf_path rf_path, u32 addr, u32 mask)
{
bool busy;
bool done;
u32 val;
int ret;
ret = read_poll_timeout_atomic(rtw89_phy_check_swsi_busy, busy, !busy,
1, 30, false, rtwdev);
if (ret) {
rtw89_err(rtwdev, "read rf busy swsi\n");
return INV_RF_DATA;
}
mask &= RFREG_MASK;
val = FIELD_PREP(B_SWSI_READ_ADDR_PATH_V1, rf_path) |
FIELD_PREP(B_SWSI_READ_ADDR_ADDR_V1, addr);
rtw89_phy_write32_mask(rtwdev, R_SWSI_READ_ADDR_V1, B_SWSI_READ_ADDR_V1, val);
udelay(2);
ret = read_poll_timeout_atomic(rtw89_phy_read32_mask, done, done, 1,
30, false, rtwdev, R_SWSI_V1,
B_SWSI_R_DATA_DONE_V1);
if (ret) {
rtw89_err(rtwdev, "read swsi busy\n");
return INV_RF_DATA;
}
return rtw89_phy_read32_mask(rtwdev, R_SWSI_V1, mask);
}
u32 rtw89_phy_read_rf_v1(struct rtw89_dev *rtwdev, enum rtw89_rf_path rf_path,
u32 addr, u32 mask)
{
bool ad_sel = FIELD_GET(RTW89_RF_ADDR_ADSEL_MASK, addr);
if (rf_path >= rtwdev->chip->rf_path_num) {
rtw89_err(rtwdev, "unsupported rf path (%d)\n", rf_path);
return INV_RF_DATA;
}
if (ad_sel)
return rtw89_phy_read_rf(rtwdev, rf_path, addr, mask);
else
return rtw89_phy_read_rf_a(rtwdev, rf_path, addr, mask);
}
EXPORT_SYMBOL(rtw89_phy_read_rf_v1);
bool rtw89_phy_write_rf(struct rtw89_dev *rtwdev, enum rtw89_rf_path rf_path,
u32 addr, u32 mask, u32 data)
{
const struct rtw89_chip_info *chip = rtwdev->chip;
const u32 *base_addr = chip->rf_base_addr;
u32 direct_addr;
if (rf_path >= rtwdev->chip->rf_path_num) {
rtw89_err(rtwdev, "unsupported rf path (%d)\n", rf_path);
return false;
}
addr &= 0xff;
direct_addr = base_addr[rf_path] + (addr << 2);
mask &= RFREG_MASK;
rtw89_phy_write32_mask(rtwdev, direct_addr, mask, data);
/* delay to ensure writing properly */
udelay(1);
return true;
}
EXPORT_SYMBOL(rtw89_phy_write_rf);
static bool rtw89_phy_write_rf_a(struct rtw89_dev *rtwdev,
enum rtw89_rf_path rf_path, u32 addr, u32 mask,
u32 data)
{
u8 bit_shift;
u32 val;
bool busy, b_msk_en = false;
int ret;
ret = read_poll_timeout_atomic(rtw89_phy_check_swsi_busy, busy, !busy,
1, 30, false, rtwdev);
if (ret) {
rtw89_err(rtwdev, "write rf busy swsi\n");
return false;
}
data &= RFREG_MASK;
mask &= RFREG_MASK;
if (mask != RFREG_MASK) {
b_msk_en = true;
rtw89_phy_write32_mask(rtwdev, R_SWSI_BIT_MASK_V1, RFREG_MASK,
mask);
bit_shift = __ffs(mask);
data = (data << bit_shift) & RFREG_MASK;
}
val = FIELD_PREP(B_SWSI_DATA_BIT_MASK_EN_V1, b_msk_en) |
FIELD_PREP(B_SWSI_DATA_PATH_V1, rf_path) |
FIELD_PREP(B_SWSI_DATA_ADDR_V1, addr) |
FIELD_PREP(B_SWSI_DATA_VAL_V1, data);
rtw89_phy_write32_mask(rtwdev, R_SWSI_DATA_V1, MASKDWORD, val);
return true;
}
bool rtw89_phy_write_rf_v1(struct rtw89_dev *rtwdev, enum rtw89_rf_path rf_path,
u32 addr, u32 mask, u32 data)
{
bool ad_sel = FIELD_GET(RTW89_RF_ADDR_ADSEL_MASK, addr);
if (rf_path >= rtwdev->chip->rf_path_num) {
rtw89_err(rtwdev, "unsupported rf path (%d)\n", rf_path);
return false;
}
if (ad_sel)
return rtw89_phy_write_rf(rtwdev, rf_path, addr, mask, data);
else
return rtw89_phy_write_rf_a(rtwdev, rf_path, addr, mask, data);
}
EXPORT_SYMBOL(rtw89_phy_write_rf_v1);
static void rtw89_phy_bb_reset(struct rtw89_dev *rtwdev,
enum rtw89_phy_idx phy_idx)
{
const struct rtw89_chip_info *chip = rtwdev->chip;
chip->ops->bb_reset(rtwdev, phy_idx);
}
static void rtw89_phy_config_bb_reg(struct rtw89_dev *rtwdev,
const struct rtw89_reg2_def *reg,
enum rtw89_rf_path rf_path,
void *extra_data)
{
if (reg->addr == 0xfe)
mdelay(50);
else if (reg->addr == 0xfd)
mdelay(5);
else if (reg->addr == 0xfc)
mdelay(1);
else if (reg->addr == 0xfb)
udelay(50);
else if (reg->addr == 0xfa)
udelay(5);
else if (reg->addr == 0xf9)
udelay(1);
else
rtw89_phy_write32(rtwdev, reg->addr, reg->data);
}
static void
rtw89_phy_cofig_rf_reg_store(struct rtw89_dev *rtwdev,
const struct rtw89_reg2_def *reg,
enum rtw89_rf_path rf_path,
struct rtw89_fw_h2c_rf_reg_info *info)
{
u16 idx = info->curr_idx % RTW89_H2C_RF_PAGE_SIZE;
u8 page = info->curr_idx / RTW89_H2C_RF_PAGE_SIZE;
if (page >= RTW89_H2C_RF_PAGE_NUM) {
rtw89_warn(rtwdev, "RF parameters exceed size. path=%d, idx=%d",
rf_path, info->curr_idx);
return;
}
info->rtw89_phy_config_rf_h2c[page][idx] =
cpu_to_le32((reg->addr << 20) | reg->data);
info->curr_idx++;
}
static int rtw89_phy_config_rf_reg_fw(struct rtw89_dev *rtwdev,
struct rtw89_fw_h2c_rf_reg_info *info)
{
u16 remain = info->curr_idx;
u16 len = 0;
u8 i;
int ret = 0;
if (remain > RTW89_H2C_RF_PAGE_NUM * RTW89_H2C_RF_PAGE_SIZE) {
rtw89_warn(rtwdev,
"rf reg h2c total len %d larger than %d\n",
remain, RTW89_H2C_RF_PAGE_NUM * RTW89_H2C_RF_PAGE_SIZE);
ret = -EINVAL;
goto out;
}
for (i = 0; i < RTW89_H2C_RF_PAGE_NUM && remain; i++, remain -= len) {
len = remain > RTW89_H2C_RF_PAGE_SIZE ? RTW89_H2C_RF_PAGE_SIZE : remain;
ret = rtw89_fw_h2c_rf_reg(rtwdev, info, len * 4, i);
if (ret)
goto out;
}
out:
info->curr_idx = 0;
return ret;
}
static void rtw89_phy_config_rf_reg(struct rtw89_dev *rtwdev,
const struct rtw89_reg2_def *reg,
enum rtw89_rf_path rf_path,
void *extra_data)
{
if (reg->addr == 0xfe) {
mdelay(50);
} else if (reg->addr == 0xfd) {
mdelay(5);
} else if (reg->addr == 0xfc) {
mdelay(1);
} else if (reg->addr == 0xfb) {
udelay(50);
} else if (reg->addr == 0xfa) {
udelay(5);
} else if (reg->addr == 0xf9) {
udelay(1);
} else {
rtw89_write_rf(rtwdev, rf_path, reg->addr, 0xfffff, reg->data);
rtw89_phy_cofig_rf_reg_store(rtwdev, reg, rf_path,
(struct rtw89_fw_h2c_rf_reg_info *)extra_data);
}
}
void rtw89_phy_config_rf_reg_v1(struct rtw89_dev *rtwdev,
const struct rtw89_reg2_def *reg,
enum rtw89_rf_path rf_path,
void *extra_data)
{
rtw89_write_rf(rtwdev, rf_path, reg->addr, RFREG_MASK, reg->data);
if (reg->addr < 0x100)
return;
rtw89_phy_cofig_rf_reg_store(rtwdev, reg, rf_path,
(struct rtw89_fw_h2c_rf_reg_info *)extra_data);
}
EXPORT_SYMBOL(rtw89_phy_config_rf_reg_v1);
static int rtw89_phy_sel_headline(struct rtw89_dev *rtwdev,