projects: change intel SPI Engine projects to use new script

Signed-off-by: Laez Barbosa <laez.barbosa@analog.com>

Author: LBFFilho

projects/ad4052_ardz/common/ad4052_qsys.tcl

@@ -11,36 +11,6 @@ set_instance_parameter_value axi_dmac_0 {CYCLIC} {0}
 set_instance_parameter_value axi_dmac_0 {DMA_DATA_WIDTH_SRC} {32}
 set_instance_parameter_value axi_dmac_0 {DMA_DATA_WIDTH_DEST} {128}
 
-# axi_spi_engine
-
-add_instance axi_spi_engine_0 axi_spi_engine
-set_instance_parameter_value axi_spi_engine_0 {ASYNC_SPI_CLK} {1}
-set_instance_parameter_value axi_spi_engine_0 {DATA_WIDTH} {32}
-set_instance_parameter_value axi_spi_engine_0 {MM_IF_TYPE} {0}
-set_instance_parameter_value axi_spi_engine_0 {NUM_OF_SDI} {1}
-set_instance_parameter_value axi_spi_engine_0 {NUM_OFFLOAD} {1}
-
-# spi_engine_execution
-
-add_instance spi_engine_execution_0 spi_engine_execution
-set_instance_parameter_value spi_engine_execution_0 {DATA_WIDTH} {32}
-set_instance_parameter_value spi_engine_execution_0 {NUM_OF_SDI} {1}
-set_instance_parameter_value spi_engine_execution_0 {SDI_DELAY} {0}
-
-# spi_engine_interconnect
-
-add_instance spi_engine_interconnect_0 spi_engine_interconnect
-set_instance_parameter_value spi_engine_interconnect_0 {DATA_WIDTH} {32}
-set_instance_parameter_value spi_engine_interconnect_0 {NUM_OF_SDI} {1}
-
-# spi_engine_offload
-
-add_instance spi_engine_offload_0 spi_engine_offload
-set_instance_parameter_value spi_engine_offload_0 {ASYNC_TRIG} {1}
-set_instance_parameter_value spi_engine_offload_0 {ASYNC_SPI_CLK} {0}
-set_instance_parameter_value spi_engine_offload_0 {DATA_WIDTH} {32}
-set_instance_parameter_value spi_engine_offload_0 {NUM_OF_SDI} {1}
-
 # axi_pwm_gen
 
 add_instance pwm_trigger axi_pwm_gen
@@ -87,6 +57,26 @@ set_connection_parameter_value spi_clk_pll.reconfig_to_pll/spi_clk_pll_reconfig.
 set_connection_parameter_value spi_clk_pll.reconfig_to_pll/spi_clk_pll_reconfig.reconfig_to_pll startPortLSB {0}
 set_connection_parameter_value spi_clk_pll.reconfig_to_pll/spi_clk_pll_reconfig.reconfig_to_pll width {0}
 
+# spi engine
+source $ad_hdl_dir/library/spi_engine/scripts/spi_engine.tcl
+
+set spi_engine_hier spi_ad4052
+
+set data_width 32
+set async_spi_clk 1
+set num_cs 1
+set num_sdi 1
+set num_sdo 1
+set sdi_delay 0
+set echo_sclk 0
+set sdo_streaming 0
+
+set axi_clk sys_clk.clk
+set axi_reset sys_clk.clk_reset
+set spi_clk spi_clk_pll.outclk0
+
+spi_engine_create $spi_engine_hier $axi_clk $axi_reset $spi_clk $data_width $async_spi_clk $num_cs $num_sdi $num_sdo $sdi_delay $echo_sclk $sdo_streaming
+set_instance_parameter_value ${spi_engine_hier}_offload {ASYNC_TRIG} {1}
 # exported interface
 
 add_interface adc_spi_sclk    clock source
@@ -95,27 +85,21 @@ add_interface adc_spi_sdo     conduit end
 add_interface adc_spi_cs      conduit end
 add_interface adc_drdy        conduit end
 
-set_interface_property adc_spi_sclk     EXPORT_OF spi_engine_execution_0.if_sclk
-set_interface_property adc_spi_sdi      EXPORT_OF spi_engine_execution_0.if_sdi
-set_interface_property adc_spi_sdo      EXPORT_OF spi_engine_execution_0.if_sdo
-set_interface_property adc_spi_cs       EXPORT_OF spi_engine_execution_0.if_cs
-set_interface_property adc_drdy_trigger EXPORT_OF spi_engine_offload_0.if_trigger
+set_interface_property adc_spi_sclk     EXPORT_OF ${spi_engine_hier}_execution.if_sclk
+set_interface_property adc_spi_sdi      EXPORT_OF ${spi_engine_hier}_execution.if_sdi
+set_interface_property adc_spi_sdo      EXPORT_OF ${spi_engine_hier}_execution.if_sdo
+set_interface_property adc_spi_cs       EXPORT_OF ${spi_engine_hier}_execution.if_cs
+set_interface_property adc_drdy_trigger EXPORT_OF ${spi_engine_hier}_offload.if_trigger
 set_interface_property adc_cnv          EXPORT_OF pwm_trigger.if_pwm_0
 
 # clocks
 
 add_connection sys_clk.clk spi_clk_pll.refclk
 add_connection sys_clk.clk spi_clk_pll_reconfig.mgmt_clk
-add_connection sys_clk.clk axi_spi_engine_0.s_axi_clock
 add_connection sys_clk.clk axi_dmac_0.s_axi_clock
 add_connection sys_clk.clk pwm_trigger.s_axi_clock
 
 add_connection spi_clk_pll.outclk0 pwm_trigger.if_ext_clk
-add_connection spi_clk_pll.outclk0 spi_engine_execution_0.if_clk
-add_connection spi_clk_pll.outclk0 spi_engine_interconnect_0.if_clk
-add_connection spi_clk_pll.outclk0 axi_spi_engine_0.if_spi_clk
-add_connection spi_clk_pll.outclk0 spi_engine_offload_0.if_ctrl_clk
-add_connection spi_clk_pll.outclk0 spi_engine_offload_0.if_spi_clk
 add_connection spi_clk_pll.outclk0 axi_dmac_0.if_s_axis_aclk
 
 add_connection sys_dma_clk.clk axi_dmac_0.m_dest_axi_clock
@@ -124,47 +108,19 @@ add_connection sys_dma_clk.clk axi_dmac_0.m_dest_axi_clock
 
 add_connection sys_clk.clk_reset spi_clk_pll.reset
 add_connection sys_clk.clk_reset spi_clk_pll_reconfig.mgmt_reset
-add_connection sys_clk.clk_reset axi_spi_engine_0.s_axi_reset
 add_connection sys_clk.clk_reset axi_dmac_0.s_axi_reset
 add_connection sys_clk.clk_reset pwm_trigger.s_axi_reset
 
-add_connection axi_spi_engine_0.if_spi_resetn spi_engine_execution_0.if_resetn
-add_connection axi_spi_engine_0.if_spi_resetn spi_engine_interconnect_0.if_resetn
-add_connection axi_spi_engine_0.if_spi_resetn spi_engine_offload_0.if_spi_resetn
-
 add_connection sys_dma_clk.clk_reset axi_dmac_0.m_dest_axi_reset
 
 # interfaces
 
-add_connection spi_engine_interconnect_0.m_cmd spi_engine_execution_0.cmd
-add_connection spi_engine_execution_0.sdi_data spi_engine_interconnect_0.m_sdi
-add_connection spi_engine_interconnect_0.m_sdo spi_engine_execution_0.sdo_data
-add_connection spi_engine_execution_0.sync spi_engine_interconnect_0.m_sync
-
-add_connection axi_spi_engine_0.cmd spi_engine_interconnect_0.s1_cmd
-add_connection spi_engine_interconnect_0.s1_sdi axi_spi_engine_0.sdi_data
-add_connection axi_spi_engine_0.sdo_data spi_engine_interconnect_0.s1_sdo
-add_connection spi_engine_interconnect_0.s1_sync axi_spi_engine_0.sync
-
-add_connection spi_engine_offload_0.cmd spi_engine_interconnect_0.s0_cmd
-add_connection spi_engine_interconnect_0.s0_sdi spi_engine_offload_0.sdi_data
-add_connection spi_engine_offload_0.sdo_data spi_engine_interconnect_0.s0_sdo
-add_connection spi_engine_interconnect_0.s0_sync spi_engine_offload_0.sync
-add_connection spi_engine_offload_0.m_interconnect_ctrl spi_engine_interconnect_0.s_interconnect_ctrl
-
-add_connection spi_engine_offload_0.ctrl_cmd_wr       axi_spi_engine_0.offload0_cmd
-add_connection spi_engine_offload_0.ctrl_sdo_wr       axi_spi_engine_0.offload0_sdo
-add_connection spi_engine_offload_0.if_ctrl_enable    axi_spi_engine_0.if_offload0_enable
-add_connection spi_engine_offload_0.if_ctrl_enabled   axi_spi_engine_0.if_offload0_enabled
-add_connection spi_engine_offload_0.if_ctrl_mem_reset axi_spi_engine_0.if_offload0_mem_reset
-add_connection spi_engine_offload_0.status_sync       axi_spi_engine_0.offload_sync
-
-add_connection spi_engine_offload_0.offload_sdi axi_dmac_0.s_axis
+add_connection ${spi_engine_hier}_offload.offload_sdi axi_dmac_0.s_axis
 
 # cpu interconnects
 
 ad_cpu_interconnect 0x00020000 axi_dmac_0.s_axi
-ad_cpu_interconnect 0x00030000 axi_spi_engine_0.s_axi
+ad_cpu_interconnect 0x00030000 ${spi_engine_hier}_axi_regmap.s_axi
 ad_cpu_interconnect 0x00040000 pwm_trigger.s_axi
 ad_cpu_interconnect 0x00050000 spi_clk_pll_reconfig.mgmt_avalon_slave
 
@@ -175,4 +131,4 @@ ad_dma_interconnect axi_dmac_0.m_dest_axi
 #interrupts
 
 ad_cpu_interrupt 4 axi_dmac_0.interrupt_sender
-ad_cpu_interrupt 5 axi_spi_engine_0.interrupt_sender
+ad_cpu_interrupt 5 ${spi_engine_hier}_axi_regmap.interrupt_sender

projects/ad411x_ad717x/common/ad411x_ad717x_asdz_qsys.tcl

@@ -12,40 +12,31 @@ set_instance_parameter_value axi_dmac_0 {CYCLIC} {0}
 set_instance_parameter_value axi_dmac_0 {DMA_DATA_WIDTH_SRC} {32}
 set_instance_parameter_value axi_dmac_0 {DMA_DATA_WIDTH_DEST} {128}
 
-# axi_spi_engine
-
-add_instance axi_spi_engine_0 axi_spi_engine
-set_instance_parameter_value axi_spi_engine_0 {ASYNC_SPI_CLK} {1}
-set_instance_parameter_value axi_spi_engine_0 {DATA_WIDTH}    {32}
-set_instance_parameter_value axi_spi_engine_0 {MM_IF_TYPE}    {0}
-set_instance_parameter_value axi_spi_engine_0 {NUM_OF_SDI}    {1}
-set_instance_parameter_value axi_spi_engine_0 {NUM_OFFLOAD}   {1}
-
-# spi_engine_execution
+# util_sigma_delta_spi
 
-add_instance spi_engine_execution_0 spi_engine_execution
-set_instance_parameter_value spi_engine_execution_0 {DATA_WIDTH} {32}
-set_instance_parameter_value spi_engine_execution_0 {NUM_OF_SDI} {1}
-set_instance_parameter_value spi_engine_execution_0 {SDI_DELAY} {0}
+add_instance util_sigma_delta_spi util_sigma_delta_spi
+set_instance_parameter_value util_sigma_delta_spi {NUM_OF_CS} {1}
 
-# spi_engine_interconnect
+# spi engine
+source $ad_hdl_dir/library/spi_engine/scripts/spi_engine.tcl
 
-add_instance spi_engine_interconnect_0 spi_engine_interconnect
-set_instance_parameter_value spi_engine_interconnect_0 {DATA_WIDTH} {32}
-set_instance_parameter_value spi_engine_interconnect_0 {NUM_OF_SDI} {1}
+set spi_engine_hier spi_ad411x_ad717x
 
-# spi_engine_offload
+set data_width 32
+set async_spi_clk 1
+set num_cs 1
+set num_sdi 1
+set num_sdo 1
+set sdi_delay 0
+set echo_sclk 0
+set sdo_streaming 0
 
-add_instance spi_engine_offload_0 spi_engine_offload
-set_instance_parameter_value spi_engine_offload_0 {ASYNC_TRIG}    {1}
-set_instance_parameter_value spi_engine_offload_0 {ASYNC_SPI_CLK} {0}
-set_instance_parameter_value spi_engine_offload_0 {DATA_WIDTH}    {32}
-set_instance_parameter_value spi_engine_offload_0 {NUM_OF_SDI}    {1}
+set axi_clk sys_clk.clk
+set axi_reset sys_clk.clk_reset
+set spi_clk sys_dma_clk.clk
 
-# util_sigma_delta_spi
-
-add_instance util_sigma_delta_spi util_sigma_delta_spi
-set_instance_parameter_value util_sigma_delta_spi {NUM_OF_CS} {1}
+spi_engine_create $spi_engine_hier $axi_clk $axi_reset $spi_clk $data_width $async_spi_clk $num_cs $num_sdi $num_sdo $sdi_delay $echo_sclk $sdo_streaming
+set_instance_parameter_value ${spi_engine_hier}_offload {ASYNC_TRIG}    {1}
 
 # exported interface
 
@@ -64,78 +55,42 @@ set_interface_property ad411x_spi_trigger EXPORT_OF util_sigma_delta_spi.if_data
 
 # clocks
 
-add_connection sys_clk.clk axi_spi_engine_0.s_axi_clock
 add_connection sys_clk.clk axi_dmac_0.s_axi_clock
 
+add_connection sys_dma_clk.clk axi_dmac_0.if_s_axis_aclk
+add_connection sys_dma_clk.clk axi_dmac_0.m_dest_axi_clock
+
 # util_sigma_delta_connection
 
 add_connection sys_dma_clk.clk util_sigma_delta_spi.if_clk
 add_connection sys_clk.clk_reset util_sigma_delta_spi.if_resetn
 
-add_connection spi_engine_execution_0.if_cs util_sigma_delta_spi.if_s_cs
-add_connection spi_engine_execution_0.if_sclk util_sigma_delta_spi.if_s_sclk
-add_connection spi_engine_execution_0.if_sdi util_sigma_delta_spi.if_s_sdi
-add_connection spi_engine_execution_0.if_sdo util_sigma_delta_spi.if_s_sdo
-add_connection spi_engine_execution_0.if_sdo_t util_sigma_delta_spi.if_s_sdo_t
-add_connection spi_engine_offload_0.if_trigger util_sigma_delta_spi.if_data_ready
-
-# add_connection axi_spi_engine_0.
-
-add_connection sys_dma_clk.clk spi_engine_execution_0.if_clk
-add_connection sys_dma_clk.clk spi_engine_interconnect_0.if_clk
-add_connection sys_dma_clk.clk axi_spi_engine_0.if_spi_clk
-add_connection sys_dma_clk.clk spi_engine_offload_0.if_ctrl_clk
-add_connection sys_dma_clk.clk spi_engine_offload_0.if_spi_clk
-add_connection sys_dma_clk.clk axi_dmac_0.if_s_axis_aclk
-add_connection sys_dma_clk.clk axi_dmac_0.m_dest_axi_clock
+add_connection ${spi_engine_hier}_execution.if_cs util_sigma_delta_spi.if_s_cs
+add_connection ${spi_engine_hier}_execution.if_sclk util_sigma_delta_spi.if_s_sclk
+add_connection ${spi_engine_hier}_execution.if_sdi util_sigma_delta_spi.if_s_sdi
+add_connection ${spi_engine_hier}_execution.if_sdo util_sigma_delta_spi.if_s_sdo
+add_connection ${spi_engine_hier}_execution.if_sdo_t util_sigma_delta_spi.if_s_sdo_t
+add_connection ${spi_engine_hier}_offload.if_trigger util_sigma_delta_spi.if_data_ready
 
 # resets
 
-add_connection sys_clk.clk_reset axi_spi_engine_0.s_axi_reset
 add_connection sys_clk.clk_reset axi_dmac_0.s_axi_reset
 
-add_connection axi_spi_engine_0.if_spi_resetn spi_engine_execution_0.if_resetn
-add_connection axi_spi_engine_0.if_spi_resetn spi_engine_interconnect_0.if_resetn
-add_connection axi_spi_engine_0.if_spi_resetn spi_engine_offload_0.if_spi_resetn
-
 add_connection sys_dma_clk.clk_reset axi_dmac_0.m_dest_axi_reset
 
 # interfaces
 
-add_connection spi_engine_interconnect_0.m_cmd spi_engine_execution_0.cmd
-add_connection spi_engine_execution_0.sdi_data spi_engine_interconnect_0.m_sdi
-add_connection spi_engine_interconnect_0.m_sdo spi_engine_execution_0.sdo_data
-add_connection spi_engine_execution_0.sync spi_engine_interconnect_0.m_sync
-
-add_connection axi_spi_engine_0.cmd spi_engine_interconnect_0.s1_cmd
-add_connection spi_engine_interconnect_0.s1_sdi axi_spi_engine_0.sdi_data
-add_connection axi_spi_engine_0.sdo_data spi_engine_interconnect_0.s1_sdo
-add_connection spi_engine_interconnect_0.s1_sync axi_spi_engine_0.sync
-add_connection spi_engine_offload_0.m_interconnect_ctrl spi_engine_interconnect_0.s_interconnect_ctrl
-
-add_connection spi_engine_offload_0.cmd spi_engine_interconnect_0.s0_cmd
-add_connection spi_engine_interconnect_0.s0_sdi  spi_engine_offload_0.sdi_data
-add_connection spi_engine_offload_0.sdo_data spi_engine_interconnect_0.s0_sdo
-add_connection spi_engine_interconnect_0.s0_sync spi_engine_offload_0.sync
-
-add_connection spi_engine_offload_0.ctrl_cmd_wr       axi_spi_engine_0.offload0_cmd
-add_connection spi_engine_offload_0.ctrl_sdo_wr       axi_spi_engine_0.offload0_sdo
-add_connection spi_engine_offload_0.if_ctrl_enable    axi_spi_engine_0.if_offload0_enable
-add_connection spi_engine_offload_0.if_ctrl_enabled   axi_spi_engine_0.if_offload0_enabled
-add_connection spi_engine_offload_0.if_ctrl_mem_reset axi_spi_engine_0.if_offload0_mem_reset
-add_connection spi_engine_offload_0.status_sync       axi_spi_engine_0.offload_sync
-
-add_connection spi_engine_offload_0.offload_sdi axi_dmac_0.s_axis
+add_connection ${spi_engine_hier}_offload.offload_sdi axi_dmac_0.s_axis
 
 # cpu interconnects
 
 ad_cpu_interconnect 0x00020000 axi_dmac_0.s_axi
-ad_cpu_interconnect 0x00030000 axi_spi_engine_0.s_axi
+ad_cpu_interconnect 0x00030000 ${spi_engine_hier}_axi_regmap.s_axi
 
 # dma interconnect
 ad_dma_interconnect axi_dmac_0.m_dest_axi
 
 # interrupts
 
 ad_cpu_interrupt 4 axi_dmac_0.interrupt_sender
-ad_cpu_interrupt 5 axi_spi_engine_0.interrupt_sender
+ad_cpu_interrupt 5 ${spi_engine_hier}_axi_regmap.interrupt_sender