library/spi_engine: cosmetic changes

Signed-off-by: Carlos Souza <carlos.souza@analog.com>

Author: caosjr

library/spi_engine/spi_engine_execution/spi_engine_execution.v

@@ -188,8 +188,7 @@ module spi_engine_execution #(
     .ECHO_SCLK(ECHO_SCLK),
     .CMD_TRANSFER(CMD_TRANSFER),
     .CMD_WRITE(CMD_WRITE),
-    .REG_SPI_LANE_CONFIG(REG_SPI_LANE_CONFIG),
-    .REG_CONFIG(REG_CONFIG)
+    .REG_SPI_LANE_CONFIG(REG_SPI_LANE_CONFIG)
   ) shiftreg (
     .clk(clk),
     .resetn(resetn),

library/spi_engine/spi_engine_execution/spi_engine_execution_shiftreg.v

@@ -45,8 +45,7 @@ module spi_engine_execution_shiftreg #(
   parameter ECHO_SCLK = 0,
   parameter [2:0] CMD_TRANSFER = 3'b000,
   parameter [2:0] CMD_WRITE = 3'b010,
-  parameter [1:0] REG_SPI_LANE_CONFIG = 2'b11,
-  parameter [1:0] REG_CONFIG = 2'b01
+  parameter [1:0] REG_SPI_LANE_CONFIG = 2'b11
 ) (
   input   clk,
   input   resetn,
@@ -113,8 +112,7 @@ module spi_engine_execution_shiftreg #(
     .DATA_WIDTH(DATA_WIDTH),
     .NUM_OF_SDI(NUM_OF_SDI),
     .CMD_WRITE(CMD_WRITE),
-    .REG_SPI_LANE_CONFIG(REG_SPI_LANE_CONFIG),
-    .REG_CONFIG (REG_CONFIG)
+    .REG_SPI_LANE_CONFIG(REG_SPI_LANE_CONFIG)
   ) sdo_data_assemble (
     .clk (clk),
     .resetn (resetn),

library/spi_engine/spi_engine_execution/spi_engine_execution_shiftreg_data_assemble.v

@@ -3,57 +3,52 @@ module spi_engine_execution_shiftreg_data_assemble #(
     parameter DATA_WIDTH = 8,
     parameter NUM_OF_SDI = 1,
     parameter [2:0] CMD_WRITE = 3'b010,
-    parameter [1:0] REG_SPI_LANE_CONFIG = 2'b11,
-    parameter [1:0] REG_CONFIG = 2'b01
+    parameter [1:0] REG_SPI_LANE_CONFIG = 2'b11
 ) (
-    input   clk,
-    input   resetn,
-    input                [(DATA_WIDTH)-1:0]  data,
-    input                                    data_ready,
-    input                                    data_valid,
-    input                            [15:0]  current_cmd,
-    input                             [7:0]  lane_mask,
-    input                                    idle_state,
-    input                             [7:0]  left_aligned,
-    input                                    transfer_active,
-    input                                    trigger_tx,
-    input                                    first_bit,
-    input                                    sdo_enabled,
-    output  [(NUM_OF_SDI * DATA_WIDTH)-1:0]  data_assembled,
-    output                                   last_handshake
+    input                                  clk,
+    input                                  resetn,
+    input               [(DATA_WIDTH)-1:0] data,
+    input                                  data_ready,
+    input                                  data_valid,
+    input                           [15:0] current_cmd,
+    input                            [7:0] lane_mask,
+    input                                  idle_state,
+    input                            [7:0] left_aligned,
+    input                                  transfer_active,
+    input                                  trigger_tx,
+    input                                  first_bit,
+    input                                  sdo_enabled,
+    output [(NUM_OF_SDI * DATA_WIDTH)-1:0] data_assembled,
+    output                                 last_handshake
 );
 
 // This module is responsible to align data for different lane masks
-// if spi_lane_mask has all of its SDOs activated, then it allows prefetch data
+// if lane_mask has all of its SDOs activated, then it allows prefetch data
 // if not, non activated serial lines have their data fulfilled with idle_state and buffer the remaining activated lines
 // also, in this mode it is not possible to prefetch data
 
+reg                                  last_handshake_int;
 reg  [(NUM_OF_SDI * DATA_WIDTH)-1:0] aligned_data;
-reg  [(DATA_WIDTH)-1:0] data_reg;
-reg  [DATA_WIDTH-1:0] data_reg_d;
+reg  [             (DATA_WIDTH)-1:0] data_reg;
+reg  [                          3:0] count_active_lanes = 0;
 
-integer                 num_active_lanes = NUM_OF_SDI;
-reg               [3:0] count_active_lanes = 0;
-reg                     last_handshake_int;
-reg               [7:0] spi_lane_config_mask = ALL_ACTIVE_LANE_MASK;
-integer                 lane_index = 0;
-integer                 lane_index_d = 0;
-integer                 valid_indices [0:7];
-integer                 valid_index = 0;
+wire       sdo_toshiftreg         = (transfer_active && trigger_tx && first_bit && sdo_enabled);
+wire [2:0] current_instr          = current_cmd[14:12];
+wire [1:0] configuration_register = current_cmd[9:8];
+wire       exec_lane_config_cmd   = ((current_instr == CMD_WRITE) && (configuration_register == REG_SPI_LANE_CONFIG));
 
-wire                    sdo_toshiftreg = (transfer_active && trigger_tx && first_bit && sdo_enabled);
-wire              [2:0] current_instr = current_cmd[14:12];
-wire              [1:0] configuration_register = current_cmd[9:8];
-wire                    exec_lane_config_cmd = ((current_instr == CMD_WRITE) && (configuration_register == REG_SPI_LANE_CONFIG));
-wire                    exec_spi_cfg = ((current_instr == CMD_WRITE) && (configuration_register == REG_CONFIG));
+integer num_active_lanes     = NUM_OF_SDI;
+integer lane_index           = 0;
+integer lane_index_d         = 0;
+integer valid_index          = 0;
+integer valid_indices [0:7];
 
 assign data_assembled = aligned_data;
 assign last_handshake = last_handshake_int;
 
 // register data
 always @(posedge clk) begin
     if (resetn == 1'b0) begin
-        // data_reg <= {(NUM_OF_SDI * DATA_WIDTH){idle_state}};
         data_reg <= {DATA_WIDTH{idle_state}};
     end else begin
         if (data_ready && data_valid) begin
@@ -84,7 +79,6 @@ always @(posedge clk) begin
         j <= 0;
     end else begin
         if (exec_lane_config_cmd) begin
-            spi_lane_config_mask <= current_cmd[7:0];
             count_active_lanes = 0;
             i = 0;
             j <= 0;
@@ -94,7 +88,7 @@ always @(posedge clk) begin
             num_active_lanes <= count_active_lanes;
         end else begin
             if (j < NUM_OF_SDI) begin
-                if (spi_lane_config_mask[j]) begin
+                if (lane_mask[j]) begin
                     valid_indices[mask_index] <= j;
                     mask_index <= mask_index + 1;
                 end
@@ -123,11 +117,11 @@ always @(posedge clk) begin
                 lane_index <= 0;
             end
             lane_index_d <= lane_index;
-            valid_index <= (spi_lane_config_mask == ALL_ACTIVE_LANE_MASK) ? lane_index : valid_indices[lane_index_d];
+            valid_index <= (lane_mask == ALL_ACTIVE_LANE_MASK) ? lane_index : valid_indices[lane_index_d];
         end else if (sdo_toshiftreg) begin
             last_handshake_int <= 1'b0;
         end
     end
 end
 
-endmodule
+endmodule