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docs: projects: ad9084_fmca_ebz: Table header, white-space
Signed-off-by: Jorge Marques <jorge.marques@analog.com>
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‎docs/projects/ad9084_fmca_ebz/index.rst‎

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@@ -85,8 +85,9 @@ Block design
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.. important::
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The Apollo chip is split into two sides, each side having up to 12 JESD lanes and 4 converters:
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- Side A
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- Side B
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- Side A
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- Side B
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The ``ASYMMETRIC_A_B_MODE`` parameter is used to enable the asymmetric A/B mode
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where each Apollo side has a separate JESD link inside the block design.
@@ -95,36 +96,46 @@ Block design
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the two sides into a single link.
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Given the following JESD204 configuration and assuming that **ASYMMETRIC_A_B_MODE = 0**:
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- L = 8
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- M = 4
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- S = 1
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- N = NP = 16
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- **NUM_LINKS = 2**
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The resulted design will configure each Apollo side with the following parameters, but will merge the two sides into a single JESD link inside the design:
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- L = 8
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- M = 4
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- S = 1
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- N = NP = 16
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If however, **NUM_LINKS = 1**, the design will configure each side with the following parameters:
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- L = 4
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- M = 2
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- S = 1
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- N = NP = 16
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Given the following JESD204 configuration and assuming that **ASYMMETRIC_A_B_MODE = 1**:
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- L = 8
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- M = 4
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- S = 1
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- N = NP = 16
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- **NUM_LINKS is ignored**
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The resulted design will configure each Apollo side with the following parameters, each having it's own JESD link inside the design:
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- L = 8
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- M = 4
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- S = 1
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- N = NP = 16
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- L = 8
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- M = 4
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- S = 1
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- N = NP = 16
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- **NUM_LINKS = 2**
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The resulted design will configure each Apollo side with the following
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parameters, but will merge the two sides into a single JESD link inside the
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design:
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- L = 8
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- M = 4
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- S = 1
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- N = NP = 16
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If however, **NUM_LINKS = 1**, the design will configure each side with the
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following parameters:
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- L = 4
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- M = 2
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- S = 1
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- N = NP = 16
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Given the following JESD204 configuration and assuming that
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**ASYMMETRIC_A_B_MODE = 1**:
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- L = 8
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- M = 4
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- S = 1
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- N = NP = 16
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- **NUM_LINKS is ignored**
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The resulted design will configure each Apollo side with the following
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parameters, each having it's own JESD link inside the design:
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- L = 8
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- M = 4
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- S = 1
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- N = NP = 16
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Block diagram
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
@@ -146,6 +157,7 @@ Example block design for ASYMMETRIC_A_B_MODE=0; M=4; L=8; NUM_LINKS=2; JESD204C
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The project must be built with the following parameters:
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.. shell:: bash
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:no-path:
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$make JESD_MODE=64B66B \
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$ RX_LANE_RATE=20.625 \
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The project must be built with the following parameters:
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.. shell:: bash
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:no-path:
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$make JESD_MODE=64B66B \
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$ RX_LANE_RATE=20.625 \
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The block design supports configuration of parameters and scales.
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We have listed a couple of examples at section
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`Building the HDL project`_ and the default modes
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for each project.
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We have listed a couple of examples at section :ref:`ad9084_fmca_ebz build` and
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the default modes for each project.
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.. note::
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@@ -585,6 +597,8 @@ axi_apollo_rx_b_jesd 2 2 86
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axi_apollo_tx_b_jesd 1 1 85
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==================== === ================ ============
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.. _ad9084_fmca_ebz build:
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Building the HDL project
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-------------------------------------------------------------------------------
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@@ -630,11 +644,11 @@ for that project (ad9084_fmca_ebz/$carrier).
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.. collapsible:: Default values of the make parameters for AD9084-FMCA-EBZ
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+---------------------+----------+--------+--------+--------+-------+
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+---------------------+---------------------------------------------+
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| Parameter | Default value of the parameters |
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| +--------+--------+---------+--------+--------+
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| | FM87 | VCU118 | VCU128 | VCK190 | VPK180 |
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+---------------------+--------+--------+---------+--------+--------+
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+=====================+========+========+=========+========+========+
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| JESD_MODE | 64B66B | 64B66B | 64B66B | 64B66B | 64B66B |
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+---------------------+--------+--------+---------+--------+--------+
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| ENABLE_HSCI |:red:`-`| 1 | :red:`-`| 1* | 1* |
@@ -702,7 +716,7 @@ for that project (ad9084_fmca_ebz/$carrier).
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| DAC_DO_MEM_TYPE | --- | --- | 2 | --- | --- |
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+---------------------+--------+--------+---------+--------+--------+
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.. admonition:: Legend
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.. admonition:: Legend
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:class: note
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:red:`-` --- this feature is not supported

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