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library/spi_engine: fix execution
Fixes the bug related to the sdo lane config instruction, which was high all the time and not for a single cycle. That was causing the data_assemble module to be rebuilding the lookup table, and consequently affecting the output of the offload mode. Removed lane_index_d because it is not necessary anymore. Both FIFO and OFFLOAD modes are using the valid_indices lookup table. Signed-off-by: Carlos Souza <carlos.souza@analog.com>
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library/spi_engine/spi_engine_execution/spi_engine_execution.v

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@@ -254,6 +254,7 @@ module spi_engine_execution #(
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exec_chipselect_cmd_reg <= (inst == CMD_CHIPSELECT);
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exec_sdo_lane_config_reg <= (inst == CMD_WRITE) && (cmd[10:8] == REG_SDO_LANE_CONFIG);
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end else begin
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exec_sdo_lane_config_reg <= 1'b0;
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sleep_counter_compare <= sleep_counter == cmd_d1_time && clk_div_last && sleep_counter_increment;
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end
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end

library/spi_engine/spi_engine_execution/spi_engine_execution_shiftreg_data_assemble.v

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@@ -72,7 +72,6 @@ module spi_engine_execution_shiftreg_data_assemble #(
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reg [ 3:0] count_active_lanes = 0;
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reg [ 3:0] num_active_lanes = NUM_OF_SDIO;
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reg [ 3:0] lane_index = 0;
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reg [ 3:0] lane_index_d = 0;
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reg [ 3:0] valid_indices [0:7];
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wire sdo_toshiftreg = (transfer_active && trigger_tx && first_bit && sdo_enabled);
@@ -147,7 +146,6 @@ module spi_engine_execution_shiftreg_data_assemble #(
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always @(posedge clk) begin
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if (resetn == 1'b0) begin
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lane_index <= 0;
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lane_index_d <= 0;
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valid_index <= 0;
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last_handshake_int <= 1'b0;
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end else begin
@@ -158,7 +156,6 @@ module spi_engine_execution_shiftreg_data_assemble #(
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end else begin
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lane_index <= 0;
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end
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lane_index_d <= lane_index;
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valid_index <= valid_indices[lane_index];
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end else if (sdo_toshiftreg) begin
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last_handshake_int <= 1'b0;

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