library/util_axis_fifo_asym: fix behavior when tkeep=0

Fix a bug where m_axis_valid waits on m_axis_ready to be asserted a few times in
order to skip over data for which tkeep was all zeroes. This was a violation of
the AXI Streaming protocol.

Signed-off-by: Laez Barbosa <laez.barbosa@analog.com>

Author: LBFFilho

library/util_axis_fifo_asym/util_axis_fifo_asym.v

@@ -216,7 +216,9 @@ module util_axis_fifo_asym #(
     if (RATIO_TYPE) begin : small_master
 
       for (i=0; i<RATIO; i=i+1) begin
-        assign m_axis_ready_int_s[i] = (m_axis_counter == i) ? m_axis_ready : 1'b0;
+        // When TKEEP_EN, we need to discard the data from the internal FIFOs for which tkeep=0.
+        // Thus we still need to assert m_axis_ready_int_s for that internal FIFO even without an actual AXI handshake.
+        assign m_axis_ready_int_s[i] = (m_axis_counter == i) ? (m_axis_ready ||  (TKEEP_EN && !(|m_axis_tkeep))) : 0;
       end
 
       assign m_axis_data = m_axis_data_int_s >> (m_axis_counter*A_WIDTH) ;
@@ -317,7 +319,10 @@ module util_axis_fifo_asym #(
         if (!m_axis_aresetn) begin
           m_axis_counter <= 0;
         end else begin
-          if (m_axis_ready && m_axis_valid_int) begin
+          // When using tkeep, we might have an internally "valid" data beat without any actually valid bytes.
+          // This will result in m_axis_valid being actually low for the external world.
+          // In this case (tkeep is all 0), we need to increment the counter without waiting for m_axis_ready.
+          if ((m_axis_ready && m_axis_valid) || (TKEEP_EN && m_axis_valid_int && !(|m_axis_tkeep))) begin
             m_axis_counter <= m_axis_counter + 1'b1;
           end
         end