projects: ad4630_fmc: Updated READMEs

Updated parts and boards, fixed NO_REORDER parameter build example
(cannot have DDR_EN in spi mode)

Signed-off-by: Liviu 'Ceshu' Adace <liviu.adace@analog.com>

Author: ladace

projects/ad4630_fmc/README.md

@@ -1,7 +1,10 @@
 # AD4630-FMC HDL Project
 
 - Evaluation board product page:
-  - [EVAL-AD4630-FMC](https://www.analog.com/eval-ad4630-24)
+  - [EVAL-AD4030-24FMCZ](https://www.analog.com/eval-ad4030-24)
+  - [EVAL-AD4630-16FMCZ](https://www.analog.com/eval-ad4630-16)
+  - [EVAL-AD4630-24FMCZ](https://www.analog.com/eval-ad4630-24)
+  - [EVAL-ADAQ4216-FMCZ](https://www.analog.com/eval-adaq4216-fmcz)
   - [EVAL-ADAQ4224-FMCZ](https://www.analog.com/eval-adaq4224-fmcz)
   - [EV-ISO-4224-FMCZ](https://www.analog.com/ev-iso-4224-fmcz)
 - System documentation: TO BE ADDED
@@ -12,11 +15,11 @@
 
 | Part name                                                    | Description                                                  |
 |--------------------------------------------------------------|--------------------------------------------------------------|
-| [AD4030](https://www.analog.com/ad4030-24)                   | 24-Bit, 2 MSPS, Single Channel SAR ADC                       |
-| [AD4630](https://www.analog.com/ad4630-24)                   | 24-Bit, 2 MSPS, Dual Channel, Precision Differential SAR ADC |
-| [AD4632](https://www.analog.com/ad4632-24)                   | 24-Bit, 500 kSPS, Dual Channel SAR ADC                       |
-| [ADAQ4216](https://www.analog.com/adaq4216)                  | 16-Bit, 2 MSPS, μModule Data-Acquisition Solution            |
-| [ADAQ4224](https://www.analog.com/adaq4224)                  | 24-Bit, 2 MSPS, μModule Data Acquisition Solution            |
+| [AD4030](https://www.analog.com/ad4030-24.html)              | 24-Bit, 2 MSPS, Single Channel SAR ADC                       |
+| [AD4630](https://www.analog.com/ad4630-24.html)              | 24-Bit, 2 MSPS, Dual Channel, Precision Differential SAR ADC |
+| [AD4632](https://www.analog.com/ad4632-24.html)              | 24-Bit, 500 kSPS, Dual Channel SAR ADC                       |
+| [ADAQ4216](https://www.analog.com/adaq4216.html)             | 16-Bit, 2 MSPS, μModule Data-Acquisition Solution            |
+| [ADAQ4224](https://www.analog.com/adaq4224.html)             | 24-Bit, 2 MSPS, μModule Data Acquisition Solution            |
 
 ## Building the project
 

projects/ad4630_fmc/zed/README.md

@@ -128,5 +128,5 @@ make CLK_MODE=0 NUM_OF_SDI=1 CAPTURE_ZONE=1 DDR_EN=0 NO_REORDER=1
 #### Clock mode SPI, MISO lines 2, Capture zone 1, SDR (AD4630)
 
 ```
-make CLK_MODE=0 NUM_OF_SDI=2 CAPTURE_ZONE=1 DDR_EN=1 NO_REORDER=1
+make CLK_MODE=0 NUM_OF_SDI=2 CAPTURE_ZONE=1 DDR_EN=0 NO_REORDER=1
 ```