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build: Replace default_clk_frequency with default_clk_period.
1 parent 9cd966a commit 98fdf3d

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3 files changed

+20
-5
lines changed

3 files changed

+20
-5
lines changed

amaranth/build/plat.py

Lines changed: 16 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -5,6 +5,7 @@
55
import textwrap
66
import re
77
import jinja2
8+
import warnings
89

910
from .. import __version__
1011
from .._toolchain import *
@@ -45,11 +46,25 @@ def default_clk_constraint(self):
4546

4647
@property
4748
def default_clk_frequency(self):
49+
# TODO(amaranth-0.7): remove
50+
warnings.warn(
51+
f"Per RFC 66, `default_clk_frequency` is deprecated. Use `default_clk_period` instead."
52+
f" instead.",
53+
DeprecationWarning, stacklevel=1)
54+
55+
constraint = self.default_clk_constraint
56+
if constraint is None:
57+
raise AttributeError("Platform '{}' does not constrain its default clock"
58+
.format(type(self).__qualname__))
59+
return constraint.period.hertz
60+
61+
@property
62+
def default_clk_period(self):
4863
constraint = self.default_clk_constraint
4964
if constraint is None:
5065
raise AttributeError("Platform '{}' does not constrain its default clock"
5166
.format(type(self).__qualname__))
52-
return constraint.frequency
67+
return constraint.period
5368

5469
def add_file(self, filename, content):
5570
if not isinstance(filename, str):

amaranth/vendor/_siliconblue.py

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -382,21 +382,21 @@ def create_missing_domain(self, name):
382382
i_CLKHFPU=1,
383383
p_CLKHF_DIV=f"0b{self.hfosc_div:02b}",
384384
o_CLKHF=clk_i)
385-
delay = int(100e-6 * self.default_clk_frequency)
385+
delay = Period(us=100) // self.default_clk_period
386386
# Internal low-speed clock: 10 KHz.
387387
elif self.default_clk == "SB_LFOSC":
388388
clk_i = Signal()
389389
m.submodules += Instance("SB_LFOSC",
390390
i_CLKLFEN=1,
391391
i_CLKLFPU=1,
392392
o_CLKLF=clk_i)
393-
delay = int(100e-6 * self.default_clk_frequency)
393+
delay = Period(us=100) // self.default_clk_period
394394
# User-defined clock signal.
395395
else:
396396
clk_io = self.request(self.default_clk, dir="-")
397397
m.submodules.clk_buf = clk_buf = io.Buffer("i", clk_io)
398398
clk_i = clk_buf.i
399-
delay = int(15e-6 * self.default_clk_frequency)
399+
delay = Period(us=15) // self.default_clk_period
400400

401401
if self.default_rst is not None:
402402
rst_io = self.request(self.default_rst, dir="-")

docs/_code/led_blinker.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -7,7 +7,7 @@ def elaborate(self, platform):
77

88
led = platform.request("led")
99

10-
half_freq = int(platform.default_clk_frequency // 2)
10+
half_freq = int(platform.default_clk_period.hertz // 2)
1111
timer = Signal(range(half_freq + 1))
1212

1313
with m.If(timer == half_freq):

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